1 /***************************************************************************//**
2  * @file
3  * @brief This file contains the type definitions for efr32xg1x chip-specific
4  *   aspects of RAIL.
5  *******************************************************************************
6  * # License
7  * <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
8  *******************************************************************************
9  *
10  * SPDX-License-Identifier: Zlib
11  *
12  * The licensor of this software is Silicon Laboratories Inc.
13  *
14  * This software is provided 'as-is', without any express or implied
15  * warranty. In no event will the authors be held liable for any damages
16  * arising from the use of this software.
17  *
18  * Permission is granted to anyone to use this software for any purpose,
19  * including commercial applications, and to alter it and redistribute it
20  * freely, subject to the following restrictions:
21  *
22  * 1. The origin of this software must not be misrepresented; you must not
23  *    claim that you wrote the original software. If you use this software
24  *    in a product, an acknowledgment in the product documentation would be
25  *    appreciated but is not required.
26  * 2. Altered source versions must be plainly marked as such, and must not be
27  *    misrepresented as being the original software.
28  * 3. This notice may not be removed or altered from any source distribution.
29  *
30  ******************************************************************************/
31 
32 #ifndef __RAIL_CHIP_SPECIFIC_H_
33 #if !defined(__RAIL_TYPES_H__) && !defined(DOXYGEN_SHOULD_SKIP_THIS)
34 #warning rail_chip_specific.h should only be included by rail_types.h
35 #include "rail_types.h" // Force rail_chip_specific.h only within rail_types.h
36 #else // __RAIL_TYPES_H__
37 /// Include guard
38 #define __RAIL_CHIP_SPECIFIC_H_
39 
40 #include "rail_features.h"
41 
42 #if     (defined(DOXYGEN_SHOULD_SKIP_THIS) && !defined(RAIL_ENUM))
43 //  Copied from rail_types.h to satisfy doxygen build.
44 /// The RAIL library does not use enumerations because the ARM EABI leaves their
45 /// size ambiguous, which causes problems if the application is built
46 /// with different flags than the library. Instead, uint8_t typedefs
47 /// are used in compiled code for all enumerations. For documentation purposes, this is
48 /// converted to an actual enumeration since it's much easier to read in Doxygen.
49 #define RAIL_ENUM(name) enum name
50 /// This macro is a more generic version of the \ref RAIL_ENUM() macro that
51 /// allows the size of the type to be overridden instead of forcing the use of
52 /// a uint8_t. See \ref RAIL_ENUM() for more information.
53 #define RAIL_ENUM_GENERIC(name, type) enum name
54 #endif//(defined(DOXYGEN_SHOULD_SKIP_THIS) && !defined(RAIL_ENUM))
55 
56 #ifdef __cplusplus
57 extern "C" {
58 #endif
59 
60 /**
61  * @addtogroup General_EFR32XG1 EFR32xG1
62  * @{
63  * @brief EFR32xG1-specific initialization data types
64  * @ingroup General
65  */
66 
67 /**
68  * A placeholder for a chip-specific RAIL handle. Using NULL as a RAIL handle is
69  * not recommended. As a result, another value that can't be de-referenced is used.
70  *
71  * This generic handle can and should be used for RAIL APIs that are called
72  * prior to RAIL initialization.
73  */
74 #define RAIL_EFR32_HANDLE ((RAIL_Handle_t)0xFFFFFFFFUL)
75 
76 #ifndef DOXYGEN_SHOULD_SKIP_THIS
77 
78 /**
79  * @def RAIL_EFR32XG1_STATE_BUFFER_BYTES
80  * @brief The EFR32XG1 series size needed for
81  *   \ref RAIL_StateBufferEntry_t::bufferBytes.
82  */
83 #define RAIL_EFR32XG1_STATE_BUFFER_BYTES 456
84 
85 /**
86  * @def RAIL_EFR32XG12_STATE_BUFFER_BYTES
87  * @brief The EFR32XG12 series size needed for
88  *   \ref RAIL_StateBufferEntry_t::bufferBytes.
89  */
90 #define RAIL_EFR32XG12_STATE_BUFFER_BYTES 480
91 
92 /**
93  * @def RAIL_EFR32XG13_STATE_BUFFER_BYTES
94  * @brief The EFR32XG13 series size needed for
95  *   \ref RAIL_StateBufferEntry_t::bufferBytes.
96  */
97 #define RAIL_EFR32XG13_STATE_BUFFER_BYTES 488
98 
99 /**
100  * @def RAIL_EFR32XG14_STATE_BUFFER_BYTES
101  * @brief The EFR32XG14 series size needed for
102  *   \ref RAIL_StateBufferEntry_t::bufferBytes.
103  */
104 #define RAIL_EFR32XG14_STATE_BUFFER_BYTES 496
105 
106 /**
107  * @def RAIL_STATE_BUFFER_BYTES
108  * @brief The size needed for \ref RAIL_StateBufferEntry_t::bufferBytes
109  *   on this platform for this radio. This compile-time size may be slightly
110  *   larger than what \ref RAIL_GetStateBufferSize() determines at run-time.
111  */
112 #if (_SILICON_LABS_32B_SERIES_1_CONFIG == 1)
113 #define RAIL_STATE_BUFFER_BYTES RAIL_EFR32XG1_STATE_BUFFER_BYTES
114 #elif (_SILICON_LABS_32B_SERIES_1_CONFIG == 2)
115 #define RAIL_STATE_BUFFER_BYTES RAIL_EFR32XG12_STATE_BUFFER_BYTES
116 #elif (_SILICON_LABS_32B_SERIES_1_CONFIG == 3)
117 #define RAIL_STATE_BUFFER_BYTES RAIL_EFR32XG13_STATE_BUFFER_BYTES
118 #elif (_SILICON_LABS_32B_SERIES_1_CONFIG == 4)
119 #define RAIL_STATE_BUFFER_BYTES RAIL_EFR32XG14_STATE_BUFFER_BYTES
120 #else
121 #define RAIL_STATE_BUFFER_BYTES 0 // Sate Doxygen
122 #error "Unsupported platform!"
123 #endif
124 
125 #endif//DOXYGEN_SHOULD_SKIP_THIS
126 
127 /**
128  * @struct RAILSched_Config_t
129  * @brief Provided for backwards compatibility.
130  */
131 typedef struct RAILSched_Config {
132   uint8_t buffer[1]; /**< Dummy buffer no longer used. */
133 } RAILSched_Config_t;
134 
135 /**
136  * @typedef RAIL_StateBuffer_t
137  * @brief Provided for backwards compatibility.
138  */
139 typedef uint8_t RAIL_StateBuffer_t[1];
140 
141 /**
142  * @struct RAIL_Config_t
143  * @brief RAIL configuration structure.
144  */
145 typedef struct RAIL_Config {
146   /**
147    * A pointer to a function, which is called whenever a RAIL event occurs.
148    *
149    * @param[in] railHandle A handle for a RAIL instance.
150    * @param[in] events A bit mask of RAIL events.
151    *
152    * See the \ref RAIL_Events_t documentation for the list of RAIL events.
153    */
154   void (*eventsCallback)(RAIL_Handle_t railHandle, RAIL_Events_t events);
155   /**
156    * Provided for backwards compatibility. Ignored.
157    */
158   void *protocol;
159   /**
160    * Provided for backwards compatibility. Ignored.
161    */
162   RAILSched_Config_t *scheduler;
163   /**
164    * Provided for backwards compatibility. Ignored.
165    */
166   RAIL_StateBuffer_t buffer;
167 } RAIL_Config_t;
168 
169 #ifndef DOXYGEN_SHOULD_SKIP_THIS
170 /**
171  * @enum RAIL_RadioStateEfr32_t
172  * @brief Radio state machine statuses.
173  */
RAIL_ENUM(RAIL_RadioStateEfr32_t)174 RAIL_ENUM(RAIL_RadioStateEfr32_t) {
175   RAIL_RAC_STATE_OFF,         /**< Radio is off. */
176   RAIL_RAC_STATE_RXWARM,      /**< Radio is enabling the receiver. */
177   RAIL_RAC_STATE_RXSEARCH,    /**< Radio is listening for incoming frames. */
178   RAIL_RAC_STATE_RXFRAME,     /**< Radio is receiving a frame. */
179   RAIL_RAC_STATE_RXPD,        /**< Radio is powering down receiver and going to
180                                    OFF state. */
181   RAIL_RAC_STATE_RX2RX,       /**< Radio is going back to receive mode after
182                                    receiving a frame. */
183   RAIL_RAC_STATE_RXOVERFLOW,  /**< Received data was lost due to full receive
184                                    buffer. */
185   RAIL_RAC_STATE_RX2TX,       /**< Radio is disabling receiver and enabling
186                                    transmitter. */
187   RAIL_RAC_STATE_TXWARM,      /**< Radio is enabling transmitter. */
188   RAIL_RAC_STATE_TX,          /**< Radio is transmitting data. */
189   RAIL_RAC_STATE_TXPD,        /**< Radio is powering down transmitter and going
190                                    to OFF state. */
191   RAIL_RAC_STATE_TX2RX,       /**< Radio is disabling transmitter and enabling
192                                    reception. */
193   RAIL_RAC_STATE_TX2TX,       /**< Radio is preparing a transmission after the
194                                    previous transmission was ended. */
195   RAIL_RAC_STATE_SHUTDOWN,    /**< Radio is powering down receiver and going to
196                                    OFF state. */
197   RAIL_RAC_STATE_NONE         /**< Invalid Radio state, must be the last entry. */
198 };
199 
200 // Self-referencing defines minimize compiler complaints when using RAIL_ENUM
201 #define RAIL_RAC_STATE_OFF          ((RAIL_RadioStateEfr32_t) RAIL_RAC_STATE_OFF)
202 #define RAIL_RAC_STATE_RXWARM       ((RAIL_RadioStateEfr32_t) RAIL_RAC_STATE_RXWARM)
203 #define RAIL_RAC_STATE_RXSEARCH     ((RAIL_RadioStateEfr32_t) RAIL_RAC_STATE_RXSEARCH)
204 #define RAIL_RAC_STATE_RXFRAME      ((RAIL_RadioStateEfr32_t) RAIL_RAC_STATE_RXFRAME)
205 #define RAIL_RAC_STATE_RXPD         ((RAIL_RadioStateEfr32_t) RAIL_RAC_STATE_RXPD)
206 #define RAIL_RAC_STATE_RX2RX        ((RAIL_RadioStateEfr32_t) RAIL_RAC_STATE_RX2RX)
207 #define RAIL_RAC_STATE_RXOVERFLOW   ((RAIL_RadioStateEfr32_t) RAIL_RAC_STATE_RXOVERFLOW)
208 #define RAIL_RAC_STATE_RX2TX        ((RAIL_RadioStateEfr32_t) RAIL_RAC_STATE_RX2TX)
209 #define RAIL_RAC_STATE_TXWARM       ((RAIL_RadioStateEfr32_t) RAIL_RAC_STATE_TXWARM)
210 #define RAIL_RAC_STATE_TX           ((RAIL_RadioStateEfr32_t) RAIL_RAC_STATE_TX)
211 #define RAIL_RAC_STATE_TXPD         ((RAIL_RadioStateEfr32_t) RAIL_RAC_STATE_TXPD)
212 #define RAIL_RAC_STATE_TX2RX        ((RAIL_RadioStateEfr32_t) RAIL_RAC_STATE_TX2RX)
213 #define RAIL_RAC_STATE_TX2TX        ((RAIL_RadioStateEfr32_t) RAIL_RAC_STATE_TX2TX)
214 #define RAIL_RAC_STATE_SHUTDOWN     ((RAIL_RadioStateEfr32_t) RAIL_RAC_STATE_SHUTDOWN)
215 #define RAIL_RAC_STATE_NONE         ((RAIL_RadioStateEfr32_t) RAIL_RAC_STATE_NONE)
216 #endif//DOXYGEN_SHOULD_SKIP_THIS
217 
218 /** @} */ // end of group General_EFR32XG1
219 
220 // -----------------------------------------------------------------------------
221 // Multiprotocol
222 // -----------------------------------------------------------------------------
223 /**
224  * @addtogroup Multiprotocol_EFR32 EFR32
225  * @{
226  * @brief EFR32-specific multiprotocol support defines
227  * @ingroup Multiprotocol
228  */
229 
230 /**
231  * @def TRANSITION_TIME_US
232  * @brief Time it takes to take care of protocol switching.
233  */
234 #define TRANSITION_TIME_US 430
235 
236 /** @} */ // end of group Multiprotocol_EFR32
237 
238 // -----------------------------------------------------------------------------
239 // Antenna Control
240 // -----------------------------------------------------------------------------
241 /**
242  * @addtogroup Antenna_Control_EFR32 EFR32
243  * @{
244  * @brief EFR32 Antenna Control Functionality
245  * @ingroup Antenna_Control
246  *
247  * These enumerations and structures are used with RAIL Antenna Control API. EFR32 supports
248  * up to two antennas with configurable pin locations.
249  */
250 
251 /** Antenna path Selection enumeration. */
RAIL_ENUM(RAIL_AntennaSel_t)252 RAIL_ENUM(RAIL_AntennaSel_t) {
253   /** Enum for antenna path 0. */
254   RAIL_ANTENNA_0 = 0,
255   /** Enum for antenna path 1. */
256   RAIL_ANTENNA_1 = 1,
257   /** Enum for antenna path auto. */
258   RAIL_ANTENNA_AUTO = 255,
259 };
260 
261 #ifndef DOXYGEN_SHOULD_SKIP_THIS
262 // Self-referencing defines minimize compiler complaints when using RAIL_ENUM
263 #define RAIL_ANTENNA_0    ((RAIL_AntennaSel_t) RAIL_ANTENNA_0)
264 #define RAIL_ANTENNA_1    ((RAIL_AntennaSel_t) RAIL_ANTENNA_1)
265 #define RAIL_ANTENNA_AUTO ((RAIL_AntennaSel_t) RAIL_ANTENNA_AUTO)
266 #endif//DOXYGEN_SHOULD_SKIP_THIS
267 
268 /**
269  * @struct RAIL_AntennaConfig_t
270  * @brief A configuration for antenna selection.
271  */
272 typedef struct RAIL_AntennaConfig {
273   /** Antenna 0 Pin Enable */
274   bool ant0PinEn;
275   /** Antenna 1 Pin Enable */
276   bool ant1PinEn;
277   /** Antenna 0 location for pin/port (EFR32 series 1)
278    *  On EFR32 series 2 this field is called defaultPath and
279    *  specifies the internal default RF path.  It is ignored
280    *  on EFR32 series 2 parts that have only one RF path bonded
281    *  out and on EFR32xG27 dual-band OPNs where the appropriate
282    *  RF path is automatically set by RAIL to 0 for 2.4GHZ band
283    *  and 1 for SubGHz band PHYs.
284    */
285   uint8_t ant0Loc;
286   /** Antenna 0 output GPIO port */
287   uint8_t ant0Port;
288   /** Antenna 0 output GPIO pin */
289   uint8_t ant0Pin;
290   /** Antenna 1 location for pin/port (EFR32 series 1 only) */
291   uint8_t ant1Loc;
292   /** Antenna 1 output GPIO port */
293   uint8_t ant1Port;
294   /** Antenna 1 output GPIO pin */
295   uint8_t ant1Pin;
296 } RAIL_AntennaConfig_t;
297 
298 /** @} */ // end of group Antenna_Control_EFR32
299 
300 // -----------------------------------------------------------------------------
301 // Calibration
302 // -----------------------------------------------------------------------------
303 /**
304  * @addtogroup Calibration_EFR32 EFR32
305  * @{
306  * @brief EFR32-specific Calibrations
307  * @ingroup Calibration
308  *
309  * The EFR32 supports the Image Rejection (IR)
310  * calibration and a temperature-dependent calibration. The IR calibration
311  * can be computed once and stored off or computed each time at
312  * startup. Because it is PHY-specific and provides sensitivity improvements,
313  * it is highly recommended. The IR calibration should only be run when the
314  * radio is IDLE.
315  *
316  * The temperature-dependent calibrations are used to recalibrate the synth if
317  * the temperature crosses 0C or the temperature delta since the last
318  * calibration exceeds 70C while in receive. RAIL will run the VCO calibration
319  * automatically upon entering receive or transmit states, so the application
320  * can omit this calibration if the stack re-enters receive or transmit with
321  * enough frequency to avoid reaching the temperature delta. If the application
322  * does not calibrate for temperature, it's possible to miss receive packets due
323  * to a drift in the carrier frequency.
324  */
325 
326 /** EFR32-specific temperature calibration bit */
327 #define RAIL_CAL_TEMP_VCO         (0x00000001U)
328 /** EFR32-specific HFXO temperature check bit */
329 #define RAIL_CAL_TEMP_HFXO        (0U)
330 /** EFR32-specific HFXO compensation bit */
331 #define RAIL_CAL_COMPENSATE_HFXO  (0U)
332 /** EFR32-specific IR calibration bit */
333 #define RAIL_CAL_RX_IRCAL         (0x00010000U)
334 /** EFR32-specific IR calibration bit */
335 #define RAIL_CAL_ONETIME_IRCAL    (RAIL_CAL_RX_IRCAL)
336 
337 /** A mask to run temperature-dependent calibrations */
338 #define RAIL_CAL_TEMP             (RAIL_CAL_TEMP_VCO)
339 /** A mask to run one-time calibrations */
340 #define RAIL_CAL_ONETIME          (RAIL_CAL_ONETIME_IRCAL)
341 /** A mask to run optional performance calibrations */
342 #define RAIL_CAL_PERF             (0)
343 /** A mask for calibrations that require the radio to be off */
344 #define RAIL_CAL_OFFLINE          (RAIL_CAL_ONETIME_IRCAL)
345 /** A mask to run all possible calibrations for this chip */
346 #define RAIL_CAL_ALL              (RAIL_CAL_TEMP | RAIL_CAL_ONETIME)
347 /** A mask to run all pending calibrations */
348 #define RAIL_CAL_ALL_PENDING      (0x00000000U)
349 /** An invalid calibration value */
350 #define RAIL_CAL_INVALID_VALUE    (0xFFFFFFFFU)
351 
352 /**
353  * @def RAIL_RF_PATHS
354  * @brief Indicates the number of RF Paths supported
355  */
356 #define RAIL_RF_PATHS 1
357 
358 /**
359  * RAIL_IrCalValues_t
360  * @brief An IR calibration value structure.
361  *
362  * This definition contains the set of persistent calibration values for
363  * EFR32. You can set these beforehand and apply them at startup to save the
364  * time required to compute them. Any of these values may be set to
365  * RAIL_IRCAL_INVALID_VALUE to force the code to compute that calibration value.
366  */
367 typedef uint32_t RAIL_IrCalValues_t[RAIL_RF_PATHS];
368 
369 /**
370  * A define to set all RAIL_IrCalValues_t values to uninitialized.
371  *
372  * This define can be used when you have no data to pass to the calibration
373  * routines but wish to compute and save all possible calibrations.
374  */
375 #define RAIL_IRCALVALUES_UNINIT { \
376     RAIL_CAL_INVALID_VALUE,       \
377 }
378 
379 /**
380  * A define allowing Rx calibration value access compatibility
381  * between series 1 and series 2.
382  */
383 #define RAIL_IRCALVAL(irCalStruct, rfPath) \
384   ((irCalStruct)[(rfPath)])
385 
386 /**
387  * @struct RAIL_ChannelConfigEntryAttr
388  * @brief A channel configuration entry attribute structure. Items listed
389  *  are designed to be altered and updated during run-time.
390  */
391 struct RAIL_ChannelConfigEntryAttr {
392   RAIL_IrCalValues_t calValues; /**< IR calibration attributes specific to
393                                        each channel configuration entry. */
394 };
395 
396 /**
397  * Apply a given image rejection calibration value.
398  *
399  * @param[in] railHandle A RAIL instance handle.
400  * @param[in] imageRejection The image rejection value to apply.
401  * @return A status code indicating success of the function call.
402  *
403  * Take an image rejection calibration value and apply it. This value should be
404  * determined from a previous run of \ref RAIL_CalibrateIr on the same
405  * physical device with the same radio configuration. The imageRejection value
406  * will also be stored to the \ref RAIL_ChannelConfigEntry_t::attr, if possible.
407  *
408  * If multiple protocols are used, this function will return
409  * \ref RAIL_STATUS_INVALID_STATE if it is called and the given railHandle is
410  * not active. In that case, the caller must attempt to re-call this function later.
411  *
412  * @deprecated Please use \ref RAIL_ApplyIrCalibrationAlt instead.
413  */
414 RAIL_Status_t RAIL_ApplyIrCalibration(RAIL_Handle_t railHandle,
415                                       uint32_t imageRejection);
416 
417 /**
418  * Apply a given image rejection calibration value.
419  *
420  * @param[in] railHandle A RAIL instance handle.
421  * @param[in] imageRejection Pointer to the image rejection value to apply.
422  * @param[in] rfPath RF path to calibrate.
423  * @return A status code indicating success of the function call.
424  *
425  * Take an image rejection calibration value and apply it. This value should be
426  * determined from a previous run of \ref RAIL_CalibrateIrAlt on the same
427  * physical device with the same radio configuration. The imageRejection value
428  * will also be stored to the \ref RAIL_ChannelConfigEntry_t::attr, if possible.
429  * @note: To make sure the imageRejection value is stored/configured correctly,
430  * \ref RAIL_ConfigAntenna should be called before calling this API.
431  *
432  * If multiple protocols are used, this function will return
433  * \ref RAIL_STATUS_INVALID_STATE if it is called and the given railHandle is
434  * not active. In that case, the caller must attempt to re-call this function later.
435  */
436 RAIL_Status_t RAIL_ApplyIrCalibrationAlt(RAIL_Handle_t railHandle,
437                                          RAIL_IrCalValues_t *imageRejection,
438                                          RAIL_AntennaSel_t rfPath);
439 
440 /**
441  * Run the image rejection calibration.
442  *
443  * @param[in] railHandle A RAIL instance handle.
444  * @param[out] imageRejection The result of the image rejection calibration.
445  * @return A status code indicating success of the function call.
446  *
447  * Run the image rejection calibration and apply the resulting value. If the
448  * imageRejection parameter is not NULL, store the value at that
449  * location. The imageRejection value will also be stored to the
450  * \ref RAIL_ChannelConfigEntry_t::attr, if possible. This is a long-running
451  * calibration that adds significant code space when run and can be run with a
452  * separate firmware image on each device to save code space in the
453  * final image.
454  *
455  * If multiple protocols are used, this function will make the given railHandle
456  * active, if not already, and perform calibration. If called during a protocol
457  * switch, it will return \ref RAIL_STATUS_INVALID_STATE. In this case,
458  * \ref RAIL_ApplyIrCalibration may be called to apply a previously determined
459  * IR calibration value, or the app must defer calibration until the
460  * protocol switch is complete. Silicon Labs recommends calling this function
461  * from the application main loop.
462  *
463  * @deprecated Please use \ref RAIL_CalibrateIrAlt instead.
464  */
465 RAIL_Status_t RAIL_CalibrateIr(RAIL_Handle_t railHandle,
466                                uint32_t *imageRejection);
467 
468 /**
469  * Run the image rejection calibration.
470  *
471  * @param[in] railHandle A RAIL instance handle.
472  * @param[out] imageRejection Pointer to the image rejection result.
473  * @param[in] rfPath RF path to calibrate.
474  * @return A status code indicating success of the function call.
475  *
476  * Run the image rejection calibration and apply the resulting value. If the
477  * imageRejection parameter is not NULL, store the value at that
478  * location. The imageRejection value will also be stored to the
479  * \ref RAIL_ChannelConfigEntry_t::attr, if possible. This is a long-running
480  * calibration that adds significant code space when run and can be run with a
481  * separate firmware image on each device to save code space in the
482  * final image.
483  * @note: To make sure the imageRejection value is stored/configured correctly,
484  * \ref RAIL_ConfigAntenna should be called before calling this API.
485  *
486  * If multiple protocols are used, this function will return
487  * \ref RAIL_STATUS_INVALID_STATE if it is called and the given railHandle is
488  * not active. In that case, the caller must attempt to re-call this function later.
489  */
490 RAIL_Status_t RAIL_CalibrateIrAlt(RAIL_Handle_t railHandle,
491                                   RAIL_IrCalValues_t *imageRejection,
492                                   RAIL_AntennaSel_t rfPath);
493 
494 /**
495  * Calibrate image rejection for IEEE 802.15.4 2.4 GHz.
496  *
497  * @param[in] railHandle A RAIL instance handle.
498  * @param[out] imageRejection The result of the image rejection calibration.
499  * @return A status code indicating success of the function call.
500  *
501  * Some chips have protocol-specific image rejection calibrations programmed
502  * into their flash. This function will either get the value from flash and
503  * apply it, or run the image rejection algorithm to find the value.
504  */
505 RAIL_Status_t RAIL_IEEE802154_CalibrateIr2p4Ghz(RAIL_Handle_t railHandle,
506                                                 uint32_t *imageRejection);
507 
508 /**
509  * Calibrate image rejection for IEEE 802.15.4 915 MHz and 868 MHz.
510  *
511  * @param[in] railHandle A RAIL instance handle.
512  * @param[out] imageRejection The result of the image rejection calibration.
513  * @return A status code indicating success of the function call.
514  *
515  * Some chips have protocol-specific image rejection calibrations programmed
516  * into their flash. This function will either get the value from flash and
517  * apply it, or run the image rejection algorithm to find the value.
518  */
519 RAIL_Status_t RAIL_IEEE802154_CalibrateIrSubGhz(RAIL_Handle_t railHandle,
520                                                 uint32_t *imageRejection);
521 
522 /**
523  * Calibrate image rejection for Bluetooth Low Energy.
524  *
525  * @param[in] railHandle A RAIL instance handle.
526  * @param[out] imageRejection The result of the image rejection calibration.
527  * @return A status code indicating success of the function call.
528  *
529  * Some chips have protocol-specific image rejection calibrations programmed
530  * into their flash. This function will either get the value from flash and
531  * apply it, or run the image rejection algorithm to find the value.
532  */
533 RAIL_Status_t RAIL_BLE_CalibrateIr(RAIL_Handle_t railHandle,
534                                    uint32_t *imageRejection);
535 
536 /**
537  * Run the temperature calibration.
538  *
539  * @param[in] railHandle A RAIL instance handle.
540  * @return A status code indicating success of the function call.
541  *
542  * Run the temperature calibration, which needs to recalibrate the synth if
543  * the temperature crosses 0C or the temperature delta since the last
544  * calibration exceeds 70C while in receive. RAIL will run the VCO calibration
545  * automatically upon entering receive or transmit states, so the application
546  * can omit this calibration if the stack re-enters receive or transmit with
547  * enough frequency to avoid reaching the temperature delta. If the application
548  * does not calibrate for temperature, it's possible to miss receive packets due
549  * to a drift in the carrier frequency.
550  *
551  * If multiple protocols are used, this function will return
552  * \ref RAIL_STATUS_INVALID_STATE if it is called and the given railHandle is
553  * not active. In that case, the calibration will be automatically performed
554  * next time the radio enters receive.
555  */
556 RAIL_Status_t RAIL_CalibrateTemp(RAIL_Handle_t railHandle);
557 
558 /**
559  * Performs HFXO compensation.
560  *
561  * @param[in] railHandle A RAIL instance handle.
562  * @param[out] crystalPPMError Current deviation that has been corrected,
563  *   measured in PPM. May be NULL.
564  * @return A status code indicating the result of the function call.
565  *
566  * Compute the PPM correction using the thermistor value available when
567  * \ref RAIL_EVENT_THERMISTOR_DONE occurs, after
568  * \ref RAIL_StartThermistorMeasurement() call.
569  * Then correct the RF frequency as well as Tx and Rx sampling.
570  *
571  * This function calls the following RAIL functions in sequence saving having
572  * to call them individually:
573  *   - \ref RAIL_ConvertThermistorImpedance()
574  *   - \ref RAIL_ComputeHFXOPPMError()
575  *   - \ref RAIL_CompensateHFXO()
576  *
577  * @note This function makes the radio idle.
578  */
579 RAIL_Status_t RAIL_CalibrateHFXO(RAIL_Handle_t railHandle, int8_t *crystalPPMError);
580 
581 /**
582  * @typedef RAIL_CalValues_t
583  * @brief A calibration value structure.
584  *
585  * This structure contains the set of persistent calibration values for
586  * EFR32. You can set these beforehand and apply them at startup to save the
587  * time required to compute them. Any of these values may be set to
588  * RAIL_CAL_INVALID_VALUE to force the code to compute that calibration value.
589  */
590 typedef RAIL_IrCalValues_t RAIL_CalValues_t;
591 
592 /**
593  * A define to set all RAIL_CalValues_t values to uninitialized.
594  *
595  * This define can be used when you have no data to pass to the calibration
596  * routines but wish to compute and save all possible calibrations.
597  */
598 #define RAIL_CALVALUES_UNINIT RAIL_IRCALVALUES_UNINIT
599 
600 /** @} */ // end of group Calibration_EFR32
601 
602 // -----------------------------------------------------------------------------
603 // Diagnostic
604 // -----------------------------------------------------------------------------
605 /**
606  * @addtogroup Diagnostic_EFR32 EFR32
607  * @{
608  * @brief Types specific to the EFR32 for the diagnostic routines.
609  * @ingroup Diagnostic
610  */
611 
612 /**
613  * @typedef RAIL_FrequencyOffset_t
614  * @brief Chip-specific type that represents the number of Frequency Offset
615  *   units. It is used with \ref RAIL_GetRxFreqOffset() and
616  *   \ref RAIL_SetFreqOffset().
617  *
618  * The units on this chip are radio synthesizer resolution steps (synthTicks).
619  * On EFR32 (at least for now), the frequency offset is limited to 15 bits
620  * (size of SYNTH_CALOFFSET). A value of \ref RAIL_FREQUENCY_OFFSET_INVALID
621  * means that this value is invalid.
622  */
623 typedef int16_t RAIL_FrequencyOffset_t;
624 
625 /**
626  * The maximum frequency offset value supported by this radio.
627  */
628 #define RAIL_FREQUENCY_OFFSET_MAX ((RAIL_FrequencyOffset_t) 0x3FFF)
629 
630 /**
631  * The minimum frequency offset value supported by this radio.
632  */
633 #define RAIL_FREQUENCY_OFFSET_MIN ((RAIL_FrequencyOffset_t) -RAIL_FREQUENCY_OFFSET_MAX)
634 
635 /**
636  * Specify an invalid frequency offset value. This will be returned if you
637  * call \ref RAIL_GetRxFreqOffset() at an invalid time.
638  */
639 #define RAIL_FREQUENCY_OFFSET_INVALID ((RAIL_FrequencyOffset_t) 0x8000)
640 
641 /**
642  * @struct RAIL_DirectModeConfig_t
643  * @brief Chip-specific type that allows the user to specify direct mode
644  *   parameters using \ref RAIL_ConfigDirectMode().
645  */
646 typedef struct RAIL_DirectModeConfig {
647   /** Enable synchronous RX DOUT using DCLK vs. asynchronous RX DOUT. */
648   bool syncRx;
649   /** Enable synchronous TX DIN using DCLK vs. asynchronous TX DIN. */
650   bool syncTx;
651 
652   /** Only used with directRx */
653   /** Data output (DOUT) GPIO port */
654   uint8_t doutPort;
655   /** Data output (DOUT) GPIO pin */
656   uint8_t doutPin;
657 
658   /** Only used in synchronous mode */
659   /** Data clock (DCLK) GPIO port. Only used in synchronous mode */
660   uint8_t dclkPort;
661   /** Data clock (DCLK) GPIO pin. Only used in synchronous mode */
662   uint8_t dclkPin;
663 
664   /** Only used with directTx */
665   /** Data frame (DIN) GPIO port */
666   uint8_t dinPort;
667   /** Data frame (DIN) GPIO pin */
668   uint8_t dinPin;
669 
670   /** Data output (DOUT) location for pin/port. */
671   uint8_t doutLoc;
672   /** Data clock (DCLK) location for pin/port. */
673   uint8_t dclkLoc;
674   /** Data frame (DIN) location for pin/port. */
675   uint8_t dinLoc;
676 } RAIL_DirectModeConfig_t;
677 
678 /** @} */ // end of group Diagnostic_EFR32
679 
680 // -----------------------------------------------------------------------------
681 // Radio Configuration
682 // -----------------------------------------------------------------------------
683 /**
684  * @addtogroup Radio_Configuration_EFR32 EFR32
685  * @{
686  * @ingroup Radio_Configuration
687  * @brief Types specific to the EFR32 for radio configuration.
688  */
689 
690 /**
691  * @brief The radio configuration structure.
692  *
693  * The radio configuration properly configures the
694  * radio for operation on a protocol. These configurations should not be
695  * created or edited by hand.
696  */
697 typedef const uint32_t *RAIL_RadioConfig_t;
698 
699 /** @} */ // end of group Radio_Configuration_EFR32
700 
701 // -----------------------------------------------------------------------------
702 // Transmit
703 // -----------------------------------------------------------------------------
704 /**
705  * @addtogroup PA_EFR32 EFR32
706  * @{
707  * @ingroup PA
708  * @brief Types specific to the EFR32 for dealing with the on-chip PAs.
709  */
710 
711 /**
712  * Raw power levels used directly by the RAIL_Get/SetTxPower API where a higher
713  * numerical value corresponds to a higher output power. These are referred to
714  * as 'raw (values/units)'. On EFR32, they can range from one of \ref
715  * RAIL_TX_POWER_LEVEL_2P4_LP_MIN, \ref RAIL_TX_POWER_LEVEL_2P4_HP_MIN, or
716  * \ref RAIL_TX_POWER_LEVEL_SUBGIG_HP_MIN to one of \ref
717  * RAIL_TX_POWER_LEVEL_2P4_LP_MAX, \ref RAIL_TX_POWER_LEVEL_2P4_HP_MAX, and \ref
718  * RAIL_TX_POWER_LEVEL_SUBGIG_HP_MAX, respectively, depending on the selected \ref
719  * RAIL_TxPowerMode_t.
720  */
721 typedef uint8_t RAIL_TxPowerLevel_t;
722 
723 /**
724  * PA power setting used directly by the \ref RAIL_GetPaPowerSetting() and
725  * \ref RAIL_SetPaPowerSetting() APIs which is decoded to the actual
726  * hardware register value(s).
727  */
728 typedef uint32_t RAIL_PaPowerSetting_t;
729 
730 /**
731  * Returned by \ref RAIL_SetPaPowerSetting when the current PA does
732  * not support the dBm to power setting mapping table.
733  */
734 #define RAIL_TX_PA_POWER_SETTING_UNSUPPORTED     (0U)
735 
736 /**
737  * The maximum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
738  * RAIL_TX_POWER_MODE_2P4_LP mode.
739  */
740 #define RAIL_TX_POWER_LEVEL_2P4_LP_MAX     (7U)
741 /**
742  * The maximum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
743  * RAIL_TX_POWER_MODE_2P4_HP mode.
744  */
745 #define RAIL_TX_POWER_LEVEL_2P4_HP_MAX     (252U)
746 /**
747  * The maximum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
748  * RAIL_TX_POWER_MODE_SUBGIG mode.
749  */
750 #define RAIL_TX_POWER_LEVEL_SUBGIG_HP_MAX (248U)
751 /**
752  * The minimum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
753  * RAIL_TX_POWER_MODE_2P4_LP mode.
754  */
755 #define RAIL_TX_POWER_LEVEL_2P4_LP_MIN     (1U)
756 /**
757  * The minimum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
758  * RAIL_TX_POWER_MODE_2P4_HP mode.
759  */
760 #define RAIL_TX_POWER_LEVEL_2P4_HP_MIN     (0U)
761 /**
762  * The minimum valid value for the \ref RAIL_TxPowerLevel_t when in \ref
763  * RAIL_TX_POWER_MODE_SUBGIG mode.
764  */
765 #define RAIL_TX_POWER_LEVEL_SUBGIG_HP_MIN (0U)
766 /**
767  * Invalid RAIL_TxPowerLevel_t value returned when an error occurs
768  * with RAIL_GetTxPower.
769  */
770 #define RAIL_TX_POWER_LEVEL_INVALID (255U)
771 /**
772  * Sentinel value that can be passed to RAIL_SetTxPower to set
773  * the highest power level available on the current PA, regardless
774  * of which one is selected.
775  */
776 #define RAIL_TX_POWER_LEVEL_MAX (254U)
777 
778 /** Backwards compatibility define */
779 #define RAIL_TX_POWER_LEVEL_LP_MAX      RAIL_TX_POWER_LEVEL_2P4_LP_MAX
780 /** Backwards compatibility define */
781 #define RAIL_TX_POWER_LEVEL_HP_MAX      RAIL_TX_POWER_LEVEL_2P4_HP_MAX
782 /** Backwards compatibility define */
783 #define RAIL_TX_POWER_LEVEL_SUBGIG_MAX  RAIL_TX_POWER_LEVEL_SUBGIG_HP_MAX
784 /** Backwards compatibility define */
785 #define RAIL_TX_POWER_LEVEL_LP_MIN      RAIL_TX_POWER_LEVEL_2P4_LP_MIN
786 /** Backwards compatibility define */
787 #define RAIL_TX_POWER_LEVEL_HP_MIN      RAIL_TX_POWER_LEVEL_2P4_HP_MIN
788 /** Backwards compatibility define */
789 #define RAIL_TX_POWER_LEVEL_SUBGIG_MIN  RAIL_TX_POWER_LEVEL_SUBGIG_HP_MIN
790 
791 /**
792  * @enum RAIL_TxPowerMode_t
793  * @brief An enumeration of the EFR32 power modes.
794  *
795  * The power modes on the EFR32 correspond to the different on-chip PAs that
796  * are available. For more information about the power and performance
797  * characteristics of a given amplifier, see the data sheet.
798  */
RAIL_ENUM(RAIL_TxPowerMode_t)799 RAIL_ENUM(RAIL_TxPowerMode_t) {
800   /** High-power amplifier, up to 20 dBm, raw values: 0-252 */
801   RAIL_TX_POWER_MODE_2P4GIG_HP,
802   /** Low-power amplifier, up to 0 dBm, raw values: 1-7 */
803   RAIL_TX_POWER_MODE_2P4GIG_LP,
804   /** SubGig amplifier, up to 20 dBm, raw values: 0-248 */
805   RAIL_TX_POWER_MODE_SUBGIG,
806   /** Invalid amplifier Selection */
807   RAIL_TX_POWER_MODE_NONE,
808 };
809 
810 /** @deprecated Please use \ref RAIL_TX_POWER_MODE_2P4GIG_HP instead. */
811 #define RAIL_TX_POWER_MODE_2P4_HP RAIL_TX_POWER_MODE_2P4GIG_HP
812 /** @deprecated Please use \ref RAIL_TX_POWER_MODE_2P4GIG_LP instead. */
813 #define RAIL_TX_POWER_MODE_2P4_LP RAIL_TX_POWER_MODE_2P4GIG_LP
814 
815 /**
816  * The number of PA's on this chip. (Including Virtual PAs)
817  */
818 #define RAIL_NUM_PA (3U)
819 
820 #ifndef DOXYGEN_SHOULD_SKIP_THIS
821 // Self-referencing defines minimize compiler complaints when using RAIL_ENUM
822 #define RAIL_TX_POWER_MODE_2P4GIG_HP ((RAIL_TxPowerMode_t) RAIL_TX_POWER_MODE_2P4GIG_HP)
823 #define RAIL_TX_POWER_MODE_2P4GIG_LP ((RAIL_TxPowerMode_t) RAIL_TX_POWER_MODE_2P4GIG_LP)
824 #define RAIL_TX_POWER_MODE_SUBGIG ((RAIL_TxPowerMode_t) RAIL_TX_POWER_MODE_SUBGIG)
825 #define RAIL_TX_POWER_MODE_NONE   ((RAIL_TxPowerMode_t) RAIL_TX_POWER_MODE_NONE)
826 #endif//DOXYGEN_SHOULD_SKIP_THIS
827 
828 /**
829  * @def RAIL_TX_POWER_MODE_NAMES
830  * @brief The names of the TX power modes
831  *
832  * A list of the names for the TX power modes on the EFR32 series 1 parts. This
833  * macro is useful for test applications and debugging output.
834  */
835 #define RAIL_TX_POWER_MODE_NAMES {  \
836     "RAIL_TX_POWER_MODE_2P4GIG_HP", \
837     "RAIL_TX_POWER_MODE_2P4GIG_LP", \
838     "RAIL_TX_POWER_MODE_SUBGIG",    \
839     "RAIL_TX_POWER_MODE_NONE"       \
840 }
841 
842 /**
843  * @struct RAIL_TxPowerConfig_t
844  *
845  * @brief A structure containing values used to initialize the power amplifiers.
846  */
847 typedef struct RAIL_TxPowerConfig {
848   /** TX power mode */
849   RAIL_TxPowerMode_t mode;
850   /** Power amplifier supply voltage in mV, generally:
851    *  DCDC supply ~ 1800 mV (1.8 V)
852    *  Battery supply ~ 3300 mV (3.3 V)
853    */
854   uint16_t voltage;
855   /** The amount of time to spend ramping for TX in uS. */
856   uint16_t rampTime;
857 } RAIL_TxPowerConfig_t;
858 
859 /** @} */ // end of group PA_EFR32
860 
861 // -----------------------------------------------------------------------------
862 // PTI
863 // -----------------------------------------------------------------------------
864 /**
865  * @addtogroup PTI_EFR32 EFR32
866  * @{
867  * @brief EFR32 PTI functionality
868  * @ingroup PTI
869  *
870  * These enumerations and structures are used with RAIL PTI API. EFR32 supports
871  * SPI and UART PTI and is configurable in terms of baud rates and pin PTI
872  * pin locations.
873  */
874 
875 /** A channel type enumeration. */
RAIL_ENUM(RAIL_PtiMode_t)876 RAIL_ENUM(RAIL_PtiMode_t) {
877   /** Turn PTI off entirely. */
878   RAIL_PTI_MODE_DISABLED,
879   /** SPI mode. */
880   RAIL_PTI_MODE_SPI,
881   /** UART mode. */
882   RAIL_PTI_MODE_UART,
883   /** 9-bit UART mode. */
884   RAIL_PTI_MODE_UART_ONEWIRE,
885 };
886 
887 #ifndef DOXYGEN_SHOULD_SKIP_THIS
888 // Self-referencing defines minimize compiler complaints when using RAIL_ENUM
889 #define RAIL_PTI_MODE_DISABLED     ((RAIL_PtiMode_t) RAIL_PTI_MODE_DISABLED)
890 #define RAIL_PTI_MODE_SPI          ((RAIL_PtiMode_t) RAIL_PTI_MODE_SPI)
891 #define RAIL_PTI_MODE_UART         ((RAIL_PtiMode_t) RAIL_PTI_MODE_UART)
892 #define RAIL_PTI_MODE_UART_ONEWIRE ((RAIL_PtiMode_t) RAIL_PTI_MODE_UART_ONEWIRE)
893 #endif//DOXYGEN_SHOULD_SKIP_THIS
894 
895 /**
896  * @struct RAIL_PtiConfig_t
897  * @brief A configuration for PTI.
898  */
899 typedef struct RAIL_PtiConfig {
900   /** Packet Trace mode (UART or SPI) */
901   RAIL_PtiMode_t mode;
902   /** Output baudrate for PTI in Hz */
903   uint32_t baud;
904   /** Data output (DOUT) location for pin/port */
905   uint8_t doutLoc;
906   /** Data output (DOUT) GPIO port */
907   uint8_t doutPort;
908   /** Data output (DOUT) GPIO pin */
909   uint8_t doutPin;
910   /** Data clock (DCLK) location for pin/port. Only used in SPI mode */
911   uint8_t dclkLoc;
912   /** Data clock (DCLK) GPIO port. Only used in SPI mode */
913   uint8_t dclkPort;
914   /** Data clock (DCLK) GPIO pin. Only used in SPI mode */
915   uint8_t dclkPin;
916   /** Data frame (DFRAME) location for pin/port */
917   uint8_t dframeLoc;
918   /** Data frame (DFRAME) GPIO port */
919   uint8_t dframePort;
920   /** Data frame (DFRAME) GPIO pin */
921   uint8_t dframePin;
922 } RAIL_PtiConfig_t;
923 
924 /** @} */ // end of group PTI_EFR32
925 
926 /******************************************************************************
927  * Calibration Structures
928  *****************************************************************************/
929 /**
930  * @addtogroup Calibration
931  * @{
932  */
933 
934 /// Use this value with either TX or RX values in RAIL_SetPaCTune
935 /// to use whatever value is already set and do no update.
936 #define RAIL_PACTUNE_IGNORE (255U)
937 
938 /** @} */ // end of group Calibration
939 
940 // -----------------------------------------------------------------------------
941 // Retiming
942 // -----------------------------------------------------------------------------
943 /**
944  * @addtogroup Retiming_EFR32 Retiming
945  * @{
946  * @brief EFR32-specific retiming capability.
947  * @ingroup RAIL_API
948  *
949  * The EFR product families have many digital and analog modules that can run
950  * in parallel with a radio. These combinations can cause interference and
951  * degradation on the radio RX sensitivity. Retiming can
952  * modify the clocking of the digital modules to reduce the interference.
953  */
954 
955 /**
956  * @enum RAIL_RetimeOptions_t
957  * @brief Retiming options bit shifts.
958  */
RAIL_ENUM(RAIL_RetimeOptions_t)959 RAIL_ENUM(RAIL_RetimeOptions_t) {
960   /** Shift position of \ref RAIL_RETIME_OPTION_HFXO bit */
961   RAIL_RETIME_OPTION_HFXO_SHIFT = 0,
962   /** Shift position of \ref RAIL_RETIME_OPTION_HFRCO bit */
963   RAIL_RETIME_OPTION_HFRCO_SHIFT,
964   /** Shift position of \ref RAIL_RETIME_OPTION_DCDC bit */
965   RAIL_RETIME_OPTION_DCDC_SHIFT,
966 };
967 
968 // RAIL_RetimeOptions_t bitmasks
969 /**
970  * An option to configure HFXO retiming
971  */
972 #define RAIL_RETIME_OPTION_HFXO \
973   (1U << RAIL_RETIME_OPTION_HFXO_SHIFT)
974 
975 /**
976  * An option to configure HFRCO retiming
977  */
978 #define RAIL_RETIME_OPTION_HFRCO \
979   (1U << RAIL_RETIME_OPTION_HFRCO_SHIFT)
980 
981 /**
982  * An option to configure DCDC retiming
983  */
984 #define RAIL_RETIME_OPTION_DCDC \
985   (1U << RAIL_RETIME_OPTION_DCDC_SHIFT)
986 
987 /** A value representing no retiming options */
988 #define RAIL_RETIME_OPTIONS_NONE 0x0U
989 
990 /** A value representing all retiming options */
991 #define RAIL_RETIME_OPTIONS_ALL 0xFFU
992 
993 /**
994  * Configure retiming options.
995  *
996  * @param[in] railHandle A handle of RAIL instance.
997  * @param[in] mask A bitmask containing which options should be modified.
998  * @param[in] options A bitmask containing desired configuration settings.
999  *   Bit positions for each option are found in the \ref RAIL_RetimeOptions_t.
1000  * @return Status code indicating success of the function call.
1001  */
1002 RAIL_Status_t RAIL_ConfigRetimeOptions(RAIL_Handle_t railHandle,
1003                                        RAIL_RetimeOptions_t mask,
1004                                        RAIL_RetimeOptions_t options);
1005 
1006 /**
1007  * Get the currently configured retiming option.
1008  *
1009  * @param[in] railHandle A handle of RAIL instance.
1010  * @param[out] pOptions A pointer to configured retiming options
1011                         bitmask indicating which are enabled.
1012  * @return Status code indicating success of the function call.
1013  */
1014 RAIL_Status_t RAIL_GetRetimeOptions(RAIL_Handle_t railHandle,
1015                                     RAIL_RetimeOptions_t *pOptions);
1016 
1017 /**
1018  * Indicate that the DCDC peripheral bus clock enable has changed allowing
1019  * RAIL to react accordingly.
1020  *
1021  * @note This should be called after DCDC has been enabled or disabled.
1022  *
1023  * @return Status code indicating success of the function call.
1024  */
1025 RAIL_Status_t RAIL_ChangedDcdc(void);
1026 
1027 /** @} */ // end of group Retiming_EFR32
1028 
1029 /******************************************************************************
1030  * RX Channel Hopping
1031  *****************************************************************************/
1032 /**
1033  * @addtogroup Rx_Channel_Hopping RX Channel Hopping
1034  * @{
1035  */
1036 
1037 /// The static amount of memory needed per channel for channel hopping, measured
1038 /// in 32 bit words, regardless of the size of radio configuration structures.
1039 #define RAIL_CHANNEL_HOPPING_BUFFER_SIZE_PER_CHANNEL (53U)
1040 
1041 /** @} */  // end of group Rx_Channel_Hopping
1042 
1043 /**
1044  * @addtogroup Sleep
1045  * @{
1046  */
1047 
1048 /// Default PRS channel to use when configuring sleep
1049 #define RAIL_TIMER_SYNC_PRS_CHANNEL_DEFAULT  (7U)
1050 
1051 #if _SILICON_LABS_32B_SERIES_1_CONFIG >= 3
1052 /// Default RTCC channel to use when configuring sleep
1053 #define RAIL_TIMER_SYNC_RTCC_CHANNEL_DEFAULT (1U)
1054 #else
1055 /// Default RTCC channel to use when configuring sleep
1056 #define RAIL_TIMER_SYNC_RTCC_CHANNEL_DEFAULT (0U)
1057 #endif
1058 
1059 /// Default timer synchronization configuration
1060 #define RAIL_TIMER_SYNC_DEFAULT {         \
1061     RAIL_TIMER_SYNC_PRS_CHANNEL_DEFAULT,  \
1062     RAIL_TIMER_SYNC_RTCC_CHANNEL_DEFAULT, \
1063     RAIL_SLEEP_CONFIG_TIMERSYNC_ENABLED,  \
1064 }
1065 
1066 /** @} */ // end of group Sleep
1067 
1068 /**
1069  * @addtogroup Data_Management_EFR32 EFR32
1070  * @{
1071  * @ingroup Data_Management
1072  */
1073 
1074 /// Fixed-width type indicating the needed alignment for RX and TX FIFOs. Note
1075 /// that docs.silabs.com will incorrectly indicate that this is always a
1076 /// uint8_t, but it does vary across RAIL platforms.
1077 #define RAIL_FIFO_ALIGNMENT_TYPE uint8_t
1078 
1079 /// Alignment that is needed for the RX and TX FIFOs.
1080 #define RAIL_FIFO_ALIGNMENT (sizeof(RAIL_FIFO_ALIGNMENT_TYPE))
1081 
1082 /** @} */ // end of group Data_Management_EFR32
1083 
1084 /**
1085  * @addtogroup State_Transitions_EFR32 EFR32
1086  * @{
1087  * @ingroup State_Transitions
1088  */
1089 
1090 /**
1091  * @def RAIL_MINIMUM_TRANSITION_US
1092  * @brief The minimum value for a consistent RAIL transition
1093  * @note Transitions may need to be slower than this when using longer
1094  *   \ref RAIL_TxPowerConfig_t::rampTime values
1095  */
1096 #define RAIL_MINIMUM_TRANSITION_US (100U)
1097 
1098 /**
1099  * @def RAIL_MAXIMUM_TRANSITION_US
1100  * @brief The maximum value for a consistent RAIL transition
1101  */
1102 #if     (_SILICON_LABS_32B_SERIES_1_CONFIG == 1)
1103 #define RAIL_MAXIMUM_TRANSITION_US (13000U)
1104 #else//!(_SILICON_LABS_32B_SERIES_1_CONFIG == 1)
1105 #define RAIL_MAXIMUM_TRANSITION_US (1000000U)
1106 #endif//(_SILICON_LABS_32B_SERIES_1_CONFIG == 1)
1107 
1108 /**
1109  * @typedef RAIL_TransitionTime_t
1110  * @brief Suitable type for the supported transition time range.
1111  */
1112 #if     (_SILICON_LABS_32B_SERIES_1_CONFIG == 1)
1113 typedef uint16_t RAIL_TransitionTime_t;
1114 #else//!(_SILICON_LABS_32B_SERIES_1_CONFIG == 1)
1115 typedef uint32_t RAIL_TransitionTime_t;
1116 #endif//(_SILICON_LABS_32B_SERIES_1_CONFIG == 1)
1117 
1118 /** @} */ // end of group State_Transitions_EFR32
1119 
1120 #ifdef __cplusplus
1121 }
1122 #endif
1123 
1124 #endif // __RAIL_TYPES_H__
1125 
1126 #endif // __RAIL_CHIP_SPECIFIC_H_
1127