1#
2# i.MX8QXP differentiation for pipelines and components
3#
4
5include(`memory.m4')
6
7dnl Memory capabilities for different buffer types on i.MX8
8define(`PLATFORM_DAI_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_DMA, MEM_CAP_CACHE))
9define(`PLATFORM_HOST_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_DMA, MEM_CAP_CACHE))
10define(`PLATFORM_PASS_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_DMA, MEM_CAP_CACHE))
11define(`PLATFORM_COMP_MEM_CAP', MEMCAPS(MEM_CAP_RAM, MEM_CAP_CACHE))
12
13# Low Latency PCM Configuration
14W_VENDORTUPLES(pipe_ll_schedule_plat_tokens, sof_sched_tokens, LIST(`		', `SOF_TKN_SCHED_MIPS	"50000"'))
15W_DATA(pipe_ll_schedule_plat, pipe_ll_schedule_plat_tokens)
16
17# Media PCM Configuration
18W_VENDORTUPLES(pipe_media_schedule_plat_tokens, sof_sched_tokens, LIST(`               ', `SOF_TKN_SCHED_MIPS  "100000"'))
19W_DATA(pipe_media_schedule_plat, pipe_media_schedule_plat_tokens)
20
21# DAI schedule Configuration - scheduled by IRQ
22W_VENDORTUPLES(pipe_dai_schedule_plat_tokens, sof_sched_tokens, LIST(`		', `SOF_TKN_SCHED_MIPS	"5000"'))
23W_DATA(pipe_dai_schedule_plat, pipe_dai_schedule_plat_tokens)
24
25