1 /*
2  * Peripheral I/O description for PIC32CX1025SG41100
3  *
4  * Copyright (c) 2024 Microchip Technology Inc. and its subsidiaries.
5  *
6  * Licensed under the Apache License, Version 2.0 (the "License");
7  * you may not use this file except in compliance with the License.
8  * You may obtain a copy of the License at
9  *
10  *   http://www.apache.org/licenses/LICENSE-2.0
11  *
12  * Unless required by applicable law or agreed to in writing, software
13  * distributed under the License is distributed on an "AS IS" BASIS,
14  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15  * See the License for the specific language governing permissions and
16  * limitations under the License.
17  *
18  */
19 
20 /*  file generated from device description file (ATDF) version 2023-03-17T09:48:29Z  */
21 #ifndef _PIC32CX1025SG41100_GPIO_H_
22 #define _PIC32CX1025SG41100_GPIO_H_
23 
24 /* ======================= Peripheral I/O pin numbers ======================= */
25 #define PIN_PA00                    (    0)  /* Pin Number for PA00 */
26 #define PIN_PA01                    (    1)  /* Pin Number for PA01 */
27 #define PIN_PA02                    (    2)  /* Pin Number for PA02 */
28 #define PIN_PA03                    (    3)  /* Pin Number for PA03 */
29 #define PIN_PA04                    (    4)  /* Pin Number for PA04 */
30 #define PIN_PA05                    (    5)  /* Pin Number for PA05 */
31 #define PIN_PA06                    (    6)  /* Pin Number for PA06 */
32 #define PIN_PA07                    (    7)  /* Pin Number for PA07 */
33 #define PIN_PA08                    (    8)  /* Pin Number for PA08 */
34 #define PIN_PA09                    (    9)  /* Pin Number for PA09 */
35 #define PIN_PA10                    (   10)  /* Pin Number for PA10 */
36 #define PIN_PA11                    (   11)  /* Pin Number for PA11 */
37 #define PIN_PA12                    (   12)  /* Pin Number for PA12 */
38 #define PIN_PA13                    (   13)  /* Pin Number for PA13 */
39 #define PIN_PA14                    (   14)  /* Pin Number for PA14 */
40 #define PIN_PA15                    (   15)  /* Pin Number for PA15 */
41 #define PIN_PA16                    (   16)  /* Pin Number for PA16 */
42 #define PIN_PA17                    (   17)  /* Pin Number for PA17 */
43 #define PIN_PA18                    (   18)  /* Pin Number for PA18 */
44 #define PIN_PA19                    (   19)  /* Pin Number for PA19 */
45 #define PIN_PA20                    (   20)  /* Pin Number for PA20 */
46 #define PIN_PA21                    (   21)  /* Pin Number for PA21 */
47 #define PIN_PA22                    (   22)  /* Pin Number for PA22 */
48 #define PIN_PA23                    (   23)  /* Pin Number for PA23 */
49 #define PIN_PA24                    (   24)  /* Pin Number for PA24 */
50 #define PIN_PA25                    (   25)  /* Pin Number for PA25 */
51 #define PIN_PA27                    (   27)  /* Pin Number for PA27 */
52 #define PIN_PA30                    (   30)  /* Pin Number for PA30 */
53 #define PIN_PA31                    (   31)  /* Pin Number for PA31 */
54 #define PIN_PB00                    (   32)  /* Pin Number for PB00 */
55 #define PIN_PB01                    (   33)  /* Pin Number for PB01 */
56 #define PIN_PB02                    (   34)  /* Pin Number for PB02 */
57 #define PIN_PB03                    (   35)  /* Pin Number for PB03 */
58 #define PIN_PB04                    (   36)  /* Pin Number for PB04 */
59 #define PIN_PB05                    (   37)  /* Pin Number for PB05 */
60 #define PIN_PB06                    (   38)  /* Pin Number for PB06 */
61 #define PIN_PB07                    (   39)  /* Pin Number for PB07 */
62 #define PIN_PB08                    (   40)  /* Pin Number for PB08 */
63 #define PIN_PB09                    (   41)  /* Pin Number for PB09 */
64 #define PIN_PB10                    (   42)  /* Pin Number for PB10 */
65 #define PIN_PB11                    (   43)  /* Pin Number for PB11 */
66 #define PIN_PB12                    (   44)  /* Pin Number for PB12 */
67 #define PIN_PB13                    (   45)  /* Pin Number for PB13 */
68 #define PIN_PB14                    (   46)  /* Pin Number for PB14 */
69 #define PIN_PB15                    (   47)  /* Pin Number for PB15 */
70 #define PIN_PB16                    (   48)  /* Pin Number for PB16 */
71 #define PIN_PB17                    (   49)  /* Pin Number for PB17 */
72 #define PIN_PB18                    (   50)  /* Pin Number for PB18 */
73 #define PIN_PB19                    (   51)  /* Pin Number for PB19 */
74 #define PIN_PB20                    (   52)  /* Pin Number for PB20 */
75 #define PIN_PB21                    (   53)  /* Pin Number for PB21 */
76 #define PIN_PB22                    (   54)  /* Pin Number for PB22 */
77 #define PIN_PB23                    (   55)  /* Pin Number for PB23 */
78 #define PIN_PB24                    (   56)  /* Pin Number for PB24 */
79 #define PIN_PB25                    (   57)  /* Pin Number for PB25 */
80 #define PIN_PB30                    (   62)  /* Pin Number for PB30 */
81 #define PIN_PB31                    (   63)  /* Pin Number for PB31 */
82 #define PIN_PC00                    (   64)  /* Pin Number for PC00 */
83 #define PIN_PC01                    (   65)  /* Pin Number for PC01 */
84 #define PIN_PC02                    (   66)  /* Pin Number for PC02 */
85 #define PIN_PC03                    (   67)  /* Pin Number for PC03 */
86 #define PIN_PC05                    (   69)  /* Pin Number for PC05 */
87 #define PIN_PC06                    (   70)  /* Pin Number for PC06 */
88 #define PIN_PC07                    (   71)  /* Pin Number for PC07 */
89 #define PIN_PC10                    (   74)  /* Pin Number for PC10 */
90 #define PIN_PC11                    (   75)  /* Pin Number for PC11 */
91 #define PIN_PC12                    (   76)  /* Pin Number for PC12 */
92 #define PIN_PC13                    (   77)  /* Pin Number for PC13 */
93 #define PIN_PC14                    (   78)  /* Pin Number for PC14 */
94 #define PIN_PC15                    (   79)  /* Pin Number for PC15 */
95 #define PIN_PC16                    (   80)  /* Pin Number for PC16 */
96 #define PIN_PC17                    (   81)  /* Pin Number for PC17 */
97 #define PIN_PC18                    (   82)  /* Pin Number for PC18 */
98 #define PIN_PC19                    (   83)  /* Pin Number for PC19 */
99 #define PIN_PC20                    (   84)  /* Pin Number for PC20 */
100 #define PIN_PC21                    (   85)  /* Pin Number for PC21 */
101 #define PIN_PC24                    (   88)  /* Pin Number for PC24 */
102 #define PIN_PC25                    (   89)  /* Pin Number for PC25 */
103 #define PIN_PC26                    (   90)  /* Pin Number for PC26 */
104 #define PIN_PC27                    (   91)  /* Pin Number for PC27 */
105 #define PIN_PC28                    (   92)  /* Pin Number for PC28 */
106 
107 /* ========================== Peripheral I/O masks ========================== */
108 #define PORT_PA00                   (_UINT32_(1) << 0) /* PORT mask for PA00 */
109 #define PORT_PA01                   (_UINT32_(1) << 1) /* PORT mask for PA01 */
110 #define PORT_PA02                   (_UINT32_(1) << 2) /* PORT mask for PA02 */
111 #define PORT_PA03                   (_UINT32_(1) << 3) /* PORT mask for PA03 */
112 #define PORT_PA04                   (_UINT32_(1) << 4) /* PORT mask for PA04 */
113 #define PORT_PA05                   (_UINT32_(1) << 5) /* PORT mask for PA05 */
114 #define PORT_PA06                   (_UINT32_(1) << 6) /* PORT mask for PA06 */
115 #define PORT_PA07                   (_UINT32_(1) << 7) /* PORT mask for PA07 */
116 #define PORT_PA08                   (_UINT32_(1) << 8) /* PORT mask for PA08 */
117 #define PORT_PA09                   (_UINT32_(1) << 9) /* PORT mask for PA09 */
118 #define PORT_PA10                   (_UINT32_(1) << 10) /* PORT mask for PA10 */
119 #define PORT_PA11                   (_UINT32_(1) << 11) /* PORT mask for PA11 */
120 #define PORT_PA12                   (_UINT32_(1) << 12) /* PORT mask for PA12 */
121 #define PORT_PA13                   (_UINT32_(1) << 13) /* PORT mask for PA13 */
122 #define PORT_PA14                   (_UINT32_(1) << 14) /* PORT mask for PA14 */
123 #define PORT_PA15                   (_UINT32_(1) << 15) /* PORT mask for PA15 */
124 #define PORT_PA16                   (_UINT32_(1) << 16) /* PORT mask for PA16 */
125 #define PORT_PA17                   (_UINT32_(1) << 17) /* PORT mask for PA17 */
126 #define PORT_PA18                   (_UINT32_(1) << 18) /* PORT mask for PA18 */
127 #define PORT_PA19                   (_UINT32_(1) << 19) /* PORT mask for PA19 */
128 #define PORT_PA20                   (_UINT32_(1) << 20) /* PORT mask for PA20 */
129 #define PORT_PA21                   (_UINT32_(1) << 21) /* PORT mask for PA21 */
130 #define PORT_PA22                   (_UINT32_(1) << 22) /* PORT mask for PA22 */
131 #define PORT_PA23                   (_UINT32_(1) << 23) /* PORT mask for PA23 */
132 #define PORT_PA24                   (_UINT32_(1) << 24) /* PORT mask for PA24 */
133 #define PORT_PA25                   (_UINT32_(1) << 25) /* PORT mask for PA25 */
134 #define PORT_PA27                   (_UINT32_(1) << 27) /* PORT mask for PA27 */
135 #define PORT_PA30                   (_UINT32_(1) << 30) /* PORT mask for PA30 */
136 #define PORT_PA31                   (_UINT32_(1) << 31) /* PORT mask for PA31 */
137 #define PORT_PB00                   (_UINT32_(1) << 0) /* PORT mask for PB00 */
138 #define PORT_PB01                   (_UINT32_(1) << 1) /* PORT mask for PB01 */
139 #define PORT_PB02                   (_UINT32_(1) << 2) /* PORT mask for PB02 */
140 #define PORT_PB03                   (_UINT32_(1) << 3) /* PORT mask for PB03 */
141 #define PORT_PB04                   (_UINT32_(1) << 4) /* PORT mask for PB04 */
142 #define PORT_PB05                   (_UINT32_(1) << 5) /* PORT mask for PB05 */
143 #define PORT_PB06                   (_UINT32_(1) << 6) /* PORT mask for PB06 */
144 #define PORT_PB07                   (_UINT32_(1) << 7) /* PORT mask for PB07 */
145 #define PORT_PB08                   (_UINT32_(1) << 8) /* PORT mask for PB08 */
146 #define PORT_PB09                   (_UINT32_(1) << 9) /* PORT mask for PB09 */
147 #define PORT_PB10                   (_UINT32_(1) << 10) /* PORT mask for PB10 */
148 #define PORT_PB11                   (_UINT32_(1) << 11) /* PORT mask for PB11 */
149 #define PORT_PB12                   (_UINT32_(1) << 12) /* PORT mask for PB12 */
150 #define PORT_PB13                   (_UINT32_(1) << 13) /* PORT mask for PB13 */
151 #define PORT_PB14                   (_UINT32_(1) << 14) /* PORT mask for PB14 */
152 #define PORT_PB15                   (_UINT32_(1) << 15) /* PORT mask for PB15 */
153 #define PORT_PB16                   (_UINT32_(1) << 16) /* PORT mask for PB16 */
154 #define PORT_PB17                   (_UINT32_(1) << 17) /* PORT mask for PB17 */
155 #define PORT_PB18                   (_UINT32_(1) << 18) /* PORT mask for PB18 */
156 #define PORT_PB19                   (_UINT32_(1) << 19) /* PORT mask for PB19 */
157 #define PORT_PB20                   (_UINT32_(1) << 20) /* PORT mask for PB20 */
158 #define PORT_PB21                   (_UINT32_(1) << 21) /* PORT mask for PB21 */
159 #define PORT_PB22                   (_UINT32_(1) << 22) /* PORT mask for PB22 */
160 #define PORT_PB23                   (_UINT32_(1) << 23) /* PORT mask for PB23 */
161 #define PORT_PB24                   (_UINT32_(1) << 24) /* PORT mask for PB24 */
162 #define PORT_PB25                   (_UINT32_(1) << 25) /* PORT mask for PB25 */
163 #define PORT_PB30                   (_UINT32_(1) << 30) /* PORT mask for PB30 */
164 #define PORT_PB31                   (_UINT32_(1) << 31) /* PORT mask for PB31 */
165 #define PORT_PC00                   (_UINT32_(1) << 0) /* PORT mask for PC00 */
166 #define PORT_PC01                   (_UINT32_(1) << 1) /* PORT mask for PC01 */
167 #define PORT_PC02                   (_UINT32_(1) << 2) /* PORT mask for PC02 */
168 #define PORT_PC03                   (_UINT32_(1) << 3) /* PORT mask for PC03 */
169 #define PORT_PC05                   (_UINT32_(1) << 5) /* PORT mask for PC05 */
170 #define PORT_PC06                   (_UINT32_(1) << 6) /* PORT mask for PC06 */
171 #define PORT_PC07                   (_UINT32_(1) << 7) /* PORT mask for PC07 */
172 #define PORT_PC10                   (_UINT32_(1) << 10) /* PORT mask for PC10 */
173 #define PORT_PC11                   (_UINT32_(1) << 11) /* PORT mask for PC11 */
174 #define PORT_PC12                   (_UINT32_(1) << 12) /* PORT mask for PC12 */
175 #define PORT_PC13                   (_UINT32_(1) << 13) /* PORT mask for PC13 */
176 #define PORT_PC14                   (_UINT32_(1) << 14) /* PORT mask for PC14 */
177 #define PORT_PC15                   (_UINT32_(1) << 15) /* PORT mask for PC15 */
178 #define PORT_PC16                   (_UINT32_(1) << 16) /* PORT mask for PC16 */
179 #define PORT_PC17                   (_UINT32_(1) << 17) /* PORT mask for PC17 */
180 #define PORT_PC18                   (_UINT32_(1) << 18) /* PORT mask for PC18 */
181 #define PORT_PC19                   (_UINT32_(1) << 19) /* PORT mask for PC19 */
182 #define PORT_PC20                   (_UINT32_(1) << 20) /* PORT mask for PC20 */
183 #define PORT_PC21                   (_UINT32_(1) << 21) /* PORT mask for PC21 */
184 #define PORT_PC24                   (_UINT32_(1) << 24) /* PORT mask for PC24 */
185 #define PORT_PC25                   (_UINT32_(1) << 25) /* PORT mask for PC25 */
186 #define PORT_PC26                   (_UINT32_(1) << 26) /* PORT mask for PC26 */
187 #define PORT_PC27                   (_UINT32_(1) << 27) /* PORT mask for PC27 */
188 #define PORT_PC28                   (_UINT32_(1) << 28) /* PORT mask for PC28 */
189 
190 /* =================== PORT definition for AC peripheral ==================== */
191 #define PIN_PA04B_AC_AIN0                          _UINT32_(4)
192 #define MUX_PA04B_AC_AIN0                          _UINT32_(1)
193 #define PINMUX_PA04B_AC_AIN0                       ((PIN_PA04B_AC_AIN0 << 16) | MUX_PA04B_AC_AIN0)
194 #define PORT_PA04B_AC_AIN0                         (_UINT32_(1) << 4)
195 
196 #define PIN_PA05B_AC_AIN1                          _UINT32_(5)
197 #define MUX_PA05B_AC_AIN1                          _UINT32_(1)
198 #define PINMUX_PA05B_AC_AIN1                       ((PIN_PA05B_AC_AIN1 << 16) | MUX_PA05B_AC_AIN1)
199 #define PORT_PA05B_AC_AIN1                         (_UINT32_(1) << 5)
200 
201 #define PIN_PA06B_AC_AIN2                          _UINT32_(6)
202 #define MUX_PA06B_AC_AIN2                          _UINT32_(1)
203 #define PINMUX_PA06B_AC_AIN2                       ((PIN_PA06B_AC_AIN2 << 16) | MUX_PA06B_AC_AIN2)
204 #define PORT_PA06B_AC_AIN2                         (_UINT32_(1) << 6)
205 
206 #define PIN_PA07B_AC_AIN3                          _UINT32_(7)
207 #define MUX_PA07B_AC_AIN3                          _UINT32_(1)
208 #define PINMUX_PA07B_AC_AIN3                       ((PIN_PA07B_AC_AIN3 << 16) | MUX_PA07B_AC_AIN3)
209 #define PORT_PA07B_AC_AIN3                         (_UINT32_(1) << 7)
210 
211 #define PIN_PA12M_AC_CMP0                          _UINT32_(12)
212 #define MUX_PA12M_AC_CMP0                          _UINT32_(12)
213 #define PINMUX_PA12M_AC_CMP0                       ((PIN_PA12M_AC_CMP0 << 16) | MUX_PA12M_AC_CMP0)
214 #define PORT_PA12M_AC_CMP0                         (_UINT32_(1) << 12)
215 
216 #define PIN_PA18M_AC_CMP0                          _UINT32_(18)
217 #define MUX_PA18M_AC_CMP0                          _UINT32_(12)
218 #define PINMUX_PA18M_AC_CMP0                       ((PIN_PA18M_AC_CMP0 << 16) | MUX_PA18M_AC_CMP0)
219 #define PORT_PA18M_AC_CMP0                         (_UINT32_(1) << 18)
220 
221 #define PIN_PB24M_AC_CMP0                          _UINT32_(56)
222 #define MUX_PB24M_AC_CMP0                          _UINT32_(12)
223 #define PINMUX_PB24M_AC_CMP0                       ((PIN_PB24M_AC_CMP0 << 16) | MUX_PB24M_AC_CMP0)
224 #define PORT_PB24M_AC_CMP0                         (_UINT32_(1) << 24)
225 
226 #define PIN_PA13M_AC_CMP1                          _UINT32_(13)
227 #define MUX_PA13M_AC_CMP1                          _UINT32_(12)
228 #define PINMUX_PA13M_AC_CMP1                       ((PIN_PA13M_AC_CMP1 << 16) | MUX_PA13M_AC_CMP1)
229 #define PORT_PA13M_AC_CMP1                         (_UINT32_(1) << 13)
230 
231 #define PIN_PA19M_AC_CMP1                          _UINT32_(19)
232 #define MUX_PA19M_AC_CMP1                          _UINT32_(12)
233 #define PINMUX_PA19M_AC_CMP1                       ((PIN_PA19M_AC_CMP1 << 16) | MUX_PA19M_AC_CMP1)
234 #define PORT_PA19M_AC_CMP1                         (_UINT32_(1) << 19)
235 
236 #define PIN_PB25M_AC_CMP1                          _UINT32_(57)
237 #define MUX_PB25M_AC_CMP1                          _UINT32_(12)
238 #define PINMUX_PB25M_AC_CMP1                       ((PIN_PB25M_AC_CMP1 << 16) | MUX_PB25M_AC_CMP1)
239 #define PORT_PB25M_AC_CMP1                         (_UINT32_(1) << 25)
240 
241 /* ================== PORT definition for ADC0 peripheral =================== */
242 #define PIN_PA02B_ADC0_AIN0                        _UINT32_(2)
243 #define MUX_PA02B_ADC0_AIN0                        _UINT32_(1)
244 #define PINMUX_PA02B_ADC0_AIN0                     ((PIN_PA02B_ADC0_AIN0 << 16) | MUX_PA02B_ADC0_AIN0)
245 #define PORT_PA02B_ADC0_AIN0                       (_UINT32_(1) << 2)
246 
247 #define PIN_PA03B_ADC0_AIN1                        _UINT32_(3)
248 #define MUX_PA03B_ADC0_AIN1                        _UINT32_(1)
249 #define PINMUX_PA03B_ADC0_AIN1                     ((PIN_PA03B_ADC0_AIN1 << 16) | MUX_PA03B_ADC0_AIN1)
250 #define PORT_PA03B_ADC0_AIN1                       (_UINT32_(1) << 3)
251 
252 #define PIN_PB08B_ADC0_AIN2                        _UINT32_(40)
253 #define MUX_PB08B_ADC0_AIN2                        _UINT32_(1)
254 #define PINMUX_PB08B_ADC0_AIN2                     ((PIN_PB08B_ADC0_AIN2 << 16) | MUX_PB08B_ADC0_AIN2)
255 #define PORT_PB08B_ADC0_AIN2                       (_UINT32_(1) << 8)
256 
257 #define PIN_PB09B_ADC0_AIN3                        _UINT32_(41)
258 #define MUX_PB09B_ADC0_AIN3                        _UINT32_(1)
259 #define PINMUX_PB09B_ADC0_AIN3                     ((PIN_PB09B_ADC0_AIN3 << 16) | MUX_PB09B_ADC0_AIN3)
260 #define PORT_PB09B_ADC0_AIN3                       (_UINT32_(1) << 9)
261 
262 #define PIN_PA04B_ADC0_AIN4                        _UINT32_(4)
263 #define MUX_PA04B_ADC0_AIN4                        _UINT32_(1)
264 #define PINMUX_PA04B_ADC0_AIN4                     ((PIN_PA04B_ADC0_AIN4 << 16) | MUX_PA04B_ADC0_AIN4)
265 #define PORT_PA04B_ADC0_AIN4                       (_UINT32_(1) << 4)
266 
267 #define PIN_PA05B_ADC0_AIN5                        _UINT32_(5)
268 #define MUX_PA05B_ADC0_AIN5                        _UINT32_(1)
269 #define PINMUX_PA05B_ADC0_AIN5                     ((PIN_PA05B_ADC0_AIN5 << 16) | MUX_PA05B_ADC0_AIN5)
270 #define PORT_PA05B_ADC0_AIN5                       (_UINT32_(1) << 5)
271 
272 #define PIN_PA06B_ADC0_AIN6                        _UINT32_(6)
273 #define MUX_PA06B_ADC0_AIN6                        _UINT32_(1)
274 #define PINMUX_PA06B_ADC0_AIN6                     ((PIN_PA06B_ADC0_AIN6 << 16) | MUX_PA06B_ADC0_AIN6)
275 #define PORT_PA06B_ADC0_AIN6                       (_UINT32_(1) << 6)
276 
277 #define PIN_PA07B_ADC0_AIN7                        _UINT32_(7)
278 #define MUX_PA07B_ADC0_AIN7                        _UINT32_(1)
279 #define PINMUX_PA07B_ADC0_AIN7                     ((PIN_PA07B_ADC0_AIN7 << 16) | MUX_PA07B_ADC0_AIN7)
280 #define PORT_PA07B_ADC0_AIN7                       (_UINT32_(1) << 7)
281 
282 #define PIN_PA08B_ADC0_AIN8                        _UINT32_(8)
283 #define MUX_PA08B_ADC0_AIN8                        _UINT32_(1)
284 #define PINMUX_PA08B_ADC0_AIN8                     ((PIN_PA08B_ADC0_AIN8 << 16) | MUX_PA08B_ADC0_AIN8)
285 #define PORT_PA08B_ADC0_AIN8                       (_UINT32_(1) << 8)
286 
287 #define PIN_PA09B_ADC0_AIN9                        _UINT32_(9)
288 #define MUX_PA09B_ADC0_AIN9                        _UINT32_(1)
289 #define PINMUX_PA09B_ADC0_AIN9                     ((PIN_PA09B_ADC0_AIN9 << 16) | MUX_PA09B_ADC0_AIN9)
290 #define PORT_PA09B_ADC0_AIN9                       (_UINT32_(1) << 9)
291 
292 #define PIN_PA10B_ADC0_AIN10                       _UINT32_(10)
293 #define MUX_PA10B_ADC0_AIN10                       _UINT32_(1)
294 #define PINMUX_PA10B_ADC0_AIN10                    ((PIN_PA10B_ADC0_AIN10 << 16) | MUX_PA10B_ADC0_AIN10)
295 #define PORT_PA10B_ADC0_AIN10                      (_UINT32_(1) << 10)
296 
297 #define PIN_PA11B_ADC0_AIN11                       _UINT32_(11)
298 #define MUX_PA11B_ADC0_AIN11                       _UINT32_(1)
299 #define PINMUX_PA11B_ADC0_AIN11                    ((PIN_PA11B_ADC0_AIN11 << 16) | MUX_PA11B_ADC0_AIN11)
300 #define PORT_PA11B_ADC0_AIN11                      (_UINT32_(1) << 11)
301 
302 #define PIN_PB00B_ADC0_AIN12                       _UINT32_(32)
303 #define MUX_PB00B_ADC0_AIN12                       _UINT32_(1)
304 #define PINMUX_PB00B_ADC0_AIN12                    ((PIN_PB00B_ADC0_AIN12 << 16) | MUX_PB00B_ADC0_AIN12)
305 #define PORT_PB00B_ADC0_AIN12                      (_UINT32_(1) << 0)
306 
307 #define PIN_PB01B_ADC0_AIN13                       _UINT32_(33)
308 #define MUX_PB01B_ADC0_AIN13                       _UINT32_(1)
309 #define PINMUX_PB01B_ADC0_AIN13                    ((PIN_PB01B_ADC0_AIN13 << 16) | MUX_PB01B_ADC0_AIN13)
310 #define PORT_PB01B_ADC0_AIN13                      (_UINT32_(1) << 1)
311 
312 #define PIN_PB02B_ADC0_AIN14                       _UINT32_(34)
313 #define MUX_PB02B_ADC0_AIN14                       _UINT32_(1)
314 #define PINMUX_PB02B_ADC0_AIN14                    ((PIN_PB02B_ADC0_AIN14 << 16) | MUX_PB02B_ADC0_AIN14)
315 #define PORT_PB02B_ADC0_AIN14                      (_UINT32_(1) << 2)
316 
317 #define PIN_PB03B_ADC0_AIN15                       _UINT32_(35)
318 #define MUX_PB03B_ADC0_AIN15                       _UINT32_(1)
319 #define PINMUX_PB03B_ADC0_AIN15                    ((PIN_PB03B_ADC0_AIN15 << 16) | MUX_PB03B_ADC0_AIN15)
320 #define PORT_PB03B_ADC0_AIN15                      (_UINT32_(1) << 3)
321 
322 #define PIN_PA03B_ADC0_VREFA                       _UINT32_(3)
323 #define MUX_PA03B_ADC0_VREFA                       _UINT32_(1)
324 #define PINMUX_PA03B_ADC0_VREFA                    ((PIN_PA03B_ADC0_VREFA << 16) | MUX_PA03B_ADC0_VREFA)
325 #define PORT_PA03B_ADC0_VREFA                      (_UINT32_(1) << 3)
326 
327 #define PIN_PA04B_ADC0_VREFB                       _UINT32_(4)
328 #define MUX_PA04B_ADC0_VREFB                       _UINT32_(1)
329 #define PINMUX_PA04B_ADC0_VREFB                    ((PIN_PA04B_ADC0_VREFB << 16) | MUX_PA04B_ADC0_VREFB)
330 #define PORT_PA04B_ADC0_VREFB                      (_UINT32_(1) << 4)
331 
332 #define PIN_PA06B_ADC0_VREFC                       _UINT32_(6)
333 #define MUX_PA06B_ADC0_VREFC                       _UINT32_(1)
334 #define PINMUX_PA06B_ADC0_VREFC                    ((PIN_PA06B_ADC0_VREFC << 16) | MUX_PA06B_ADC0_VREFC)
335 #define PORT_PA06B_ADC0_VREFC                      (_UINT32_(1) << 6)
336 
337 #define PIN_PA03B_ADC0_X0                          _UINT32_(3)
338 #define MUX_PA03B_ADC0_X0                          _UINT32_(1)
339 #define PINMUX_PA03B_ADC0_X0                       ((PIN_PA03B_ADC0_X0 << 16) | MUX_PA03B_ADC0_X0)
340 #define PORT_PA03B_ADC0_X0                         (_UINT32_(1) << 3)
341 
342 #define PIN_PB08B_ADC0_X1                          _UINT32_(40)
343 #define MUX_PB08B_ADC0_X1                          _UINT32_(1)
344 #define PINMUX_PB08B_ADC0_X1                       ((PIN_PB08B_ADC0_X1 << 16) | MUX_PB08B_ADC0_X1)
345 #define PORT_PB08B_ADC0_X1                         (_UINT32_(1) << 8)
346 
347 #define PIN_PB09B_ADC0_X2                          _UINT32_(41)
348 #define MUX_PB09B_ADC0_X2                          _UINT32_(1)
349 #define PINMUX_PB09B_ADC0_X2                       ((PIN_PB09B_ADC0_X2 << 16) | MUX_PB09B_ADC0_X2)
350 #define PORT_PB09B_ADC0_X2                         (_UINT32_(1) << 9)
351 
352 #define PIN_PA04B_ADC0_X3                          _UINT32_(4)
353 #define MUX_PA04B_ADC0_X3                          _UINT32_(1)
354 #define PINMUX_PA04B_ADC0_X3                       ((PIN_PA04B_ADC0_X3 << 16) | MUX_PA04B_ADC0_X3)
355 #define PORT_PA04B_ADC0_X3                         (_UINT32_(1) << 4)
356 
357 #define PIN_PA06B_ADC0_X4                          _UINT32_(6)
358 #define MUX_PA06B_ADC0_X4                          _UINT32_(1)
359 #define PINMUX_PA06B_ADC0_X4                       ((PIN_PA06B_ADC0_X4 << 16) | MUX_PA06B_ADC0_X4)
360 #define PORT_PA06B_ADC0_X4                         (_UINT32_(1) << 6)
361 
362 #define PIN_PA07B_ADC0_X5                          _UINT32_(7)
363 #define MUX_PA07B_ADC0_X5                          _UINT32_(1)
364 #define PINMUX_PA07B_ADC0_X5                       ((PIN_PA07B_ADC0_X5 << 16) | MUX_PA07B_ADC0_X5)
365 #define PORT_PA07B_ADC0_X5                         (_UINT32_(1) << 7)
366 
367 #define PIN_PA08B_ADC0_X6                          _UINT32_(8)
368 #define MUX_PA08B_ADC0_X6                          _UINT32_(1)
369 #define PINMUX_PA08B_ADC0_X6                       ((PIN_PA08B_ADC0_X6 << 16) | MUX_PA08B_ADC0_X6)
370 #define PORT_PA08B_ADC0_X6                         (_UINT32_(1) << 8)
371 
372 #define PIN_PA09B_ADC0_X7                          _UINT32_(9)
373 #define MUX_PA09B_ADC0_X7                          _UINT32_(1)
374 #define PINMUX_PA09B_ADC0_X7                       ((PIN_PA09B_ADC0_X7 << 16) | MUX_PA09B_ADC0_X7)
375 #define PORT_PA09B_ADC0_X7                         (_UINT32_(1) << 9)
376 
377 #define PIN_PA10B_ADC0_X8                          _UINT32_(10)
378 #define MUX_PA10B_ADC0_X8                          _UINT32_(1)
379 #define PINMUX_PA10B_ADC0_X8                       ((PIN_PA10B_ADC0_X8 << 16) | MUX_PA10B_ADC0_X8)
380 #define PORT_PA10B_ADC0_X8                         (_UINT32_(1) << 10)
381 
382 #define PIN_PA11B_ADC0_X9                          _UINT32_(11)
383 #define MUX_PA11B_ADC0_X9                          _UINT32_(1)
384 #define PINMUX_PA11B_ADC0_X9                       ((PIN_PA11B_ADC0_X9 << 16) | MUX_PA11B_ADC0_X9)
385 #define PORT_PA11B_ADC0_X9                         (_UINT32_(1) << 11)
386 
387 #define PIN_PA16B_ADC0_X10                         _UINT32_(16)
388 #define MUX_PA16B_ADC0_X10                         _UINT32_(1)
389 #define PINMUX_PA16B_ADC0_X10                      ((PIN_PA16B_ADC0_X10 << 16) | MUX_PA16B_ADC0_X10)
390 #define PORT_PA16B_ADC0_X10                        (_UINT32_(1) << 16)
391 
392 #define PIN_PA17B_ADC0_X11                         _UINT32_(17)
393 #define MUX_PA17B_ADC0_X11                         _UINT32_(1)
394 #define PINMUX_PA17B_ADC0_X11                      ((PIN_PA17B_ADC0_X11 << 16) | MUX_PA17B_ADC0_X11)
395 #define PORT_PA17B_ADC0_X11                        (_UINT32_(1) << 17)
396 
397 #define PIN_PA18B_ADC0_X12                         _UINT32_(18)
398 #define MUX_PA18B_ADC0_X12                         _UINT32_(1)
399 #define PINMUX_PA18B_ADC0_X12                      ((PIN_PA18B_ADC0_X12 << 16) | MUX_PA18B_ADC0_X12)
400 #define PORT_PA18B_ADC0_X12                        (_UINT32_(1) << 18)
401 
402 #define PIN_PA19B_ADC0_X13                         _UINT32_(19)
403 #define MUX_PA19B_ADC0_X13                         _UINT32_(1)
404 #define PINMUX_PA19B_ADC0_X13                      ((PIN_PA19B_ADC0_X13 << 16) | MUX_PA19B_ADC0_X13)
405 #define PORT_PA19B_ADC0_X13                        (_UINT32_(1) << 19)
406 
407 #define PIN_PA20B_ADC0_X14                         _UINT32_(20)
408 #define MUX_PA20B_ADC0_X14                         _UINT32_(1)
409 #define PINMUX_PA20B_ADC0_X14                      ((PIN_PA20B_ADC0_X14 << 16) | MUX_PA20B_ADC0_X14)
410 #define PORT_PA20B_ADC0_X14                        (_UINT32_(1) << 20)
411 
412 #define PIN_PA21B_ADC0_X15                         _UINT32_(21)
413 #define MUX_PA21B_ADC0_X15                         _UINT32_(1)
414 #define PINMUX_PA21B_ADC0_X15                      ((PIN_PA21B_ADC0_X15 << 16) | MUX_PA21B_ADC0_X15)
415 #define PORT_PA21B_ADC0_X15                        (_UINT32_(1) << 21)
416 
417 #define PIN_PA22B_ADC0_X16                         _UINT32_(22)
418 #define MUX_PA22B_ADC0_X16                         _UINT32_(1)
419 #define PINMUX_PA22B_ADC0_X16                      ((PIN_PA22B_ADC0_X16 << 16) | MUX_PA22B_ADC0_X16)
420 #define PORT_PA22B_ADC0_X16                        (_UINT32_(1) << 22)
421 
422 #define PIN_PA23B_ADC0_X17                         _UINT32_(23)
423 #define MUX_PA23B_ADC0_X17                         _UINT32_(1)
424 #define PINMUX_PA23B_ADC0_X17                      ((PIN_PA23B_ADC0_X17 << 16) | MUX_PA23B_ADC0_X17)
425 #define PORT_PA23B_ADC0_X17                        (_UINT32_(1) << 23)
426 
427 #define PIN_PA27B_ADC0_X18                         _UINT32_(27)
428 #define MUX_PA27B_ADC0_X18                         _UINT32_(1)
429 #define PINMUX_PA27B_ADC0_X18                      ((PIN_PA27B_ADC0_X18 << 16) | MUX_PA27B_ADC0_X18)
430 #define PORT_PA27B_ADC0_X18                        (_UINT32_(1) << 27)
431 
432 #define PIN_PA30B_ADC0_X19                         _UINT32_(30)
433 #define MUX_PA30B_ADC0_X19                         _UINT32_(1)
434 #define PINMUX_PA30B_ADC0_X19                      ((PIN_PA30B_ADC0_X19 << 16) | MUX_PA30B_ADC0_X19)
435 #define PORT_PA30B_ADC0_X19                        (_UINT32_(1) << 30)
436 
437 #define PIN_PB02B_ADC0_X20                         _UINT32_(34)
438 #define MUX_PB02B_ADC0_X20                         _UINT32_(1)
439 #define PINMUX_PB02B_ADC0_X20                      ((PIN_PB02B_ADC0_X20 << 16) | MUX_PB02B_ADC0_X20)
440 #define PORT_PB02B_ADC0_X20                        (_UINT32_(1) << 2)
441 
442 #define PIN_PB03B_ADC0_X21                         _UINT32_(35)
443 #define MUX_PB03B_ADC0_X21                         _UINT32_(1)
444 #define PINMUX_PB03B_ADC0_X21                      ((PIN_PB03B_ADC0_X21 << 16) | MUX_PB03B_ADC0_X21)
445 #define PORT_PB03B_ADC0_X21                        (_UINT32_(1) << 3)
446 
447 #define PIN_PB04B_ADC0_X22                         _UINT32_(36)
448 #define MUX_PB04B_ADC0_X22                         _UINT32_(1)
449 #define PINMUX_PB04B_ADC0_X22                      ((PIN_PB04B_ADC0_X22 << 16) | MUX_PB04B_ADC0_X22)
450 #define PORT_PB04B_ADC0_X22                        (_UINT32_(1) << 4)
451 
452 #define PIN_PB05B_ADC0_X23                         _UINT32_(37)
453 #define MUX_PB05B_ADC0_X23                         _UINT32_(1)
454 #define PINMUX_PB05B_ADC0_X23                      ((PIN_PB05B_ADC0_X23 << 16) | MUX_PB05B_ADC0_X23)
455 #define PORT_PB05B_ADC0_X23                        (_UINT32_(1) << 5)
456 
457 #define PIN_PB06B_ADC0_X24                         _UINT32_(38)
458 #define MUX_PB06B_ADC0_X24                         _UINT32_(1)
459 #define PINMUX_PB06B_ADC0_X24                      ((PIN_PB06B_ADC0_X24 << 16) | MUX_PB06B_ADC0_X24)
460 #define PORT_PB06B_ADC0_X24                        (_UINT32_(1) << 6)
461 
462 #define PIN_PB07B_ADC0_X25                         _UINT32_(39)
463 #define MUX_PB07B_ADC0_X25                         _UINT32_(1)
464 #define PINMUX_PB07B_ADC0_X25                      ((PIN_PB07B_ADC0_X25 << 16) | MUX_PB07B_ADC0_X25)
465 #define PORT_PB07B_ADC0_X25                        (_UINT32_(1) << 7)
466 
467 #define PIN_PB12B_ADC0_X26                         _UINT32_(44)
468 #define MUX_PB12B_ADC0_X26                         _UINT32_(1)
469 #define PINMUX_PB12B_ADC0_X26                      ((PIN_PB12B_ADC0_X26 << 16) | MUX_PB12B_ADC0_X26)
470 #define PORT_PB12B_ADC0_X26                        (_UINT32_(1) << 12)
471 
472 #define PIN_PB13B_ADC0_X27                         _UINT32_(45)
473 #define MUX_PB13B_ADC0_X27                         _UINT32_(1)
474 #define PINMUX_PB13B_ADC0_X27                      ((PIN_PB13B_ADC0_X27 << 16) | MUX_PB13B_ADC0_X27)
475 #define PORT_PB13B_ADC0_X27                        (_UINT32_(1) << 13)
476 
477 #define PIN_PB14B_ADC0_X28                         _UINT32_(46)
478 #define MUX_PB14B_ADC0_X28                         _UINT32_(1)
479 #define PINMUX_PB14B_ADC0_X28                      ((PIN_PB14B_ADC0_X28 << 16) | MUX_PB14B_ADC0_X28)
480 #define PORT_PB14B_ADC0_X28                        (_UINT32_(1) << 14)
481 
482 #define PIN_PB15B_ADC0_X29                         _UINT32_(47)
483 #define MUX_PB15B_ADC0_X29                         _UINT32_(1)
484 #define PINMUX_PB15B_ADC0_X29                      ((PIN_PB15B_ADC0_X29 << 16) | MUX_PB15B_ADC0_X29)
485 #define PORT_PB15B_ADC0_X29                        (_UINT32_(1) << 15)
486 
487 #define PIN_PB00B_ADC0_X30                         _UINT32_(32)
488 #define MUX_PB00B_ADC0_X30                         _UINT32_(1)
489 #define PINMUX_PB00B_ADC0_X30                      ((PIN_PB00B_ADC0_X30 << 16) | MUX_PB00B_ADC0_X30)
490 #define PORT_PB00B_ADC0_X30                        (_UINT32_(1) << 0)
491 
492 #define PIN_PB01B_ADC0_X31                         _UINT32_(33)
493 #define MUX_PB01B_ADC0_X31                         _UINT32_(1)
494 #define PINMUX_PB01B_ADC0_X31                      ((PIN_PB01B_ADC0_X31 << 16) | MUX_PB01B_ADC0_X31)
495 #define PORT_PB01B_ADC0_X31                        (_UINT32_(1) << 1)
496 
497 #define PIN_PA03B_ADC0_Y0                          _UINT32_(3)
498 #define MUX_PA03B_ADC0_Y0                          _UINT32_(1)
499 #define PINMUX_PA03B_ADC0_Y0                       ((PIN_PA03B_ADC0_Y0 << 16) | MUX_PA03B_ADC0_Y0)
500 #define PORT_PA03B_ADC0_Y0                         (_UINT32_(1) << 3)
501 
502 #define PIN_PB08B_ADC0_Y1                          _UINT32_(40)
503 #define MUX_PB08B_ADC0_Y1                          _UINT32_(1)
504 #define PINMUX_PB08B_ADC0_Y1                       ((PIN_PB08B_ADC0_Y1 << 16) | MUX_PB08B_ADC0_Y1)
505 #define PORT_PB08B_ADC0_Y1                         (_UINT32_(1) << 8)
506 
507 #define PIN_PB09B_ADC0_Y2                          _UINT32_(41)
508 #define MUX_PB09B_ADC0_Y2                          _UINT32_(1)
509 #define PINMUX_PB09B_ADC0_Y2                       ((PIN_PB09B_ADC0_Y2 << 16) | MUX_PB09B_ADC0_Y2)
510 #define PORT_PB09B_ADC0_Y2                         (_UINT32_(1) << 9)
511 
512 #define PIN_PA04B_ADC0_Y3                          _UINT32_(4)
513 #define MUX_PA04B_ADC0_Y3                          _UINT32_(1)
514 #define PINMUX_PA04B_ADC0_Y3                       ((PIN_PA04B_ADC0_Y3 << 16) | MUX_PA04B_ADC0_Y3)
515 #define PORT_PA04B_ADC0_Y3                         (_UINT32_(1) << 4)
516 
517 #define PIN_PA06B_ADC0_Y4                          _UINT32_(6)
518 #define MUX_PA06B_ADC0_Y4                          _UINT32_(1)
519 #define PINMUX_PA06B_ADC0_Y4                       ((PIN_PA06B_ADC0_Y4 << 16) | MUX_PA06B_ADC0_Y4)
520 #define PORT_PA06B_ADC0_Y4                         (_UINT32_(1) << 6)
521 
522 #define PIN_PA07B_ADC0_Y5                          _UINT32_(7)
523 #define MUX_PA07B_ADC0_Y5                          _UINT32_(1)
524 #define PINMUX_PA07B_ADC0_Y5                       ((PIN_PA07B_ADC0_Y5 << 16) | MUX_PA07B_ADC0_Y5)
525 #define PORT_PA07B_ADC0_Y5                         (_UINT32_(1) << 7)
526 
527 #define PIN_PA08B_ADC0_Y6                          _UINT32_(8)
528 #define MUX_PA08B_ADC0_Y6                          _UINT32_(1)
529 #define PINMUX_PA08B_ADC0_Y6                       ((PIN_PA08B_ADC0_Y6 << 16) | MUX_PA08B_ADC0_Y6)
530 #define PORT_PA08B_ADC0_Y6                         (_UINT32_(1) << 8)
531 
532 #define PIN_PA09B_ADC0_Y7                          _UINT32_(9)
533 #define MUX_PA09B_ADC0_Y7                          _UINT32_(1)
534 #define PINMUX_PA09B_ADC0_Y7                       ((PIN_PA09B_ADC0_Y7 << 16) | MUX_PA09B_ADC0_Y7)
535 #define PORT_PA09B_ADC0_Y7                         (_UINT32_(1) << 9)
536 
537 #define PIN_PA10B_ADC0_Y8                          _UINT32_(10)
538 #define MUX_PA10B_ADC0_Y8                          _UINT32_(1)
539 #define PINMUX_PA10B_ADC0_Y8                       ((PIN_PA10B_ADC0_Y8 << 16) | MUX_PA10B_ADC0_Y8)
540 #define PORT_PA10B_ADC0_Y8                         (_UINT32_(1) << 10)
541 
542 #define PIN_PA11B_ADC0_Y9                          _UINT32_(11)
543 #define MUX_PA11B_ADC0_Y9                          _UINT32_(1)
544 #define PINMUX_PA11B_ADC0_Y9                       ((PIN_PA11B_ADC0_Y9 << 16) | MUX_PA11B_ADC0_Y9)
545 #define PORT_PA11B_ADC0_Y9                         (_UINT32_(1) << 11)
546 
547 #define PIN_PA16B_ADC0_Y10                         _UINT32_(16)
548 #define MUX_PA16B_ADC0_Y10                         _UINT32_(1)
549 #define PINMUX_PA16B_ADC0_Y10                      ((PIN_PA16B_ADC0_Y10 << 16) | MUX_PA16B_ADC0_Y10)
550 #define PORT_PA16B_ADC0_Y10                        (_UINT32_(1) << 16)
551 
552 #define PIN_PA17B_ADC0_Y11                         _UINT32_(17)
553 #define MUX_PA17B_ADC0_Y11                         _UINT32_(1)
554 #define PINMUX_PA17B_ADC0_Y11                      ((PIN_PA17B_ADC0_Y11 << 16) | MUX_PA17B_ADC0_Y11)
555 #define PORT_PA17B_ADC0_Y11                        (_UINT32_(1) << 17)
556 
557 #define PIN_PA18B_ADC0_Y12                         _UINT32_(18)
558 #define MUX_PA18B_ADC0_Y12                         _UINT32_(1)
559 #define PINMUX_PA18B_ADC0_Y12                      ((PIN_PA18B_ADC0_Y12 << 16) | MUX_PA18B_ADC0_Y12)
560 #define PORT_PA18B_ADC0_Y12                        (_UINT32_(1) << 18)
561 
562 #define PIN_PA19B_ADC0_Y13                         _UINT32_(19)
563 #define MUX_PA19B_ADC0_Y13                         _UINT32_(1)
564 #define PINMUX_PA19B_ADC0_Y13                      ((PIN_PA19B_ADC0_Y13 << 16) | MUX_PA19B_ADC0_Y13)
565 #define PORT_PA19B_ADC0_Y13                        (_UINT32_(1) << 19)
566 
567 #define PIN_PA20B_ADC0_Y14                         _UINT32_(20)
568 #define MUX_PA20B_ADC0_Y14                         _UINT32_(1)
569 #define PINMUX_PA20B_ADC0_Y14                      ((PIN_PA20B_ADC0_Y14 << 16) | MUX_PA20B_ADC0_Y14)
570 #define PORT_PA20B_ADC0_Y14                        (_UINT32_(1) << 20)
571 
572 #define PIN_PA21B_ADC0_Y15                         _UINT32_(21)
573 #define MUX_PA21B_ADC0_Y15                         _UINT32_(1)
574 #define PINMUX_PA21B_ADC0_Y15                      ((PIN_PA21B_ADC0_Y15 << 16) | MUX_PA21B_ADC0_Y15)
575 #define PORT_PA21B_ADC0_Y15                        (_UINT32_(1) << 21)
576 
577 #define PIN_PA22B_ADC0_Y16                         _UINT32_(22)
578 #define MUX_PA22B_ADC0_Y16                         _UINT32_(1)
579 #define PINMUX_PA22B_ADC0_Y16                      ((PIN_PA22B_ADC0_Y16 << 16) | MUX_PA22B_ADC0_Y16)
580 #define PORT_PA22B_ADC0_Y16                        (_UINT32_(1) << 22)
581 
582 #define PIN_PA23B_ADC0_Y17                         _UINT32_(23)
583 #define MUX_PA23B_ADC0_Y17                         _UINT32_(1)
584 #define PINMUX_PA23B_ADC0_Y17                      ((PIN_PA23B_ADC0_Y17 << 16) | MUX_PA23B_ADC0_Y17)
585 #define PORT_PA23B_ADC0_Y17                        (_UINT32_(1) << 23)
586 
587 #define PIN_PA27B_ADC0_Y18                         _UINT32_(27)
588 #define MUX_PA27B_ADC0_Y18                         _UINT32_(1)
589 #define PINMUX_PA27B_ADC0_Y18                      ((PIN_PA27B_ADC0_Y18 << 16) | MUX_PA27B_ADC0_Y18)
590 #define PORT_PA27B_ADC0_Y18                        (_UINT32_(1) << 27)
591 
592 #define PIN_PA30B_ADC0_Y19                         _UINT32_(30)
593 #define MUX_PA30B_ADC0_Y19                         _UINT32_(1)
594 #define PINMUX_PA30B_ADC0_Y19                      ((PIN_PA30B_ADC0_Y19 << 16) | MUX_PA30B_ADC0_Y19)
595 #define PORT_PA30B_ADC0_Y19                        (_UINT32_(1) << 30)
596 
597 #define PIN_PB02B_ADC0_Y20                         _UINT32_(34)
598 #define MUX_PB02B_ADC0_Y20                         _UINT32_(1)
599 #define PINMUX_PB02B_ADC0_Y20                      ((PIN_PB02B_ADC0_Y20 << 16) | MUX_PB02B_ADC0_Y20)
600 #define PORT_PB02B_ADC0_Y20                        (_UINT32_(1) << 2)
601 
602 #define PIN_PB03B_ADC0_Y21                         _UINT32_(35)
603 #define MUX_PB03B_ADC0_Y21                         _UINT32_(1)
604 #define PINMUX_PB03B_ADC0_Y21                      ((PIN_PB03B_ADC0_Y21 << 16) | MUX_PB03B_ADC0_Y21)
605 #define PORT_PB03B_ADC0_Y21                        (_UINT32_(1) << 3)
606 
607 #define PIN_PB04B_ADC0_Y22                         _UINT32_(36)
608 #define MUX_PB04B_ADC0_Y22                         _UINT32_(1)
609 #define PINMUX_PB04B_ADC0_Y22                      ((PIN_PB04B_ADC0_Y22 << 16) | MUX_PB04B_ADC0_Y22)
610 #define PORT_PB04B_ADC0_Y22                        (_UINT32_(1) << 4)
611 
612 #define PIN_PB05B_ADC0_Y23                         _UINT32_(37)
613 #define MUX_PB05B_ADC0_Y23                         _UINT32_(1)
614 #define PINMUX_PB05B_ADC0_Y23                      ((PIN_PB05B_ADC0_Y23 << 16) | MUX_PB05B_ADC0_Y23)
615 #define PORT_PB05B_ADC0_Y23                        (_UINT32_(1) << 5)
616 
617 #define PIN_PB06B_ADC0_Y24                         _UINT32_(38)
618 #define MUX_PB06B_ADC0_Y24                         _UINT32_(1)
619 #define PINMUX_PB06B_ADC0_Y24                      ((PIN_PB06B_ADC0_Y24 << 16) | MUX_PB06B_ADC0_Y24)
620 #define PORT_PB06B_ADC0_Y24                        (_UINT32_(1) << 6)
621 
622 #define PIN_PB07B_ADC0_Y25                         _UINT32_(39)
623 #define MUX_PB07B_ADC0_Y25                         _UINT32_(1)
624 #define PINMUX_PB07B_ADC0_Y25                      ((PIN_PB07B_ADC0_Y25 << 16) | MUX_PB07B_ADC0_Y25)
625 #define PORT_PB07B_ADC0_Y25                        (_UINT32_(1) << 7)
626 
627 #define PIN_PB12B_ADC0_Y26                         _UINT32_(44)
628 #define MUX_PB12B_ADC0_Y26                         _UINT32_(1)
629 #define PINMUX_PB12B_ADC0_Y26                      ((PIN_PB12B_ADC0_Y26 << 16) | MUX_PB12B_ADC0_Y26)
630 #define PORT_PB12B_ADC0_Y26                        (_UINT32_(1) << 12)
631 
632 #define PIN_PB13B_ADC0_Y27                         _UINT32_(45)
633 #define MUX_PB13B_ADC0_Y27                         _UINT32_(1)
634 #define PINMUX_PB13B_ADC0_Y27                      ((PIN_PB13B_ADC0_Y27 << 16) | MUX_PB13B_ADC0_Y27)
635 #define PORT_PB13B_ADC0_Y27                        (_UINT32_(1) << 13)
636 
637 #define PIN_PB14B_ADC0_Y28                         _UINT32_(46)
638 #define MUX_PB14B_ADC0_Y28                         _UINT32_(1)
639 #define PINMUX_PB14B_ADC0_Y28                      ((PIN_PB14B_ADC0_Y28 << 16) | MUX_PB14B_ADC0_Y28)
640 #define PORT_PB14B_ADC0_Y28                        (_UINT32_(1) << 14)
641 
642 #define PIN_PB15B_ADC0_Y29                         _UINT32_(47)
643 #define MUX_PB15B_ADC0_Y29                         _UINT32_(1)
644 #define PINMUX_PB15B_ADC0_Y29                      ((PIN_PB15B_ADC0_Y29 << 16) | MUX_PB15B_ADC0_Y29)
645 #define PORT_PB15B_ADC0_Y29                        (_UINT32_(1) << 15)
646 
647 #define PIN_PB00B_ADC0_Y30                         _UINT32_(32)
648 #define MUX_PB00B_ADC0_Y30                         _UINT32_(1)
649 #define PINMUX_PB00B_ADC0_Y30                      ((PIN_PB00B_ADC0_Y30 << 16) | MUX_PB00B_ADC0_Y30)
650 #define PORT_PB00B_ADC0_Y30                        (_UINT32_(1) << 0)
651 
652 #define PIN_PB01B_ADC0_Y31                         _UINT32_(33)
653 #define MUX_PB01B_ADC0_Y31                         _UINT32_(1)
654 #define PINMUX_PB01B_ADC0_Y31                      ((PIN_PB01B_ADC0_Y31 << 16) | MUX_PB01B_ADC0_Y31)
655 #define PORT_PB01B_ADC0_Y31                        (_UINT32_(1) << 1)
656 
657 /* ================== PORT definition for ADC1 peripheral =================== */
658 #define PIN_PB08B_ADC1_AIN0                        _UINT32_(40)
659 #define MUX_PB08B_ADC1_AIN0                        _UINT32_(1)
660 #define PINMUX_PB08B_ADC1_AIN0                     ((PIN_PB08B_ADC1_AIN0 << 16) | MUX_PB08B_ADC1_AIN0)
661 #define PORT_PB08B_ADC1_AIN0                       (_UINT32_(1) << 8)
662 
663 #define PIN_PB09B_ADC1_AIN1                        _UINT32_(41)
664 #define MUX_PB09B_ADC1_AIN1                        _UINT32_(1)
665 #define PINMUX_PB09B_ADC1_AIN1                     ((PIN_PB09B_ADC1_AIN1 << 16) | MUX_PB09B_ADC1_AIN1)
666 #define PORT_PB09B_ADC1_AIN1                       (_UINT32_(1) << 9)
667 
668 #define PIN_PA08B_ADC1_AIN2                        _UINT32_(8)
669 #define MUX_PA08B_ADC1_AIN2                        _UINT32_(1)
670 #define PINMUX_PA08B_ADC1_AIN2                     ((PIN_PA08B_ADC1_AIN2 << 16) | MUX_PA08B_ADC1_AIN2)
671 #define PORT_PA08B_ADC1_AIN2                       (_UINT32_(1) << 8)
672 
673 #define PIN_PA09B_ADC1_AIN3                        _UINT32_(9)
674 #define MUX_PA09B_ADC1_AIN3                        _UINT32_(1)
675 #define PINMUX_PA09B_ADC1_AIN3                     ((PIN_PA09B_ADC1_AIN3 << 16) | MUX_PA09B_ADC1_AIN3)
676 #define PORT_PA09B_ADC1_AIN3                       (_UINT32_(1) << 9)
677 
678 #define PIN_PC02B_ADC1_AIN4                        _UINT32_(66)
679 #define MUX_PC02B_ADC1_AIN4                        _UINT32_(1)
680 #define PINMUX_PC02B_ADC1_AIN4                     ((PIN_PC02B_ADC1_AIN4 << 16) | MUX_PC02B_ADC1_AIN4)
681 #define PORT_PC02B_ADC1_AIN4                       (_UINT32_(1) << 2)
682 
683 #define PIN_PC03B_ADC1_AIN5                        _UINT32_(67)
684 #define MUX_PC03B_ADC1_AIN5                        _UINT32_(1)
685 #define PINMUX_PC03B_ADC1_AIN5                     ((PIN_PC03B_ADC1_AIN5 << 16) | MUX_PC03B_ADC1_AIN5)
686 #define PORT_PC03B_ADC1_AIN5                       (_UINT32_(1) << 3)
687 
688 #define PIN_PB04B_ADC1_AIN6                        _UINT32_(36)
689 #define MUX_PB04B_ADC1_AIN6                        _UINT32_(1)
690 #define PINMUX_PB04B_ADC1_AIN6                     ((PIN_PB04B_ADC1_AIN6 << 16) | MUX_PB04B_ADC1_AIN6)
691 #define PORT_PB04B_ADC1_AIN6                       (_UINT32_(1) << 4)
692 
693 #define PIN_PB05B_ADC1_AIN7                        _UINT32_(37)
694 #define MUX_PB05B_ADC1_AIN7                        _UINT32_(1)
695 #define PINMUX_PB05B_ADC1_AIN7                     ((PIN_PB05B_ADC1_AIN7 << 16) | MUX_PB05B_ADC1_AIN7)
696 #define PORT_PB05B_ADC1_AIN7                       (_UINT32_(1) << 5)
697 
698 #define PIN_PB06B_ADC1_AIN8                        _UINT32_(38)
699 #define MUX_PB06B_ADC1_AIN8                        _UINT32_(1)
700 #define PINMUX_PB06B_ADC1_AIN8                     ((PIN_PB06B_ADC1_AIN8 << 16) | MUX_PB06B_ADC1_AIN8)
701 #define PORT_PB06B_ADC1_AIN8                       (_UINT32_(1) << 6)
702 
703 #define PIN_PB07B_ADC1_AIN9                        _UINT32_(39)
704 #define MUX_PB07B_ADC1_AIN9                        _UINT32_(1)
705 #define PINMUX_PB07B_ADC1_AIN9                     ((PIN_PB07B_ADC1_AIN9 << 16) | MUX_PB07B_ADC1_AIN9)
706 #define PORT_PB07B_ADC1_AIN9                       (_UINT32_(1) << 7)
707 
708 #define PIN_PC00B_ADC1_AIN10                       _UINT32_(64)
709 #define MUX_PC00B_ADC1_AIN10                       _UINT32_(1)
710 #define PINMUX_PC00B_ADC1_AIN10                    ((PIN_PC00B_ADC1_AIN10 << 16) | MUX_PC00B_ADC1_AIN10)
711 #define PORT_PC00B_ADC1_AIN10                      (_UINT32_(1) << 0)
712 
713 #define PIN_PC01B_ADC1_AIN11                       _UINT32_(65)
714 #define MUX_PC01B_ADC1_AIN11                       _UINT32_(1)
715 #define PINMUX_PC01B_ADC1_AIN11                    ((PIN_PC01B_ADC1_AIN11 << 16) | MUX_PC01B_ADC1_AIN11)
716 #define PORT_PC01B_ADC1_AIN11                      (_UINT32_(1) << 1)
717 
718 /* ================== PORT definition for CAN0 peripheral =================== */
719 #define PIN_PA23I_CAN0_RX                          _UINT32_(23)
720 #define MUX_PA23I_CAN0_RX                          _UINT32_(8)
721 #define PINMUX_PA23I_CAN0_RX                       ((PIN_PA23I_CAN0_RX << 16) | MUX_PA23I_CAN0_RX)
722 #define PORT_PA23I_CAN0_RX                         (_UINT32_(1) << 23)
723 
724 #define PIN_PA25I_CAN0_RX                          _UINT32_(25)
725 #define MUX_PA25I_CAN0_RX                          _UINT32_(8)
726 #define PINMUX_PA25I_CAN0_RX                       ((PIN_PA25I_CAN0_RX << 16) | MUX_PA25I_CAN0_RX)
727 #define PORT_PA25I_CAN0_RX                         (_UINT32_(1) << 25)
728 
729 #define PIN_PA22I_CAN0_TX                          _UINT32_(22)
730 #define MUX_PA22I_CAN0_TX                          _UINT32_(8)
731 #define PINMUX_PA22I_CAN0_TX                       ((PIN_PA22I_CAN0_TX << 16) | MUX_PA22I_CAN0_TX)
732 #define PORT_PA22I_CAN0_TX                         (_UINT32_(1) << 22)
733 
734 #define PIN_PA24I_CAN0_TX                          _UINT32_(24)
735 #define MUX_PA24I_CAN0_TX                          _UINT32_(8)
736 #define PINMUX_PA24I_CAN0_TX                       ((PIN_PA24I_CAN0_TX << 16) | MUX_PA24I_CAN0_TX)
737 #define PORT_PA24I_CAN0_TX                         (_UINT32_(1) << 24)
738 
739 /* ================== PORT definition for CAN1 peripheral =================== */
740 #define PIN_PB13H_CAN1_RX                          _UINT32_(45)
741 #define MUX_PB13H_CAN1_RX                          _UINT32_(7)
742 #define PINMUX_PB13H_CAN1_RX                       ((PIN_PB13H_CAN1_RX << 16) | MUX_PB13H_CAN1_RX)
743 #define PORT_PB13H_CAN1_RX                         (_UINT32_(1) << 13)
744 
745 #define PIN_PB15H_CAN1_RX                          _UINT32_(47)
746 #define MUX_PB15H_CAN1_RX                          _UINT32_(7)
747 #define PINMUX_PB15H_CAN1_RX                       ((PIN_PB15H_CAN1_RX << 16) | MUX_PB15H_CAN1_RX)
748 #define PORT_PB15H_CAN1_RX                         (_UINT32_(1) << 15)
749 
750 #define PIN_PB12H_CAN1_TX                          _UINT32_(44)
751 #define MUX_PB12H_CAN1_TX                          _UINT32_(7)
752 #define PINMUX_PB12H_CAN1_TX                       ((PIN_PB12H_CAN1_TX << 16) | MUX_PB12H_CAN1_TX)
753 #define PORT_PB12H_CAN1_TX                         (_UINT32_(1) << 12)
754 
755 #define PIN_PB14H_CAN1_TX                          _UINT32_(46)
756 #define MUX_PB14H_CAN1_TX                          _UINT32_(7)
757 #define PINMUX_PB14H_CAN1_TX                       ((PIN_PB14H_CAN1_TX << 16) | MUX_PB14H_CAN1_TX)
758 #define PORT_PB14H_CAN1_TX                         (_UINT32_(1) << 14)
759 
760 /* =================== PORT definition for CCL peripheral =================== */
761 #define PIN_PA04N_CCL_IN0                          _UINT32_(4)
762 #define MUX_PA04N_CCL_IN0                          _UINT32_(13)
763 #define PINMUX_PA04N_CCL_IN0                       ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
764 #define PORT_PA04N_CCL_IN0                         (_UINT32_(1) << 4)
765 
766 #define PIN_PA16N_CCL_IN0                          _UINT32_(16)
767 #define MUX_PA16N_CCL_IN0                          _UINT32_(13)
768 #define PINMUX_PA16N_CCL_IN0                       ((PIN_PA16N_CCL_IN0 << 16) | MUX_PA16N_CCL_IN0)
769 #define PORT_PA16N_CCL_IN0                         (_UINT32_(1) << 16)
770 
771 #define PIN_PB22N_CCL_IN0                          _UINT32_(54)
772 #define MUX_PB22N_CCL_IN0                          _UINT32_(13)
773 #define PINMUX_PB22N_CCL_IN0                       ((PIN_PB22N_CCL_IN0 << 16) | MUX_PB22N_CCL_IN0)
774 #define PORT_PB22N_CCL_IN0                         (_UINT32_(1) << 22)
775 
776 #define PIN_PA05N_CCL_IN1                          _UINT32_(5)
777 #define MUX_PA05N_CCL_IN1                          _UINT32_(13)
778 #define PINMUX_PA05N_CCL_IN1                       ((PIN_PA05N_CCL_IN1 << 16) | MUX_PA05N_CCL_IN1)
779 #define PORT_PA05N_CCL_IN1                         (_UINT32_(1) << 5)
780 
781 #define PIN_PA17N_CCL_IN1                          _UINT32_(17)
782 #define MUX_PA17N_CCL_IN1                          _UINT32_(13)
783 #define PINMUX_PA17N_CCL_IN1                       ((PIN_PA17N_CCL_IN1 << 16) | MUX_PA17N_CCL_IN1)
784 #define PORT_PA17N_CCL_IN1                         (_UINT32_(1) << 17)
785 
786 #define PIN_PB00N_CCL_IN1                          _UINT32_(32)
787 #define MUX_PB00N_CCL_IN1                          _UINT32_(13)
788 #define PINMUX_PB00N_CCL_IN1                       ((PIN_PB00N_CCL_IN1 << 16) | MUX_PB00N_CCL_IN1)
789 #define PORT_PB00N_CCL_IN1                         (_UINT32_(1) << 0)
790 
791 #define PIN_PA06N_CCL_IN2                          _UINT32_(6)
792 #define MUX_PA06N_CCL_IN2                          _UINT32_(13)
793 #define PINMUX_PA06N_CCL_IN2                       ((PIN_PA06N_CCL_IN2 << 16) | MUX_PA06N_CCL_IN2)
794 #define PORT_PA06N_CCL_IN2                         (_UINT32_(1) << 6)
795 
796 #define PIN_PA18N_CCL_IN2                          _UINT32_(18)
797 #define MUX_PA18N_CCL_IN2                          _UINT32_(13)
798 #define PINMUX_PA18N_CCL_IN2                       ((PIN_PA18N_CCL_IN2 << 16) | MUX_PA18N_CCL_IN2)
799 #define PORT_PA18N_CCL_IN2                         (_UINT32_(1) << 18)
800 
801 #define PIN_PB01N_CCL_IN2                          _UINT32_(33)
802 #define MUX_PB01N_CCL_IN2                          _UINT32_(13)
803 #define PINMUX_PB01N_CCL_IN2                       ((PIN_PB01N_CCL_IN2 << 16) | MUX_PB01N_CCL_IN2)
804 #define PORT_PB01N_CCL_IN2                         (_UINT32_(1) << 1)
805 
806 #define PIN_PA08N_CCL_IN3                          _UINT32_(8)
807 #define MUX_PA08N_CCL_IN3                          _UINT32_(13)
808 #define PINMUX_PA08N_CCL_IN3                       ((PIN_PA08N_CCL_IN3 << 16) | MUX_PA08N_CCL_IN3)
809 #define PORT_PA08N_CCL_IN3                         (_UINT32_(1) << 8)
810 
811 #define PIN_PA30N_CCL_IN3                          _UINT32_(30)
812 #define MUX_PA30N_CCL_IN3                          _UINT32_(13)
813 #define PINMUX_PA30N_CCL_IN3                       ((PIN_PA30N_CCL_IN3 << 16) | MUX_PA30N_CCL_IN3)
814 #define PORT_PA30N_CCL_IN3                         (_UINT32_(1) << 30)
815 
816 #define PIN_PA09N_CCL_IN4                          _UINT32_(9)
817 #define MUX_PA09N_CCL_IN4                          _UINT32_(13)
818 #define PINMUX_PA09N_CCL_IN4                       ((PIN_PA09N_CCL_IN4 << 16) | MUX_PA09N_CCL_IN4)
819 #define PORT_PA09N_CCL_IN4                         (_UINT32_(1) << 9)
820 
821 #define PIN_PC27N_CCL_IN4                          _UINT32_(91)
822 #define MUX_PC27N_CCL_IN4                          _UINT32_(13)
823 #define PINMUX_PC27N_CCL_IN4                       ((PIN_PC27N_CCL_IN4 << 16) | MUX_PC27N_CCL_IN4)
824 #define PORT_PC27N_CCL_IN4                         (_UINT32_(1) << 27)
825 
826 #define PIN_PA10N_CCL_IN5                          _UINT32_(10)
827 #define MUX_PA10N_CCL_IN5                          _UINT32_(13)
828 #define PINMUX_PA10N_CCL_IN5                       ((PIN_PA10N_CCL_IN5 << 16) | MUX_PA10N_CCL_IN5)
829 #define PORT_PA10N_CCL_IN5                         (_UINT32_(1) << 10)
830 
831 #define PIN_PC28N_CCL_IN5                          _UINT32_(92)
832 #define MUX_PC28N_CCL_IN5                          _UINT32_(13)
833 #define PINMUX_PC28N_CCL_IN5                       ((PIN_PC28N_CCL_IN5 << 16) | MUX_PC28N_CCL_IN5)
834 #define PORT_PC28N_CCL_IN5                         (_UINT32_(1) << 28)
835 
836 #define PIN_PA22N_CCL_IN6                          _UINT32_(22)
837 #define MUX_PA22N_CCL_IN6                          _UINT32_(13)
838 #define PINMUX_PA22N_CCL_IN6                       ((PIN_PA22N_CCL_IN6 << 16) | MUX_PA22N_CCL_IN6)
839 #define PORT_PA22N_CCL_IN6                         (_UINT32_(1) << 22)
840 
841 #define PIN_PB06N_CCL_IN6                          _UINT32_(38)
842 #define MUX_PB06N_CCL_IN6                          _UINT32_(13)
843 #define PINMUX_PB06N_CCL_IN6                       ((PIN_PB06N_CCL_IN6 << 16) | MUX_PB06N_CCL_IN6)
844 #define PORT_PB06N_CCL_IN6                         (_UINT32_(1) << 6)
845 
846 #define PIN_PA23N_CCL_IN7                          _UINT32_(23)
847 #define MUX_PA23N_CCL_IN7                          _UINT32_(13)
848 #define PINMUX_PA23N_CCL_IN7                       ((PIN_PA23N_CCL_IN7 << 16) | MUX_PA23N_CCL_IN7)
849 #define PORT_PA23N_CCL_IN7                         (_UINT32_(1) << 23)
850 
851 #define PIN_PB07N_CCL_IN7                          _UINT32_(39)
852 #define MUX_PB07N_CCL_IN7                          _UINT32_(13)
853 #define PINMUX_PB07N_CCL_IN7                       ((PIN_PB07N_CCL_IN7 << 16) | MUX_PB07N_CCL_IN7)
854 #define PORT_PB07N_CCL_IN7                         (_UINT32_(1) << 7)
855 
856 #define PIN_PA24N_CCL_IN8                          _UINT32_(24)
857 #define MUX_PA24N_CCL_IN8                          _UINT32_(13)
858 #define PINMUX_PA24N_CCL_IN8                       ((PIN_PA24N_CCL_IN8 << 16) | MUX_PA24N_CCL_IN8)
859 #define PORT_PA24N_CCL_IN8                         (_UINT32_(1) << 24)
860 
861 #define PIN_PB08N_CCL_IN8                          _UINT32_(40)
862 #define MUX_PB08N_CCL_IN8                          _UINT32_(13)
863 #define PINMUX_PB08N_CCL_IN8                       ((PIN_PB08N_CCL_IN8 << 16) | MUX_PB08N_CCL_IN8)
864 #define PORT_PB08N_CCL_IN8                         (_UINT32_(1) << 8)
865 
866 #define PIN_PB14N_CCL_IN9                          _UINT32_(46)
867 #define MUX_PB14N_CCL_IN9                          _UINT32_(13)
868 #define PINMUX_PB14N_CCL_IN9                       ((PIN_PB14N_CCL_IN9 << 16) | MUX_PB14N_CCL_IN9)
869 #define PORT_PB14N_CCL_IN9                         (_UINT32_(1) << 14)
870 
871 #define PIN_PC20N_CCL_IN9                          _UINT32_(84)
872 #define MUX_PC20N_CCL_IN9                          _UINT32_(13)
873 #define PINMUX_PC20N_CCL_IN9                       ((PIN_PC20N_CCL_IN9 << 16) | MUX_PC20N_CCL_IN9)
874 #define PORT_PC20N_CCL_IN9                         (_UINT32_(1) << 20)
875 
876 #define PIN_PB15N_CCL_IN10                         _UINT32_(47)
877 #define MUX_PB15N_CCL_IN10                         _UINT32_(13)
878 #define PINMUX_PB15N_CCL_IN10                      ((PIN_PB15N_CCL_IN10 << 16) | MUX_PB15N_CCL_IN10)
879 #define PORT_PB15N_CCL_IN10                        (_UINT32_(1) << 15)
880 
881 #define PIN_PC21N_CCL_IN10                         _UINT32_(85)
882 #define MUX_PC21N_CCL_IN10                         _UINT32_(13)
883 #define PINMUX_PC21N_CCL_IN10                      ((PIN_PC21N_CCL_IN10 << 16) | MUX_PC21N_CCL_IN10)
884 #define PORT_PC21N_CCL_IN10                        (_UINT32_(1) << 21)
885 
886 #define PIN_PB10N_CCL_IN11                         _UINT32_(42)
887 #define MUX_PB10N_CCL_IN11                         _UINT32_(13)
888 #define PINMUX_PB10N_CCL_IN11                      ((PIN_PB10N_CCL_IN11 << 16) | MUX_PB10N_CCL_IN11)
889 #define PORT_PB10N_CCL_IN11                        (_UINT32_(1) << 10)
890 
891 #define PIN_PB16N_CCL_IN11                         _UINT32_(48)
892 #define MUX_PB16N_CCL_IN11                         _UINT32_(13)
893 #define PINMUX_PB16N_CCL_IN11                      ((PIN_PB16N_CCL_IN11 << 16) | MUX_PB16N_CCL_IN11)
894 #define PORT_PB16N_CCL_IN11                        (_UINT32_(1) << 16)
895 
896 #define PIN_PA07N_CCL_OUT0                         _UINT32_(7)
897 #define MUX_PA07N_CCL_OUT0                         _UINT32_(13)
898 #define PINMUX_PA07N_CCL_OUT0                      ((PIN_PA07N_CCL_OUT0 << 16) | MUX_PA07N_CCL_OUT0)
899 #define PORT_PA07N_CCL_OUT0                        (_UINT32_(1) << 7)
900 
901 #define PIN_PA19N_CCL_OUT0                         _UINT32_(19)
902 #define MUX_PA19N_CCL_OUT0                         _UINT32_(13)
903 #define PINMUX_PA19N_CCL_OUT0                      ((PIN_PA19N_CCL_OUT0 << 16) | MUX_PA19N_CCL_OUT0)
904 #define PORT_PA19N_CCL_OUT0                        (_UINT32_(1) << 19)
905 
906 #define PIN_PB02N_CCL_OUT0                         _UINT32_(34)
907 #define MUX_PB02N_CCL_OUT0                         _UINT32_(13)
908 #define PINMUX_PB02N_CCL_OUT0                      ((PIN_PB02N_CCL_OUT0 << 16) | MUX_PB02N_CCL_OUT0)
909 #define PORT_PB02N_CCL_OUT0                        (_UINT32_(1) << 2)
910 
911 #define PIN_PB23N_CCL_OUT0                         _UINT32_(55)
912 #define MUX_PB23N_CCL_OUT0                         _UINT32_(13)
913 #define PINMUX_PB23N_CCL_OUT0                      ((PIN_PB23N_CCL_OUT0 << 16) | MUX_PB23N_CCL_OUT0)
914 #define PORT_PB23N_CCL_OUT0                        (_UINT32_(1) << 23)
915 
916 #define PIN_PA11N_CCL_OUT1                         _UINT32_(11)
917 #define MUX_PA11N_CCL_OUT1                         _UINT32_(13)
918 #define PINMUX_PA11N_CCL_OUT1                      ((PIN_PA11N_CCL_OUT1 << 16) | MUX_PA11N_CCL_OUT1)
919 #define PORT_PA11N_CCL_OUT1                        (_UINT32_(1) << 11)
920 
921 #define PIN_PA31N_CCL_OUT1                         _UINT32_(31)
922 #define MUX_PA31N_CCL_OUT1                         _UINT32_(13)
923 #define PINMUX_PA31N_CCL_OUT1                      ((PIN_PA31N_CCL_OUT1 << 16) | MUX_PA31N_CCL_OUT1)
924 #define PORT_PA31N_CCL_OUT1                        (_UINT32_(1) << 31)
925 
926 #define PIN_PB11N_CCL_OUT1                         _UINT32_(43)
927 #define MUX_PB11N_CCL_OUT1                         _UINT32_(13)
928 #define PINMUX_PB11N_CCL_OUT1                      ((PIN_PB11N_CCL_OUT1 << 16) | MUX_PB11N_CCL_OUT1)
929 #define PORT_PB11N_CCL_OUT1                        (_UINT32_(1) << 11)
930 
931 #define PIN_PA25N_CCL_OUT2                         _UINT32_(25)
932 #define MUX_PA25N_CCL_OUT2                         _UINT32_(13)
933 #define PINMUX_PA25N_CCL_OUT2                      ((PIN_PA25N_CCL_OUT2 << 16) | MUX_PA25N_CCL_OUT2)
934 #define PORT_PA25N_CCL_OUT2                        (_UINT32_(1) << 25)
935 
936 #define PIN_PB09N_CCL_OUT2                         _UINT32_(41)
937 #define MUX_PB09N_CCL_OUT2                         _UINT32_(13)
938 #define PINMUX_PB09N_CCL_OUT2                      ((PIN_PB09N_CCL_OUT2 << 16) | MUX_PB09N_CCL_OUT2)
939 #define PORT_PB09N_CCL_OUT2                        (_UINT32_(1) << 9)
940 
941 #define PIN_PB17N_CCL_OUT3                         _UINT32_(49)
942 #define MUX_PB17N_CCL_OUT3                         _UINT32_(13)
943 #define PINMUX_PB17N_CCL_OUT3                      ((PIN_PB17N_CCL_OUT3 << 16) | MUX_PB17N_CCL_OUT3)
944 #define PORT_PB17N_CCL_OUT3                        (_UINT32_(1) << 17)
945 
946 /* =================== PORT definition for DAC peripheral =================== */
947 #define PIN_PA02B_DAC_VOUT0                        _UINT32_(2)
948 #define MUX_PA02B_DAC_VOUT0                        _UINT32_(1)
949 #define PINMUX_PA02B_DAC_VOUT0                     ((PIN_PA02B_DAC_VOUT0 << 16) | MUX_PA02B_DAC_VOUT0)
950 #define PORT_PA02B_DAC_VOUT0                       (_UINT32_(1) << 2)
951 
952 #define PIN_PA05B_DAC_VOUT1                        _UINT32_(5)
953 #define MUX_PA05B_DAC_VOUT1                        _UINT32_(1)
954 #define PINMUX_PA05B_DAC_VOUT1                     ((PIN_PA05B_DAC_VOUT1 << 16) | MUX_PA05B_DAC_VOUT1)
955 #define PORT_PA05B_DAC_VOUT1                       (_UINT32_(1) << 5)
956 
957 /* =================== PORT definition for EIC peripheral =================== */
958 #define PIN_PA00A_EIC_EXTINT0                      _UINT32_(0)
959 #define MUX_PA00A_EIC_EXTINT0                      _UINT32_(0)
960 #define PINMUX_PA00A_EIC_EXTINT0                   ((PIN_PA00A_EIC_EXTINT0 << 16) | MUX_PA00A_EIC_EXTINT0)
961 #define PORT_PA00A_EIC_EXTINT0                     (_UINT32_(1) << 0)
962 #define PIN_PA00A_EIC_EXTINT_NUM                   _UINT32_(0)  /* EIC signal: PIN_PA00 External Interrupt Line */
963 
964 #define PIN_PA16A_EIC_EXTINT0                      _UINT32_(16)
965 #define MUX_PA16A_EIC_EXTINT0                      _UINT32_(0)
966 #define PINMUX_PA16A_EIC_EXTINT0                   ((PIN_PA16A_EIC_EXTINT0 << 16) | MUX_PA16A_EIC_EXTINT0)
967 #define PORT_PA16A_EIC_EXTINT0                     (_UINT32_(1) << 16)
968 #define PIN_PA16A_EIC_EXTINT_NUM                   _UINT32_(0)  /* EIC signal: PIN_PA16 External Interrupt Line */
969 
970 #define PIN_PB00A_EIC_EXTINT0                      _UINT32_(32)
971 #define MUX_PB00A_EIC_EXTINT0                      _UINT32_(0)
972 #define PINMUX_PB00A_EIC_EXTINT0                   ((PIN_PB00A_EIC_EXTINT0 << 16) | MUX_PB00A_EIC_EXTINT0)
973 #define PORT_PB00A_EIC_EXTINT0                     (_UINT32_(1) << 0)
974 #define PIN_PB00A_EIC_EXTINT_NUM                   _UINT32_(0)  /* EIC signal: PIN_PB00 External Interrupt Line */
975 
976 #define PIN_PB16A_EIC_EXTINT0                      _UINT32_(48)
977 #define MUX_PB16A_EIC_EXTINT0                      _UINT32_(0)
978 #define PINMUX_PB16A_EIC_EXTINT0                   ((PIN_PB16A_EIC_EXTINT0 << 16) | MUX_PB16A_EIC_EXTINT0)
979 #define PORT_PB16A_EIC_EXTINT0                     (_UINT32_(1) << 16)
980 #define PIN_PB16A_EIC_EXTINT_NUM                   _UINT32_(0)  /* EIC signal: PIN_PB16 External Interrupt Line */
981 
982 #define PIN_PC00A_EIC_EXTINT0                      _UINT32_(64)
983 #define MUX_PC00A_EIC_EXTINT0                      _UINT32_(0)
984 #define PINMUX_PC00A_EIC_EXTINT0                   ((PIN_PC00A_EIC_EXTINT0 << 16) | MUX_PC00A_EIC_EXTINT0)
985 #define PORT_PC00A_EIC_EXTINT0                     (_UINT32_(1) << 0)
986 #define PIN_PC00A_EIC_EXTINT_NUM                   _UINT32_(0)  /* EIC signal: PIN_PC00 External Interrupt Line */
987 
988 #define PIN_PC16A_EIC_EXTINT0                      _UINT32_(80)
989 #define MUX_PC16A_EIC_EXTINT0                      _UINT32_(0)
990 #define PINMUX_PC16A_EIC_EXTINT0                   ((PIN_PC16A_EIC_EXTINT0 << 16) | MUX_PC16A_EIC_EXTINT0)
991 #define PORT_PC16A_EIC_EXTINT0                     (_UINT32_(1) << 16)
992 #define PIN_PC16A_EIC_EXTINT_NUM                   _UINT32_(0)  /* EIC signal: PIN_PC16 External Interrupt Line */
993 
994 #define PIN_PA01A_EIC_EXTINT1                      _UINT32_(1)
995 #define MUX_PA01A_EIC_EXTINT1                      _UINT32_(0)
996 #define PINMUX_PA01A_EIC_EXTINT1                   ((PIN_PA01A_EIC_EXTINT1 << 16) | MUX_PA01A_EIC_EXTINT1)
997 #define PORT_PA01A_EIC_EXTINT1                     (_UINT32_(1) << 1)
998 #define PIN_PA01A_EIC_EXTINT_NUM                   _UINT32_(1)  /* EIC signal: PIN_PA01 External Interrupt Line */
999 
1000 #define PIN_PA17A_EIC_EXTINT1                      _UINT32_(17)
1001 #define MUX_PA17A_EIC_EXTINT1                      _UINT32_(0)
1002 #define PINMUX_PA17A_EIC_EXTINT1                   ((PIN_PA17A_EIC_EXTINT1 << 16) | MUX_PA17A_EIC_EXTINT1)
1003 #define PORT_PA17A_EIC_EXTINT1                     (_UINT32_(1) << 17)
1004 #define PIN_PA17A_EIC_EXTINT_NUM                   _UINT32_(1)  /* EIC signal: PIN_PA17 External Interrupt Line */
1005 
1006 #define PIN_PB01A_EIC_EXTINT1                      _UINT32_(33)
1007 #define MUX_PB01A_EIC_EXTINT1                      _UINT32_(0)
1008 #define PINMUX_PB01A_EIC_EXTINT1                   ((PIN_PB01A_EIC_EXTINT1 << 16) | MUX_PB01A_EIC_EXTINT1)
1009 #define PORT_PB01A_EIC_EXTINT1                     (_UINT32_(1) << 1)
1010 #define PIN_PB01A_EIC_EXTINT_NUM                   _UINT32_(1)  /* EIC signal: PIN_PB01 External Interrupt Line */
1011 
1012 #define PIN_PB17A_EIC_EXTINT1                      _UINT32_(49)
1013 #define MUX_PB17A_EIC_EXTINT1                      _UINT32_(0)
1014 #define PINMUX_PB17A_EIC_EXTINT1                   ((PIN_PB17A_EIC_EXTINT1 << 16) | MUX_PB17A_EIC_EXTINT1)
1015 #define PORT_PB17A_EIC_EXTINT1                     (_UINT32_(1) << 17)
1016 #define PIN_PB17A_EIC_EXTINT_NUM                   _UINT32_(1)  /* EIC signal: PIN_PB17 External Interrupt Line */
1017 
1018 #define PIN_PC01A_EIC_EXTINT1                      _UINT32_(65)
1019 #define MUX_PC01A_EIC_EXTINT1                      _UINT32_(0)
1020 #define PINMUX_PC01A_EIC_EXTINT1                   ((PIN_PC01A_EIC_EXTINT1 << 16) | MUX_PC01A_EIC_EXTINT1)
1021 #define PORT_PC01A_EIC_EXTINT1                     (_UINT32_(1) << 1)
1022 #define PIN_PC01A_EIC_EXTINT_NUM                   _UINT32_(1)  /* EIC signal: PIN_PC01 External Interrupt Line */
1023 
1024 #define PIN_PC17A_EIC_EXTINT1                      _UINT32_(81)
1025 #define MUX_PC17A_EIC_EXTINT1                      _UINT32_(0)
1026 #define PINMUX_PC17A_EIC_EXTINT1                   ((PIN_PC17A_EIC_EXTINT1 << 16) | MUX_PC17A_EIC_EXTINT1)
1027 #define PORT_PC17A_EIC_EXTINT1                     (_UINT32_(1) << 17)
1028 #define PIN_PC17A_EIC_EXTINT_NUM                   _UINT32_(1)  /* EIC signal: PIN_PC17 External Interrupt Line */
1029 
1030 #define PIN_PA02A_EIC_EXTINT2                      _UINT32_(2)
1031 #define MUX_PA02A_EIC_EXTINT2                      _UINT32_(0)
1032 #define PINMUX_PA02A_EIC_EXTINT2                   ((PIN_PA02A_EIC_EXTINT2 << 16) | MUX_PA02A_EIC_EXTINT2)
1033 #define PORT_PA02A_EIC_EXTINT2                     (_UINT32_(1) << 2)
1034 #define PIN_PA02A_EIC_EXTINT_NUM                   _UINT32_(2)  /* EIC signal: PIN_PA02 External Interrupt Line */
1035 
1036 #define PIN_PA18A_EIC_EXTINT2                      _UINT32_(18)
1037 #define MUX_PA18A_EIC_EXTINT2                      _UINT32_(0)
1038 #define PINMUX_PA18A_EIC_EXTINT2                   ((PIN_PA18A_EIC_EXTINT2 << 16) | MUX_PA18A_EIC_EXTINT2)
1039 #define PORT_PA18A_EIC_EXTINT2                     (_UINT32_(1) << 18)
1040 #define PIN_PA18A_EIC_EXTINT_NUM                   _UINT32_(2)  /* EIC signal: PIN_PA18 External Interrupt Line */
1041 
1042 #define PIN_PB02A_EIC_EXTINT2                      _UINT32_(34)
1043 #define MUX_PB02A_EIC_EXTINT2                      _UINT32_(0)
1044 #define PINMUX_PB02A_EIC_EXTINT2                   ((PIN_PB02A_EIC_EXTINT2 << 16) | MUX_PB02A_EIC_EXTINT2)
1045 #define PORT_PB02A_EIC_EXTINT2                     (_UINT32_(1) << 2)
1046 #define PIN_PB02A_EIC_EXTINT_NUM                   _UINT32_(2)  /* EIC signal: PIN_PB02 External Interrupt Line */
1047 
1048 #define PIN_PB18A_EIC_EXTINT2                      _UINT32_(50)
1049 #define MUX_PB18A_EIC_EXTINT2                      _UINT32_(0)
1050 #define PINMUX_PB18A_EIC_EXTINT2                   ((PIN_PB18A_EIC_EXTINT2 << 16) | MUX_PB18A_EIC_EXTINT2)
1051 #define PORT_PB18A_EIC_EXTINT2                     (_UINT32_(1) << 18)
1052 #define PIN_PB18A_EIC_EXTINT_NUM                   _UINT32_(2)  /* EIC signal: PIN_PB18 External Interrupt Line */
1053 
1054 #define PIN_PC02A_EIC_EXTINT2                      _UINT32_(66)
1055 #define MUX_PC02A_EIC_EXTINT2                      _UINT32_(0)
1056 #define PINMUX_PC02A_EIC_EXTINT2                   ((PIN_PC02A_EIC_EXTINT2 << 16) | MUX_PC02A_EIC_EXTINT2)
1057 #define PORT_PC02A_EIC_EXTINT2                     (_UINT32_(1) << 2)
1058 #define PIN_PC02A_EIC_EXTINT_NUM                   _UINT32_(2)  /* EIC signal: PIN_PC02 External Interrupt Line */
1059 
1060 #define PIN_PC18A_EIC_EXTINT2                      _UINT32_(82)
1061 #define MUX_PC18A_EIC_EXTINT2                      _UINT32_(0)
1062 #define PINMUX_PC18A_EIC_EXTINT2                   ((PIN_PC18A_EIC_EXTINT2 << 16) | MUX_PC18A_EIC_EXTINT2)
1063 #define PORT_PC18A_EIC_EXTINT2                     (_UINT32_(1) << 18)
1064 #define PIN_PC18A_EIC_EXTINT_NUM                   _UINT32_(2)  /* EIC signal: PIN_PC18 External Interrupt Line */
1065 
1066 #define PIN_PA03A_EIC_EXTINT3                      _UINT32_(3)
1067 #define MUX_PA03A_EIC_EXTINT3                      _UINT32_(0)
1068 #define PINMUX_PA03A_EIC_EXTINT3                   ((PIN_PA03A_EIC_EXTINT3 << 16) | MUX_PA03A_EIC_EXTINT3)
1069 #define PORT_PA03A_EIC_EXTINT3                     (_UINT32_(1) << 3)
1070 #define PIN_PA03A_EIC_EXTINT_NUM                   _UINT32_(3)  /* EIC signal: PIN_PA03 External Interrupt Line */
1071 
1072 #define PIN_PA19A_EIC_EXTINT3                      _UINT32_(19)
1073 #define MUX_PA19A_EIC_EXTINT3                      _UINT32_(0)
1074 #define PINMUX_PA19A_EIC_EXTINT3                   ((PIN_PA19A_EIC_EXTINT3 << 16) | MUX_PA19A_EIC_EXTINT3)
1075 #define PORT_PA19A_EIC_EXTINT3                     (_UINT32_(1) << 19)
1076 #define PIN_PA19A_EIC_EXTINT_NUM                   _UINT32_(3)  /* EIC signal: PIN_PA19 External Interrupt Line */
1077 
1078 #define PIN_PB03A_EIC_EXTINT3                      _UINT32_(35)
1079 #define MUX_PB03A_EIC_EXTINT3                      _UINT32_(0)
1080 #define PINMUX_PB03A_EIC_EXTINT3                   ((PIN_PB03A_EIC_EXTINT3 << 16) | MUX_PB03A_EIC_EXTINT3)
1081 #define PORT_PB03A_EIC_EXTINT3                     (_UINT32_(1) << 3)
1082 #define PIN_PB03A_EIC_EXTINT_NUM                   _UINT32_(3)  /* EIC signal: PIN_PB03 External Interrupt Line */
1083 
1084 #define PIN_PB19A_EIC_EXTINT3                      _UINT32_(51)
1085 #define MUX_PB19A_EIC_EXTINT3                      _UINT32_(0)
1086 #define PINMUX_PB19A_EIC_EXTINT3                   ((PIN_PB19A_EIC_EXTINT3 << 16) | MUX_PB19A_EIC_EXTINT3)
1087 #define PORT_PB19A_EIC_EXTINT3                     (_UINT32_(1) << 19)
1088 #define PIN_PB19A_EIC_EXTINT_NUM                   _UINT32_(3)  /* EIC signal: PIN_PB19 External Interrupt Line */
1089 
1090 #define PIN_PC03A_EIC_EXTINT3                      _UINT32_(67)
1091 #define MUX_PC03A_EIC_EXTINT3                      _UINT32_(0)
1092 #define PINMUX_PC03A_EIC_EXTINT3                   ((PIN_PC03A_EIC_EXTINT3 << 16) | MUX_PC03A_EIC_EXTINT3)
1093 #define PORT_PC03A_EIC_EXTINT3                     (_UINT32_(1) << 3)
1094 #define PIN_PC03A_EIC_EXTINT_NUM                   _UINT32_(3)  /* EIC signal: PIN_PC03 External Interrupt Line */
1095 
1096 #define PIN_PC19A_EIC_EXTINT3                      _UINT32_(83)
1097 #define MUX_PC19A_EIC_EXTINT3                      _UINT32_(0)
1098 #define PINMUX_PC19A_EIC_EXTINT3                   ((PIN_PC19A_EIC_EXTINT3 << 16) | MUX_PC19A_EIC_EXTINT3)
1099 #define PORT_PC19A_EIC_EXTINT3                     (_UINT32_(1) << 19)
1100 #define PIN_PC19A_EIC_EXTINT_NUM                   _UINT32_(3)  /* EIC signal: PIN_PC19 External Interrupt Line */
1101 
1102 #define PIN_PA04A_EIC_EXTINT4                      _UINT32_(4)
1103 #define MUX_PA04A_EIC_EXTINT4                      _UINT32_(0)
1104 #define PINMUX_PA04A_EIC_EXTINT4                   ((PIN_PA04A_EIC_EXTINT4 << 16) | MUX_PA04A_EIC_EXTINT4)
1105 #define PORT_PA04A_EIC_EXTINT4                     (_UINT32_(1) << 4)
1106 #define PIN_PA04A_EIC_EXTINT_NUM                   _UINT32_(4)  /* EIC signal: PIN_PA04 External Interrupt Line */
1107 
1108 #define PIN_PA20A_EIC_EXTINT4                      _UINT32_(20)
1109 #define MUX_PA20A_EIC_EXTINT4                      _UINT32_(0)
1110 #define PINMUX_PA20A_EIC_EXTINT4                   ((PIN_PA20A_EIC_EXTINT4 << 16) | MUX_PA20A_EIC_EXTINT4)
1111 #define PORT_PA20A_EIC_EXTINT4                     (_UINT32_(1) << 20)
1112 #define PIN_PA20A_EIC_EXTINT_NUM                   _UINT32_(4)  /* EIC signal: PIN_PA20 External Interrupt Line */
1113 
1114 #define PIN_PB04A_EIC_EXTINT4                      _UINT32_(36)
1115 #define MUX_PB04A_EIC_EXTINT4                      _UINT32_(0)
1116 #define PINMUX_PB04A_EIC_EXTINT4                   ((PIN_PB04A_EIC_EXTINT4 << 16) | MUX_PB04A_EIC_EXTINT4)
1117 #define PORT_PB04A_EIC_EXTINT4                     (_UINT32_(1) << 4)
1118 #define PIN_PB04A_EIC_EXTINT_NUM                   _UINT32_(4)  /* EIC signal: PIN_PB04 External Interrupt Line */
1119 
1120 #define PIN_PB20A_EIC_EXTINT4                      _UINT32_(52)
1121 #define MUX_PB20A_EIC_EXTINT4                      _UINT32_(0)
1122 #define PINMUX_PB20A_EIC_EXTINT4                   ((PIN_PB20A_EIC_EXTINT4 << 16) | MUX_PB20A_EIC_EXTINT4)
1123 #define PORT_PB20A_EIC_EXTINT4                     (_UINT32_(1) << 20)
1124 #define PIN_PB20A_EIC_EXTINT_NUM                   _UINT32_(4)  /* EIC signal: PIN_PB20 External Interrupt Line */
1125 
1126 #define PIN_PC20A_EIC_EXTINT4                      _UINT32_(84)
1127 #define MUX_PC20A_EIC_EXTINT4                      _UINT32_(0)
1128 #define PINMUX_PC20A_EIC_EXTINT4                   ((PIN_PC20A_EIC_EXTINT4 << 16) | MUX_PC20A_EIC_EXTINT4)
1129 #define PORT_PC20A_EIC_EXTINT4                     (_UINT32_(1) << 20)
1130 #define PIN_PC20A_EIC_EXTINT_NUM                   _UINT32_(4)  /* EIC signal: PIN_PC20 External Interrupt Line */
1131 
1132 #define PIN_PA05A_EIC_EXTINT5                      _UINT32_(5)
1133 #define MUX_PA05A_EIC_EXTINT5                      _UINT32_(0)
1134 #define PINMUX_PA05A_EIC_EXTINT5                   ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
1135 #define PORT_PA05A_EIC_EXTINT5                     (_UINT32_(1) << 5)
1136 #define PIN_PA05A_EIC_EXTINT_NUM                   _UINT32_(5)  /* EIC signal: PIN_PA05 External Interrupt Line */
1137 
1138 #define PIN_PA21A_EIC_EXTINT5                      _UINT32_(21)
1139 #define MUX_PA21A_EIC_EXTINT5                      _UINT32_(0)
1140 #define PINMUX_PA21A_EIC_EXTINT5                   ((PIN_PA21A_EIC_EXTINT5 << 16) | MUX_PA21A_EIC_EXTINT5)
1141 #define PORT_PA21A_EIC_EXTINT5                     (_UINT32_(1) << 21)
1142 #define PIN_PA21A_EIC_EXTINT_NUM                   _UINT32_(5)  /* EIC signal: PIN_PA21 External Interrupt Line */
1143 
1144 #define PIN_PB05A_EIC_EXTINT5                      _UINT32_(37)
1145 #define MUX_PB05A_EIC_EXTINT5                      _UINT32_(0)
1146 #define PINMUX_PB05A_EIC_EXTINT5                   ((PIN_PB05A_EIC_EXTINT5 << 16) | MUX_PB05A_EIC_EXTINT5)
1147 #define PORT_PB05A_EIC_EXTINT5                     (_UINT32_(1) << 5)
1148 #define PIN_PB05A_EIC_EXTINT_NUM                   _UINT32_(5)  /* EIC signal: PIN_PB05 External Interrupt Line */
1149 
1150 #define PIN_PB21A_EIC_EXTINT5                      _UINT32_(53)
1151 #define MUX_PB21A_EIC_EXTINT5                      _UINT32_(0)
1152 #define PINMUX_PB21A_EIC_EXTINT5                   ((PIN_PB21A_EIC_EXTINT5 << 16) | MUX_PB21A_EIC_EXTINT5)
1153 #define PORT_PB21A_EIC_EXTINT5                     (_UINT32_(1) << 21)
1154 #define PIN_PB21A_EIC_EXTINT_NUM                   _UINT32_(5)  /* EIC signal: PIN_PB21 External Interrupt Line */
1155 
1156 #define PIN_PC05A_EIC_EXTINT5                      _UINT32_(69)
1157 #define MUX_PC05A_EIC_EXTINT5                      _UINT32_(0)
1158 #define PINMUX_PC05A_EIC_EXTINT5                   ((PIN_PC05A_EIC_EXTINT5 << 16) | MUX_PC05A_EIC_EXTINT5)
1159 #define PORT_PC05A_EIC_EXTINT5                     (_UINT32_(1) << 5)
1160 #define PIN_PC05A_EIC_EXTINT_NUM                   _UINT32_(5)  /* EIC signal: PIN_PC05 External Interrupt Line */
1161 
1162 #define PIN_PC21A_EIC_EXTINT5                      _UINT32_(85)
1163 #define MUX_PC21A_EIC_EXTINT5                      _UINT32_(0)
1164 #define PINMUX_PC21A_EIC_EXTINT5                   ((PIN_PC21A_EIC_EXTINT5 << 16) | MUX_PC21A_EIC_EXTINT5)
1165 #define PORT_PC21A_EIC_EXTINT5                     (_UINT32_(1) << 21)
1166 #define PIN_PC21A_EIC_EXTINT_NUM                   _UINT32_(5)  /* EIC signal: PIN_PC21 External Interrupt Line */
1167 
1168 #define PIN_PA06A_EIC_EXTINT6                      _UINT32_(6)
1169 #define MUX_PA06A_EIC_EXTINT6                      _UINT32_(0)
1170 #define PINMUX_PA06A_EIC_EXTINT6                   ((PIN_PA06A_EIC_EXTINT6 << 16) | MUX_PA06A_EIC_EXTINT6)
1171 #define PORT_PA06A_EIC_EXTINT6                     (_UINT32_(1) << 6)
1172 #define PIN_PA06A_EIC_EXTINT_NUM                   _UINT32_(6)  /* EIC signal: PIN_PA06 External Interrupt Line */
1173 
1174 #define PIN_PA22A_EIC_EXTINT6                      _UINT32_(22)
1175 #define MUX_PA22A_EIC_EXTINT6                      _UINT32_(0)
1176 #define PINMUX_PA22A_EIC_EXTINT6                   ((PIN_PA22A_EIC_EXTINT6 << 16) | MUX_PA22A_EIC_EXTINT6)
1177 #define PORT_PA22A_EIC_EXTINT6                     (_UINT32_(1) << 22)
1178 #define PIN_PA22A_EIC_EXTINT_NUM                   _UINT32_(6)  /* EIC signal: PIN_PA22 External Interrupt Line */
1179 
1180 #define PIN_PB06A_EIC_EXTINT6                      _UINT32_(38)
1181 #define MUX_PB06A_EIC_EXTINT6                      _UINT32_(0)
1182 #define PINMUX_PB06A_EIC_EXTINT6                   ((PIN_PB06A_EIC_EXTINT6 << 16) | MUX_PB06A_EIC_EXTINT6)
1183 #define PORT_PB06A_EIC_EXTINT6                     (_UINT32_(1) << 6)
1184 #define PIN_PB06A_EIC_EXTINT_NUM                   _UINT32_(6)  /* EIC signal: PIN_PB06 External Interrupt Line */
1185 
1186 #define PIN_PB22A_EIC_EXTINT6                      _UINT32_(54)
1187 #define MUX_PB22A_EIC_EXTINT6                      _UINT32_(0)
1188 #define PINMUX_PB22A_EIC_EXTINT6                   ((PIN_PB22A_EIC_EXTINT6 << 16) | MUX_PB22A_EIC_EXTINT6)
1189 #define PORT_PB22A_EIC_EXTINT6                     (_UINT32_(1) << 22)
1190 #define PIN_PB22A_EIC_EXTINT_NUM                   _UINT32_(6)  /* EIC signal: PIN_PB22 External Interrupt Line */
1191 
1192 #define PIN_PC06A_EIC_EXTINT6                      _UINT32_(70)
1193 #define MUX_PC06A_EIC_EXTINT6                      _UINT32_(0)
1194 #define PINMUX_PC06A_EIC_EXTINT6                   ((PIN_PC06A_EIC_EXTINT6 << 16) | MUX_PC06A_EIC_EXTINT6)
1195 #define PORT_PC06A_EIC_EXTINT6                     (_UINT32_(1) << 6)
1196 #define PIN_PC06A_EIC_EXTINT_NUM                   _UINT32_(6)  /* EIC signal: PIN_PC06 External Interrupt Line */
1197 
1198 #define PIN_PA07A_EIC_EXTINT7                      _UINT32_(7)
1199 #define MUX_PA07A_EIC_EXTINT7                      _UINT32_(0)
1200 #define PINMUX_PA07A_EIC_EXTINT7                   ((PIN_PA07A_EIC_EXTINT7 << 16) | MUX_PA07A_EIC_EXTINT7)
1201 #define PORT_PA07A_EIC_EXTINT7                     (_UINT32_(1) << 7)
1202 #define PIN_PA07A_EIC_EXTINT_NUM                   _UINT32_(7)  /* EIC signal: PIN_PA07 External Interrupt Line */
1203 
1204 #define PIN_PA23A_EIC_EXTINT7                      _UINT32_(23)
1205 #define MUX_PA23A_EIC_EXTINT7                      _UINT32_(0)
1206 #define PINMUX_PA23A_EIC_EXTINT7                   ((PIN_PA23A_EIC_EXTINT7 << 16) | MUX_PA23A_EIC_EXTINT7)
1207 #define PORT_PA23A_EIC_EXTINT7                     (_UINT32_(1) << 23)
1208 #define PIN_PA23A_EIC_EXTINT_NUM                   _UINT32_(7)  /* EIC signal: PIN_PA23 External Interrupt Line */
1209 
1210 #define PIN_PB07A_EIC_EXTINT7                      _UINT32_(39)
1211 #define MUX_PB07A_EIC_EXTINT7                      _UINT32_(0)
1212 #define PINMUX_PB07A_EIC_EXTINT7                   ((PIN_PB07A_EIC_EXTINT7 << 16) | MUX_PB07A_EIC_EXTINT7)
1213 #define PORT_PB07A_EIC_EXTINT7                     (_UINT32_(1) << 7)
1214 #define PIN_PB07A_EIC_EXTINT_NUM                   _UINT32_(7)  /* EIC signal: PIN_PB07 External Interrupt Line */
1215 
1216 #define PIN_PB23A_EIC_EXTINT7                      _UINT32_(55)
1217 #define MUX_PB23A_EIC_EXTINT7                      _UINT32_(0)
1218 #define PINMUX_PB23A_EIC_EXTINT7                   ((PIN_PB23A_EIC_EXTINT7 << 16) | MUX_PB23A_EIC_EXTINT7)
1219 #define PORT_PB23A_EIC_EXTINT7                     (_UINT32_(1) << 23)
1220 #define PIN_PB23A_EIC_EXTINT_NUM                   _UINT32_(7)  /* EIC signal: PIN_PB23 External Interrupt Line */
1221 
1222 #define PIN_PA24A_EIC_EXTINT8                      _UINT32_(24)
1223 #define MUX_PA24A_EIC_EXTINT8                      _UINT32_(0)
1224 #define PINMUX_PA24A_EIC_EXTINT8                   ((PIN_PA24A_EIC_EXTINT8 << 16) | MUX_PA24A_EIC_EXTINT8)
1225 #define PORT_PA24A_EIC_EXTINT8                     (_UINT32_(1) << 24)
1226 #define PIN_PA24A_EIC_EXTINT_NUM                   _UINT32_(8)  /* EIC signal: PIN_PA24 External Interrupt Line */
1227 
1228 #define PIN_PB08A_EIC_EXTINT8                      _UINT32_(40)
1229 #define MUX_PB08A_EIC_EXTINT8                      _UINT32_(0)
1230 #define PINMUX_PB08A_EIC_EXTINT8                   ((PIN_PB08A_EIC_EXTINT8 << 16) | MUX_PB08A_EIC_EXTINT8)
1231 #define PORT_PB08A_EIC_EXTINT8                     (_UINT32_(1) << 8)
1232 #define PIN_PB08A_EIC_EXTINT_NUM                   _UINT32_(8)  /* EIC signal: PIN_PB08 External Interrupt Line */
1233 
1234 #define PIN_PB24A_EIC_EXTINT8                      _UINT32_(56)
1235 #define MUX_PB24A_EIC_EXTINT8                      _UINT32_(0)
1236 #define PINMUX_PB24A_EIC_EXTINT8                   ((PIN_PB24A_EIC_EXTINT8 << 16) | MUX_PB24A_EIC_EXTINT8)
1237 #define PORT_PB24A_EIC_EXTINT8                     (_UINT32_(1) << 24)
1238 #define PIN_PB24A_EIC_EXTINT_NUM                   _UINT32_(8)  /* EIC signal: PIN_PB24 External Interrupt Line */
1239 
1240 #define PIN_PC24A_EIC_EXTINT8                      _UINT32_(88)
1241 #define MUX_PC24A_EIC_EXTINT8                      _UINT32_(0)
1242 #define PINMUX_PC24A_EIC_EXTINT8                   ((PIN_PC24A_EIC_EXTINT8 << 16) | MUX_PC24A_EIC_EXTINT8)
1243 #define PORT_PC24A_EIC_EXTINT8                     (_UINT32_(1) << 24)
1244 #define PIN_PC24A_EIC_EXTINT_NUM                   _UINT32_(8)  /* EIC signal: PIN_PC24 External Interrupt Line */
1245 
1246 #define PIN_PA09A_EIC_EXTINT9                      _UINT32_(9)
1247 #define MUX_PA09A_EIC_EXTINT9                      _UINT32_(0)
1248 #define PINMUX_PA09A_EIC_EXTINT9                   ((PIN_PA09A_EIC_EXTINT9 << 16) | MUX_PA09A_EIC_EXTINT9)
1249 #define PORT_PA09A_EIC_EXTINT9                     (_UINT32_(1) << 9)
1250 #define PIN_PA09A_EIC_EXTINT_NUM                   _UINT32_(9)  /* EIC signal: PIN_PA09 External Interrupt Line */
1251 
1252 #define PIN_PA25A_EIC_EXTINT9                      _UINT32_(25)
1253 #define MUX_PA25A_EIC_EXTINT9                      _UINT32_(0)
1254 #define PINMUX_PA25A_EIC_EXTINT9                   ((PIN_PA25A_EIC_EXTINT9 << 16) | MUX_PA25A_EIC_EXTINT9)
1255 #define PORT_PA25A_EIC_EXTINT9                     (_UINT32_(1) << 25)
1256 #define PIN_PA25A_EIC_EXTINT_NUM                   _UINT32_(9)  /* EIC signal: PIN_PA25 External Interrupt Line */
1257 
1258 #define PIN_PB09A_EIC_EXTINT9                      _UINT32_(41)
1259 #define MUX_PB09A_EIC_EXTINT9                      _UINT32_(0)
1260 #define PINMUX_PB09A_EIC_EXTINT9                   ((PIN_PB09A_EIC_EXTINT9 << 16) | MUX_PB09A_EIC_EXTINT9)
1261 #define PORT_PB09A_EIC_EXTINT9                     (_UINT32_(1) << 9)
1262 #define PIN_PB09A_EIC_EXTINT_NUM                   _UINT32_(9)  /* EIC signal: PIN_PB09 External Interrupt Line */
1263 
1264 #define PIN_PB25A_EIC_EXTINT9                      _UINT32_(57)
1265 #define MUX_PB25A_EIC_EXTINT9                      _UINT32_(0)
1266 #define PINMUX_PB25A_EIC_EXTINT9                   ((PIN_PB25A_EIC_EXTINT9 << 16) | MUX_PB25A_EIC_EXTINT9)
1267 #define PORT_PB25A_EIC_EXTINT9                     (_UINT32_(1) << 25)
1268 #define PIN_PB25A_EIC_EXTINT_NUM                   _UINT32_(9)  /* EIC signal: PIN_PB25 External Interrupt Line */
1269 
1270 #define PIN_PC07A_EIC_EXTINT9                      _UINT32_(71)
1271 #define MUX_PC07A_EIC_EXTINT9                      _UINT32_(0)
1272 #define PINMUX_PC07A_EIC_EXTINT9                   ((PIN_PC07A_EIC_EXTINT9 << 16) | MUX_PC07A_EIC_EXTINT9)
1273 #define PORT_PC07A_EIC_EXTINT9                     (_UINT32_(1) << 7)
1274 #define PIN_PC07A_EIC_EXTINT_NUM                   _UINT32_(9)  /* EIC signal: PIN_PC07 External Interrupt Line */
1275 
1276 #define PIN_PC25A_EIC_EXTINT9                      _UINT32_(89)
1277 #define MUX_PC25A_EIC_EXTINT9                      _UINT32_(0)
1278 #define PINMUX_PC25A_EIC_EXTINT9                   ((PIN_PC25A_EIC_EXTINT9 << 16) | MUX_PC25A_EIC_EXTINT9)
1279 #define PORT_PC25A_EIC_EXTINT9                     (_UINT32_(1) << 25)
1280 #define PIN_PC25A_EIC_EXTINT_NUM                   _UINT32_(9)  /* EIC signal: PIN_PC25 External Interrupt Line */
1281 
1282 #define PIN_PA10A_EIC_EXTINT10                     _UINT32_(10)
1283 #define MUX_PA10A_EIC_EXTINT10                     _UINT32_(0)
1284 #define PINMUX_PA10A_EIC_EXTINT10                  ((PIN_PA10A_EIC_EXTINT10 << 16) | MUX_PA10A_EIC_EXTINT10)
1285 #define PORT_PA10A_EIC_EXTINT10                    (_UINT32_(1) << 10)
1286 #define PIN_PA10A_EIC_EXTINT_NUM                   _UINT32_(10) /* EIC signal: PIN_PA10 External Interrupt Line */
1287 
1288 #define PIN_PB10A_EIC_EXTINT10                     _UINT32_(42)
1289 #define MUX_PB10A_EIC_EXTINT10                     _UINT32_(0)
1290 #define PINMUX_PB10A_EIC_EXTINT10                  ((PIN_PB10A_EIC_EXTINT10 << 16) | MUX_PB10A_EIC_EXTINT10)
1291 #define PORT_PB10A_EIC_EXTINT10                    (_UINT32_(1) << 10)
1292 #define PIN_PB10A_EIC_EXTINT_NUM                   _UINT32_(10) /* EIC signal: PIN_PB10 External Interrupt Line */
1293 
1294 #define PIN_PC10A_EIC_EXTINT10                     _UINT32_(74)
1295 #define MUX_PC10A_EIC_EXTINT10                     _UINT32_(0)
1296 #define PINMUX_PC10A_EIC_EXTINT10                  ((PIN_PC10A_EIC_EXTINT10 << 16) | MUX_PC10A_EIC_EXTINT10)
1297 #define PORT_PC10A_EIC_EXTINT10                    (_UINT32_(1) << 10)
1298 #define PIN_PC10A_EIC_EXTINT_NUM                   _UINT32_(10) /* EIC signal: PIN_PC10 External Interrupt Line */
1299 
1300 #define PIN_PC26A_EIC_EXTINT10                     _UINT32_(90)
1301 #define MUX_PC26A_EIC_EXTINT10                     _UINT32_(0)
1302 #define PINMUX_PC26A_EIC_EXTINT10                  ((PIN_PC26A_EIC_EXTINT10 << 16) | MUX_PC26A_EIC_EXTINT10)
1303 #define PORT_PC26A_EIC_EXTINT10                    (_UINT32_(1) << 26)
1304 #define PIN_PC26A_EIC_EXTINT_NUM                   _UINT32_(10) /* EIC signal: PIN_PC26 External Interrupt Line */
1305 
1306 #define PIN_PA11A_EIC_EXTINT11                     _UINT32_(11)
1307 #define MUX_PA11A_EIC_EXTINT11                     _UINT32_(0)
1308 #define PINMUX_PA11A_EIC_EXTINT11                  ((PIN_PA11A_EIC_EXTINT11 << 16) | MUX_PA11A_EIC_EXTINT11)
1309 #define PORT_PA11A_EIC_EXTINT11                    (_UINT32_(1) << 11)
1310 #define PIN_PA11A_EIC_EXTINT_NUM                   _UINT32_(11) /* EIC signal: PIN_PA11 External Interrupt Line */
1311 
1312 #define PIN_PA27A_EIC_EXTINT11                     _UINT32_(27)
1313 #define MUX_PA27A_EIC_EXTINT11                     _UINT32_(0)
1314 #define PINMUX_PA27A_EIC_EXTINT11                  ((PIN_PA27A_EIC_EXTINT11 << 16) | MUX_PA27A_EIC_EXTINT11)
1315 #define PORT_PA27A_EIC_EXTINT11                    (_UINT32_(1) << 27)
1316 #define PIN_PA27A_EIC_EXTINT_NUM                   _UINT32_(11) /* EIC signal: PIN_PA27 External Interrupt Line */
1317 
1318 #define PIN_PB11A_EIC_EXTINT11                     _UINT32_(43)
1319 #define MUX_PB11A_EIC_EXTINT11                     _UINT32_(0)
1320 #define PINMUX_PB11A_EIC_EXTINT11                  ((PIN_PB11A_EIC_EXTINT11 << 16) | MUX_PB11A_EIC_EXTINT11)
1321 #define PORT_PB11A_EIC_EXTINT11                    (_UINT32_(1) << 11)
1322 #define PIN_PB11A_EIC_EXTINT_NUM                   _UINT32_(11) /* EIC signal: PIN_PB11 External Interrupt Line */
1323 
1324 #define PIN_PC11A_EIC_EXTINT11                     _UINT32_(75)
1325 #define MUX_PC11A_EIC_EXTINT11                     _UINT32_(0)
1326 #define PINMUX_PC11A_EIC_EXTINT11                  ((PIN_PC11A_EIC_EXTINT11 << 16) | MUX_PC11A_EIC_EXTINT11)
1327 #define PORT_PC11A_EIC_EXTINT11                    (_UINT32_(1) << 11)
1328 #define PIN_PC11A_EIC_EXTINT_NUM                   _UINT32_(11) /* EIC signal: PIN_PC11 External Interrupt Line */
1329 
1330 #define PIN_PC27A_EIC_EXTINT11                     _UINT32_(91)
1331 #define MUX_PC27A_EIC_EXTINT11                     _UINT32_(0)
1332 #define PINMUX_PC27A_EIC_EXTINT11                  ((PIN_PC27A_EIC_EXTINT11 << 16) | MUX_PC27A_EIC_EXTINT11)
1333 #define PORT_PC27A_EIC_EXTINT11                    (_UINT32_(1) << 27)
1334 #define PIN_PC27A_EIC_EXTINT_NUM                   _UINT32_(11) /* EIC signal: PIN_PC27 External Interrupt Line */
1335 
1336 #define PIN_PA12A_EIC_EXTINT12                     _UINT32_(12)
1337 #define MUX_PA12A_EIC_EXTINT12                     _UINT32_(0)
1338 #define PINMUX_PA12A_EIC_EXTINT12                  ((PIN_PA12A_EIC_EXTINT12 << 16) | MUX_PA12A_EIC_EXTINT12)
1339 #define PORT_PA12A_EIC_EXTINT12                    (_UINT32_(1) << 12)
1340 #define PIN_PA12A_EIC_EXTINT_NUM                   _UINT32_(12) /* EIC signal: PIN_PA12 External Interrupt Line */
1341 
1342 #define PIN_PB12A_EIC_EXTINT12                     _UINT32_(44)
1343 #define MUX_PB12A_EIC_EXTINT12                     _UINT32_(0)
1344 #define PINMUX_PB12A_EIC_EXTINT12                  ((PIN_PB12A_EIC_EXTINT12 << 16) | MUX_PB12A_EIC_EXTINT12)
1345 #define PORT_PB12A_EIC_EXTINT12                    (_UINT32_(1) << 12)
1346 #define PIN_PB12A_EIC_EXTINT_NUM                   _UINT32_(12) /* EIC signal: PIN_PB12 External Interrupt Line */
1347 
1348 #define PIN_PC12A_EIC_EXTINT12                     _UINT32_(76)
1349 #define MUX_PC12A_EIC_EXTINT12                     _UINT32_(0)
1350 #define PINMUX_PC12A_EIC_EXTINT12                  ((PIN_PC12A_EIC_EXTINT12 << 16) | MUX_PC12A_EIC_EXTINT12)
1351 #define PORT_PC12A_EIC_EXTINT12                    (_UINT32_(1) << 12)
1352 #define PIN_PC12A_EIC_EXTINT_NUM                   _UINT32_(12) /* EIC signal: PIN_PC12 External Interrupt Line */
1353 
1354 #define PIN_PC28A_EIC_EXTINT12                     _UINT32_(92)
1355 #define MUX_PC28A_EIC_EXTINT12                     _UINT32_(0)
1356 #define PINMUX_PC28A_EIC_EXTINT12                  ((PIN_PC28A_EIC_EXTINT12 << 16) | MUX_PC28A_EIC_EXTINT12)
1357 #define PORT_PC28A_EIC_EXTINT12                    (_UINT32_(1) << 28)
1358 #define PIN_PC28A_EIC_EXTINT_NUM                   _UINT32_(12) /* EIC signal: PIN_PC28 External Interrupt Line */
1359 
1360 #define PIN_PA13A_EIC_EXTINT13                     _UINT32_(13)
1361 #define MUX_PA13A_EIC_EXTINT13                     _UINT32_(0)
1362 #define PINMUX_PA13A_EIC_EXTINT13                  ((PIN_PA13A_EIC_EXTINT13 << 16) | MUX_PA13A_EIC_EXTINT13)
1363 #define PORT_PA13A_EIC_EXTINT13                    (_UINT32_(1) << 13)
1364 #define PIN_PA13A_EIC_EXTINT_NUM                   _UINT32_(13) /* EIC signal: PIN_PA13 External Interrupt Line */
1365 
1366 #define PIN_PB13A_EIC_EXTINT13                     _UINT32_(45)
1367 #define MUX_PB13A_EIC_EXTINT13                     _UINT32_(0)
1368 #define PINMUX_PB13A_EIC_EXTINT13                  ((PIN_PB13A_EIC_EXTINT13 << 16) | MUX_PB13A_EIC_EXTINT13)
1369 #define PORT_PB13A_EIC_EXTINT13                    (_UINT32_(1) << 13)
1370 #define PIN_PB13A_EIC_EXTINT_NUM                   _UINT32_(13) /* EIC signal: PIN_PB13 External Interrupt Line */
1371 
1372 #define PIN_PC13A_EIC_EXTINT13                     _UINT32_(77)
1373 #define MUX_PC13A_EIC_EXTINT13                     _UINT32_(0)
1374 #define PINMUX_PC13A_EIC_EXTINT13                  ((PIN_PC13A_EIC_EXTINT13 << 16) | MUX_PC13A_EIC_EXTINT13)
1375 #define PORT_PC13A_EIC_EXTINT13                    (_UINT32_(1) << 13)
1376 #define PIN_PC13A_EIC_EXTINT_NUM                   _UINT32_(13) /* EIC signal: PIN_PC13 External Interrupt Line */
1377 
1378 #define PIN_PA30A_EIC_EXTINT14                     _UINT32_(30)
1379 #define MUX_PA30A_EIC_EXTINT14                     _UINT32_(0)
1380 #define PINMUX_PA30A_EIC_EXTINT14                  ((PIN_PA30A_EIC_EXTINT14 << 16) | MUX_PA30A_EIC_EXTINT14)
1381 #define PORT_PA30A_EIC_EXTINT14                    (_UINT32_(1) << 30)
1382 #define PIN_PA30A_EIC_EXTINT_NUM                   _UINT32_(14) /* EIC signal: PIN_PA30 External Interrupt Line */
1383 
1384 #define PIN_PB14A_EIC_EXTINT14                     _UINT32_(46)
1385 #define MUX_PB14A_EIC_EXTINT14                     _UINT32_(0)
1386 #define PINMUX_PB14A_EIC_EXTINT14                  ((PIN_PB14A_EIC_EXTINT14 << 16) | MUX_PB14A_EIC_EXTINT14)
1387 #define PORT_PB14A_EIC_EXTINT14                    (_UINT32_(1) << 14)
1388 #define PIN_PB14A_EIC_EXTINT_NUM                   _UINT32_(14) /* EIC signal: PIN_PB14 External Interrupt Line */
1389 
1390 #define PIN_PB30A_EIC_EXTINT14                     _UINT32_(62)
1391 #define MUX_PB30A_EIC_EXTINT14                     _UINT32_(0)
1392 #define PINMUX_PB30A_EIC_EXTINT14                  ((PIN_PB30A_EIC_EXTINT14 << 16) | MUX_PB30A_EIC_EXTINT14)
1393 #define PORT_PB30A_EIC_EXTINT14                    (_UINT32_(1) << 30)
1394 #define PIN_PB30A_EIC_EXTINT_NUM                   _UINT32_(14) /* EIC signal: PIN_PB30 External Interrupt Line */
1395 
1396 #define PIN_PC14A_EIC_EXTINT14                     _UINT32_(78)
1397 #define MUX_PC14A_EIC_EXTINT14                     _UINT32_(0)
1398 #define PINMUX_PC14A_EIC_EXTINT14                  ((PIN_PC14A_EIC_EXTINT14 << 16) | MUX_PC14A_EIC_EXTINT14)
1399 #define PORT_PC14A_EIC_EXTINT14                    (_UINT32_(1) << 14)
1400 #define PIN_PC14A_EIC_EXTINT_NUM                   _UINT32_(14) /* EIC signal: PIN_PC14 External Interrupt Line */
1401 
1402 #define PIN_PA14A_EIC_EXTINT14                     _UINT32_(14)
1403 #define MUX_PA14A_EIC_EXTINT14                     _UINT32_(0)
1404 #define PINMUX_PA14A_EIC_EXTINT14                  ((PIN_PA14A_EIC_EXTINT14 << 16) | MUX_PA14A_EIC_EXTINT14)
1405 #define PORT_PA14A_EIC_EXTINT14                    (_UINT32_(1) << 14)
1406 #define PIN_PA14A_EIC_EXTINT_NUM                   _UINT32_(14) /* EIC signal: PIN_PA14 External Interrupt Line */
1407 
1408 #define PIN_PA15A_EIC_EXTINT15                     _UINT32_(15)
1409 #define MUX_PA15A_EIC_EXTINT15                     _UINT32_(0)
1410 #define PINMUX_PA15A_EIC_EXTINT15                  ((PIN_PA15A_EIC_EXTINT15 << 16) | MUX_PA15A_EIC_EXTINT15)
1411 #define PORT_PA15A_EIC_EXTINT15                    (_UINT32_(1) << 15)
1412 #define PIN_PA15A_EIC_EXTINT_NUM                   _UINT32_(15) /* EIC signal: PIN_PA15 External Interrupt Line */
1413 
1414 #define PIN_PA31A_EIC_EXTINT15                     _UINT32_(31)
1415 #define MUX_PA31A_EIC_EXTINT15                     _UINT32_(0)
1416 #define PINMUX_PA31A_EIC_EXTINT15                  ((PIN_PA31A_EIC_EXTINT15 << 16) | MUX_PA31A_EIC_EXTINT15)
1417 #define PORT_PA31A_EIC_EXTINT15                    (_UINT32_(1) << 31)
1418 #define PIN_PA31A_EIC_EXTINT_NUM                   _UINT32_(15) /* EIC signal: PIN_PA31 External Interrupt Line */
1419 
1420 #define PIN_PB15A_EIC_EXTINT15                     _UINT32_(47)
1421 #define MUX_PB15A_EIC_EXTINT15                     _UINT32_(0)
1422 #define PINMUX_PB15A_EIC_EXTINT15                  ((PIN_PB15A_EIC_EXTINT15 << 16) | MUX_PB15A_EIC_EXTINT15)
1423 #define PORT_PB15A_EIC_EXTINT15                    (_UINT32_(1) << 15)
1424 #define PIN_PB15A_EIC_EXTINT_NUM                   _UINT32_(15) /* EIC signal: PIN_PB15 External Interrupt Line */
1425 
1426 #define PIN_PB31A_EIC_EXTINT15                     _UINT32_(63)
1427 #define MUX_PB31A_EIC_EXTINT15                     _UINT32_(0)
1428 #define PINMUX_PB31A_EIC_EXTINT15                  ((PIN_PB31A_EIC_EXTINT15 << 16) | MUX_PB31A_EIC_EXTINT15)
1429 #define PORT_PB31A_EIC_EXTINT15                    (_UINT32_(1) << 31)
1430 #define PIN_PB31A_EIC_EXTINT_NUM                   _UINT32_(15) /* EIC signal: PIN_PB31 External Interrupt Line */
1431 
1432 #define PIN_PC15A_EIC_EXTINT15                     _UINT32_(79)
1433 #define MUX_PC15A_EIC_EXTINT15                     _UINT32_(0)
1434 #define PINMUX_PC15A_EIC_EXTINT15                  ((PIN_PC15A_EIC_EXTINT15 << 16) | MUX_PC15A_EIC_EXTINT15)
1435 #define PORT_PC15A_EIC_EXTINT15                    (_UINT32_(1) << 15)
1436 #define PIN_PC15A_EIC_EXTINT_NUM                   _UINT32_(15) /* EIC signal: PIN_PC15 External Interrupt Line */
1437 
1438 #define PIN_PA08A_EIC_NMI                          _UINT32_(8)
1439 #define MUX_PA08A_EIC_NMI                          _UINT32_(0)
1440 #define PINMUX_PA08A_EIC_NMI                       ((PIN_PA08A_EIC_NMI << 16) | MUX_PA08A_EIC_NMI)
1441 #define PORT_PA08A_EIC_NMI                         (_UINT32_(1) << 8)
1442 
1443 /* ================== PORT definition for GCLK peripheral =================== */
1444 #define PIN_PA30M_GCLK_IO0                         _UINT32_(30)
1445 #define MUX_PA30M_GCLK_IO0                         _UINT32_(12)
1446 #define PINMUX_PA30M_GCLK_IO0                      ((PIN_PA30M_GCLK_IO0 << 16) | MUX_PA30M_GCLK_IO0)
1447 #define PORT_PA30M_GCLK_IO0                        (_UINT32_(1) << 30)
1448 
1449 #define PIN_PB14M_GCLK_IO0                         _UINT32_(46)
1450 #define MUX_PB14M_GCLK_IO0                         _UINT32_(12)
1451 #define PINMUX_PB14M_GCLK_IO0                      ((PIN_PB14M_GCLK_IO0 << 16) | MUX_PB14M_GCLK_IO0)
1452 #define PORT_PB14M_GCLK_IO0                        (_UINT32_(1) << 14)
1453 
1454 #define PIN_PA14M_GCLK_IO0                         _UINT32_(14)
1455 #define MUX_PA14M_GCLK_IO0                         _UINT32_(12)
1456 #define PINMUX_PA14M_GCLK_IO0                      ((PIN_PA14M_GCLK_IO0 << 16) | MUX_PA14M_GCLK_IO0)
1457 #define PORT_PA14M_GCLK_IO0                        (_UINT32_(1) << 14)
1458 
1459 #define PIN_PB22M_GCLK_IO0                         _UINT32_(54)
1460 #define MUX_PB22M_GCLK_IO0                         _UINT32_(12)
1461 #define PINMUX_PB22M_GCLK_IO0                      ((PIN_PB22M_GCLK_IO0 << 16) | MUX_PB22M_GCLK_IO0)
1462 #define PORT_PB22M_GCLK_IO0                        (_UINT32_(1) << 22)
1463 
1464 #define PIN_PB15M_GCLK_IO1                         _UINT32_(47)
1465 #define MUX_PB15M_GCLK_IO1                         _UINT32_(12)
1466 #define PINMUX_PB15M_GCLK_IO1                      ((PIN_PB15M_GCLK_IO1 << 16) | MUX_PB15M_GCLK_IO1)
1467 #define PORT_PB15M_GCLK_IO1                        (_UINT32_(1) << 15)
1468 
1469 #define PIN_PA15M_GCLK_IO1                         _UINT32_(15)
1470 #define MUX_PA15M_GCLK_IO1                         _UINT32_(12)
1471 #define PINMUX_PA15M_GCLK_IO1                      ((PIN_PA15M_GCLK_IO1 << 16) | MUX_PA15M_GCLK_IO1)
1472 #define PORT_PA15M_GCLK_IO1                        (_UINT32_(1) << 15)
1473 
1474 #define PIN_PB23M_GCLK_IO1                         _UINT32_(55)
1475 #define MUX_PB23M_GCLK_IO1                         _UINT32_(12)
1476 #define PINMUX_PB23M_GCLK_IO1                      ((PIN_PB23M_GCLK_IO1 << 16) | MUX_PB23M_GCLK_IO1)
1477 #define PORT_PB23M_GCLK_IO1                        (_UINT32_(1) << 23)
1478 
1479 #define PIN_PA27M_GCLK_IO1                         _UINT32_(27)
1480 #define MUX_PA27M_GCLK_IO1                         _UINT32_(12)
1481 #define PINMUX_PA27M_GCLK_IO1                      ((PIN_PA27M_GCLK_IO1 << 16) | MUX_PA27M_GCLK_IO1)
1482 #define PORT_PA27M_GCLK_IO1                        (_UINT32_(1) << 27)
1483 
1484 #define PIN_PA16M_GCLK_IO2                         _UINT32_(16)
1485 #define MUX_PA16M_GCLK_IO2                         _UINT32_(12)
1486 #define PINMUX_PA16M_GCLK_IO2                      ((PIN_PA16M_GCLK_IO2 << 16) | MUX_PA16M_GCLK_IO2)
1487 #define PORT_PA16M_GCLK_IO2                        (_UINT32_(1) << 16)
1488 
1489 #define PIN_PB16M_GCLK_IO2                         _UINT32_(48)
1490 #define MUX_PB16M_GCLK_IO2                         _UINT32_(12)
1491 #define PINMUX_PB16M_GCLK_IO2                      ((PIN_PB16M_GCLK_IO2 << 16) | MUX_PB16M_GCLK_IO2)
1492 #define PORT_PB16M_GCLK_IO2                        (_UINT32_(1) << 16)
1493 
1494 #define PIN_PA17M_GCLK_IO3                         _UINT32_(17)
1495 #define MUX_PA17M_GCLK_IO3                         _UINT32_(12)
1496 #define PINMUX_PA17M_GCLK_IO3                      ((PIN_PA17M_GCLK_IO3 << 16) | MUX_PA17M_GCLK_IO3)
1497 #define PORT_PA17M_GCLK_IO3                        (_UINT32_(1) << 17)
1498 
1499 #define PIN_PB17M_GCLK_IO3                         _UINT32_(49)
1500 #define MUX_PB17M_GCLK_IO3                         _UINT32_(12)
1501 #define PINMUX_PB17M_GCLK_IO3                      ((PIN_PB17M_GCLK_IO3 << 16) | MUX_PB17M_GCLK_IO3)
1502 #define PORT_PB17M_GCLK_IO3                        (_UINT32_(1) << 17)
1503 
1504 #define PIN_PA10M_GCLK_IO4                         _UINT32_(10)
1505 #define MUX_PA10M_GCLK_IO4                         _UINT32_(12)
1506 #define PINMUX_PA10M_GCLK_IO4                      ((PIN_PA10M_GCLK_IO4 << 16) | MUX_PA10M_GCLK_IO4)
1507 #define PORT_PA10M_GCLK_IO4                        (_UINT32_(1) << 10)
1508 
1509 #define PIN_PB10M_GCLK_IO4                         _UINT32_(42)
1510 #define MUX_PB10M_GCLK_IO4                         _UINT32_(12)
1511 #define PINMUX_PB10M_GCLK_IO4                      ((PIN_PB10M_GCLK_IO4 << 16) | MUX_PB10M_GCLK_IO4)
1512 #define PORT_PB10M_GCLK_IO4                        (_UINT32_(1) << 10)
1513 
1514 #define PIN_PB18M_GCLK_IO4                         _UINT32_(50)
1515 #define MUX_PB18M_GCLK_IO4                         _UINT32_(12)
1516 #define PINMUX_PB18M_GCLK_IO4                      ((PIN_PB18M_GCLK_IO4 << 16) | MUX_PB18M_GCLK_IO4)
1517 #define PORT_PB18M_GCLK_IO4                        (_UINT32_(1) << 18)
1518 
1519 #define PIN_PA11M_GCLK_IO5                         _UINT32_(11)
1520 #define MUX_PA11M_GCLK_IO5                         _UINT32_(12)
1521 #define PINMUX_PA11M_GCLK_IO5                      ((PIN_PA11M_GCLK_IO5 << 16) | MUX_PA11M_GCLK_IO5)
1522 #define PORT_PA11M_GCLK_IO5                        (_UINT32_(1) << 11)
1523 
1524 #define PIN_PB11M_GCLK_IO5                         _UINT32_(43)
1525 #define MUX_PB11M_GCLK_IO5                         _UINT32_(12)
1526 #define PINMUX_PB11M_GCLK_IO5                      ((PIN_PB11M_GCLK_IO5 << 16) | MUX_PB11M_GCLK_IO5)
1527 #define PORT_PB11M_GCLK_IO5                        (_UINT32_(1) << 11)
1528 
1529 #define PIN_PB19M_GCLK_IO5                         _UINT32_(51)
1530 #define MUX_PB19M_GCLK_IO5                         _UINT32_(12)
1531 #define PINMUX_PB19M_GCLK_IO5                      ((PIN_PB19M_GCLK_IO5 << 16) | MUX_PB19M_GCLK_IO5)
1532 #define PORT_PB19M_GCLK_IO5                        (_UINT32_(1) << 19)
1533 
1534 #define PIN_PB12M_GCLK_IO6                         _UINT32_(44)
1535 #define MUX_PB12M_GCLK_IO6                         _UINT32_(12)
1536 #define PINMUX_PB12M_GCLK_IO6                      ((PIN_PB12M_GCLK_IO6 << 16) | MUX_PB12M_GCLK_IO6)
1537 #define PORT_PB12M_GCLK_IO6                        (_UINT32_(1) << 12)
1538 
1539 #define PIN_PB20M_GCLK_IO6                         _UINT32_(52)
1540 #define MUX_PB20M_GCLK_IO6                         _UINT32_(12)
1541 #define PINMUX_PB20M_GCLK_IO6                      ((PIN_PB20M_GCLK_IO6 << 16) | MUX_PB20M_GCLK_IO6)
1542 #define PORT_PB20M_GCLK_IO6                        (_UINT32_(1) << 20)
1543 
1544 #define PIN_PB13M_GCLK_IO7                         _UINT32_(45)
1545 #define MUX_PB13M_GCLK_IO7                         _UINT32_(12)
1546 #define PINMUX_PB13M_GCLK_IO7                      ((PIN_PB13M_GCLK_IO7 << 16) | MUX_PB13M_GCLK_IO7)
1547 #define PORT_PB13M_GCLK_IO7                        (_UINT32_(1) << 13)
1548 
1549 #define PIN_PB21M_GCLK_IO7                         _UINT32_(53)
1550 #define MUX_PB21M_GCLK_IO7                         _UINT32_(12)
1551 #define PINMUX_PB21M_GCLK_IO7                      ((PIN_PB21M_GCLK_IO7 << 16) | MUX_PB21M_GCLK_IO7)
1552 #define PORT_PB21M_GCLK_IO7                        (_UINT32_(1) << 21)
1553 
1554 /* ================== PORT definition for GMAC peripheral =================== */
1555 #define PIN_PC21L_GMAC_GCOL                        _UINT32_(85)
1556 #define MUX_PC21L_GMAC_GCOL                        _UINT32_(11)
1557 #define PINMUX_PC21L_GMAC_GCOL                     ((PIN_PC21L_GMAC_GCOL << 16) | MUX_PC21L_GMAC_GCOL)
1558 #define PORT_PC21L_GMAC_GCOL                       (_UINT32_(1) << 21)
1559 
1560 #define PIN_PA16L_GMAC_GCRS                        _UINT32_(16)
1561 #define MUX_PA16L_GMAC_GCRS                        _UINT32_(11)
1562 #define PINMUX_PA16L_GMAC_GCRS                     ((PIN_PA16L_GMAC_GCRS << 16) | MUX_PA16L_GMAC_GCRS)
1563 #define PORT_PA16L_GMAC_GCRS                       (_UINT32_(1) << 16)
1564 
1565 #define PIN_PA20L_GMAC_GMDC                        _UINT32_(20)
1566 #define MUX_PA20L_GMAC_GMDC                        _UINT32_(11)
1567 #define PINMUX_PA20L_GMAC_GMDC                     ((PIN_PA20L_GMAC_GMDC << 16) | MUX_PA20L_GMAC_GMDC)
1568 #define PORT_PA20L_GMAC_GMDC                       (_UINT32_(1) << 20)
1569 
1570 #define PIN_PB14L_GMAC_GMDC                        _UINT32_(46)
1571 #define MUX_PB14L_GMAC_GMDC                        _UINT32_(11)
1572 #define PINMUX_PB14L_GMAC_GMDC                     ((PIN_PB14L_GMAC_GMDC << 16) | MUX_PB14L_GMAC_GMDC)
1573 #define PORT_PB14L_GMAC_GMDC                       (_UINT32_(1) << 14)
1574 
1575 #define PIN_PC11L_GMAC_GMDC                        _UINT32_(75)
1576 #define MUX_PC11L_GMAC_GMDC                        _UINT32_(11)
1577 #define PINMUX_PC11L_GMAC_GMDC                     ((PIN_PC11L_GMAC_GMDC << 16) | MUX_PC11L_GMAC_GMDC)
1578 #define PORT_PC11L_GMAC_GMDC                       (_UINT32_(1) << 11)
1579 
1580 #define PIN_PA21L_GMAC_GMDIO                       _UINT32_(21)
1581 #define MUX_PA21L_GMAC_GMDIO                       _UINT32_(11)
1582 #define PINMUX_PA21L_GMAC_GMDIO                    ((PIN_PA21L_GMAC_GMDIO << 16) | MUX_PA21L_GMAC_GMDIO)
1583 #define PORT_PA21L_GMAC_GMDIO                      (_UINT32_(1) << 21)
1584 
1585 #define PIN_PB15L_GMAC_GMDIO                       _UINT32_(47)
1586 #define MUX_PB15L_GMAC_GMDIO                       _UINT32_(11)
1587 #define PINMUX_PB15L_GMAC_GMDIO                    ((PIN_PB15L_GMAC_GMDIO << 16) | MUX_PB15L_GMAC_GMDIO)
1588 #define PORT_PB15L_GMAC_GMDIO                      (_UINT32_(1) << 15)
1589 
1590 #define PIN_PC12L_GMAC_GMDIO                       _UINT32_(76)
1591 #define MUX_PC12L_GMAC_GMDIO                       _UINT32_(11)
1592 #define PINMUX_PC12L_GMAC_GMDIO                    ((PIN_PC12L_GMAC_GMDIO << 16) | MUX_PC12L_GMAC_GMDIO)
1593 #define PORT_PC12L_GMAC_GMDIO                      (_UINT32_(1) << 12)
1594 
1595 #define PIN_PA13L_GMAC_GRX0                        _UINT32_(13)
1596 #define MUX_PA13L_GMAC_GRX0                        _UINT32_(11)
1597 #define PINMUX_PA13L_GMAC_GRX0                     ((PIN_PA13L_GMAC_GRX0 << 16) | MUX_PA13L_GMAC_GRX0)
1598 #define PORT_PA13L_GMAC_GRX0                       (_UINT32_(1) << 13)
1599 
1600 #define PIN_PA12L_GMAC_GRX1                        _UINT32_(12)
1601 #define MUX_PA12L_GMAC_GRX1                        _UINT32_(11)
1602 #define PINMUX_PA12L_GMAC_GRX1                     ((PIN_PA12L_GMAC_GRX1 << 16) | MUX_PA12L_GMAC_GRX1)
1603 #define PORT_PA12L_GMAC_GRX1                       (_UINT32_(1) << 12)
1604 
1605 #define PIN_PC15L_GMAC_GRX2                        _UINT32_(79)
1606 #define MUX_PC15L_GMAC_GRX2                        _UINT32_(11)
1607 #define PINMUX_PC15L_GMAC_GRX2                     ((PIN_PC15L_GMAC_GRX2 << 16) | MUX_PC15L_GMAC_GRX2)
1608 #define PORT_PC15L_GMAC_GRX2                       (_UINT32_(1) << 15)
1609 
1610 #define PIN_PC14L_GMAC_GRX3                        _UINT32_(78)
1611 #define MUX_PC14L_GMAC_GRX3                        _UINT32_(11)
1612 #define PINMUX_PC14L_GMAC_GRX3                     ((PIN_PC14L_GMAC_GRX3 << 16) | MUX_PC14L_GMAC_GRX3)
1613 #define PORT_PC14L_GMAC_GRX3                       (_UINT32_(1) << 14)
1614 
1615 #define PIN_PC18L_GMAC_GRXCK                       _UINT32_(82)
1616 #define MUX_PC18L_GMAC_GRXCK                       _UINT32_(11)
1617 #define PINMUX_PC18L_GMAC_GRXCK                    ((PIN_PC18L_GMAC_GRXCK << 16) | MUX_PC18L_GMAC_GRXCK)
1618 #define PORT_PC18L_GMAC_GRXCK                      (_UINT32_(1) << 18)
1619 
1620 #define PIN_PC20L_GMAC_GRXDV                       _UINT32_(84)
1621 #define MUX_PC20L_GMAC_GRXDV                       _UINT32_(11)
1622 #define PINMUX_PC20L_GMAC_GRXDV                    ((PIN_PC20L_GMAC_GRXDV << 16) | MUX_PC20L_GMAC_GRXDV)
1623 #define PORT_PC20L_GMAC_GRXDV                      (_UINT32_(1) << 20)
1624 
1625 #define PIN_PA15L_GMAC_GRXER                       _UINT32_(15)
1626 #define MUX_PA15L_GMAC_GRXER                       _UINT32_(11)
1627 #define PINMUX_PA15L_GMAC_GRXER                    ((PIN_PA15L_GMAC_GRXER << 16) | MUX_PA15L_GMAC_GRXER)
1628 #define PORT_PA15L_GMAC_GRXER                      (_UINT32_(1) << 15)
1629 
1630 #define PIN_PA18L_GMAC_GTX0                        _UINT32_(18)
1631 #define MUX_PA18L_GMAC_GTX0                        _UINT32_(11)
1632 #define PINMUX_PA18L_GMAC_GTX0                     ((PIN_PA18L_GMAC_GTX0 << 16) | MUX_PA18L_GMAC_GTX0)
1633 #define PORT_PA18L_GMAC_GTX0                       (_UINT32_(1) << 18)
1634 
1635 #define PIN_PA19L_GMAC_GTX1                        _UINT32_(19)
1636 #define MUX_PA19L_GMAC_GTX1                        _UINT32_(11)
1637 #define PINMUX_PA19L_GMAC_GTX1                     ((PIN_PA19L_GMAC_GTX1 << 16) | MUX_PA19L_GMAC_GTX1)
1638 #define PORT_PA19L_GMAC_GTX1                       (_UINT32_(1) << 19)
1639 
1640 #define PIN_PC16L_GMAC_GTX2                        _UINT32_(80)
1641 #define MUX_PC16L_GMAC_GTX2                        _UINT32_(11)
1642 #define PINMUX_PC16L_GMAC_GTX2                     ((PIN_PC16L_GMAC_GTX2 << 16) | MUX_PC16L_GMAC_GTX2)
1643 #define PORT_PC16L_GMAC_GTX2                       (_UINT32_(1) << 16)
1644 
1645 #define PIN_PC17L_GMAC_GTX3                        _UINT32_(81)
1646 #define MUX_PC17L_GMAC_GTX3                        _UINT32_(11)
1647 #define PINMUX_PC17L_GMAC_GTX3                     ((PIN_PC17L_GMAC_GTX3 << 16) | MUX_PC17L_GMAC_GTX3)
1648 #define PORT_PC17L_GMAC_GTX3                       (_UINT32_(1) << 17)
1649 
1650 #define PIN_PA14L_GMAC_GTXCK                       _UINT32_(14)
1651 #define MUX_PA14L_GMAC_GTXCK                       _UINT32_(11)
1652 #define PINMUX_PA14L_GMAC_GTXCK                    ((PIN_PA14L_GMAC_GTXCK << 16) | MUX_PA14L_GMAC_GTXCK)
1653 #define PORT_PA14L_GMAC_GTXCK                      (_UINT32_(1) << 14)
1654 
1655 #define PIN_PA17L_GMAC_GTXEN                       _UINT32_(17)
1656 #define MUX_PA17L_GMAC_GTXEN                       _UINT32_(11)
1657 #define PINMUX_PA17L_GMAC_GTXEN                    ((PIN_PA17L_GMAC_GTXEN << 16) | MUX_PA17L_GMAC_GTXEN)
1658 #define PORT_PA17L_GMAC_GTXEN                      (_UINT32_(1) << 17)
1659 
1660 #define PIN_PC19L_GMAC_GTXER                       _UINT32_(83)
1661 #define MUX_PC19L_GMAC_GTXER                       _UINT32_(11)
1662 #define PINMUX_PC19L_GMAC_GTXER                    ((PIN_PC19L_GMAC_GTXER << 16) | MUX_PC19L_GMAC_GTXER)
1663 #define PORT_PC19L_GMAC_GTXER                      (_UINT32_(1) << 19)
1664 
1665 /* =================== PORT definition for I2S peripheral =================== */
1666 #define PIN_PA09J_I2S_FS0                          _UINT32_(9)
1667 #define MUX_PA09J_I2S_FS0                          _UINT32_(9)
1668 #define PINMUX_PA09J_I2S_FS0                       ((PIN_PA09J_I2S_FS0 << 16) | MUX_PA09J_I2S_FS0)
1669 #define PORT_PA09J_I2S_FS0                         (_UINT32_(1) << 9)
1670 
1671 #define PIN_PA20J_I2S_FS0                          _UINT32_(20)
1672 #define MUX_PA20J_I2S_FS0                          _UINT32_(9)
1673 #define PINMUX_PA20J_I2S_FS0                       ((PIN_PA20J_I2S_FS0 << 16) | MUX_PA20J_I2S_FS0)
1674 #define PORT_PA20J_I2S_FS0                         (_UINT32_(1) << 20)
1675 
1676 #define PIN_PA23J_I2S_FS1                          _UINT32_(23)
1677 #define MUX_PA23J_I2S_FS1                          _UINT32_(9)
1678 #define PINMUX_PA23J_I2S_FS1                       ((PIN_PA23J_I2S_FS1 << 16) | MUX_PA23J_I2S_FS1)
1679 #define PORT_PA23J_I2S_FS1                         (_UINT32_(1) << 23)
1680 
1681 #define PIN_PB11J_I2S_FS1                          _UINT32_(43)
1682 #define MUX_PB11J_I2S_FS1                          _UINT32_(9)
1683 #define PINMUX_PB11J_I2S_FS1                       ((PIN_PB11J_I2S_FS1 << 16) | MUX_PB11J_I2S_FS1)
1684 #define PORT_PB11J_I2S_FS1                         (_UINT32_(1) << 11)
1685 
1686 #define PIN_PA08J_I2S_MCK0                         _UINT32_(8)
1687 #define MUX_PA08J_I2S_MCK0                         _UINT32_(9)
1688 #define PINMUX_PA08J_I2S_MCK0                      ((PIN_PA08J_I2S_MCK0 << 16) | MUX_PA08J_I2S_MCK0)
1689 #define PORT_PA08J_I2S_MCK0                        (_UINT32_(1) << 8)
1690 
1691 #define PIN_PB17J_I2S_MCK0                         _UINT32_(49)
1692 #define MUX_PB17J_I2S_MCK0                         _UINT32_(9)
1693 #define PINMUX_PB17J_I2S_MCK0                      ((PIN_PB17J_I2S_MCK0 << 16) | MUX_PB17J_I2S_MCK0)
1694 #define PORT_PB17J_I2S_MCK0                        (_UINT32_(1) << 17)
1695 
1696 #define PIN_PB13J_I2S_MCK1                         _UINT32_(45)
1697 #define MUX_PB13J_I2S_MCK1                         _UINT32_(9)
1698 #define PINMUX_PB13J_I2S_MCK1                      ((PIN_PB13J_I2S_MCK1 << 16) | MUX_PB13J_I2S_MCK1)
1699 #define PORT_PB13J_I2S_MCK1                        (_UINT32_(1) << 13)
1700 
1701 #define PIN_PA10J_I2S_SCK0                         _UINT32_(10)
1702 #define MUX_PA10J_I2S_SCK0                         _UINT32_(9)
1703 #define PINMUX_PA10J_I2S_SCK0                      ((PIN_PA10J_I2S_SCK0 << 16) | MUX_PA10J_I2S_SCK0)
1704 #define PORT_PA10J_I2S_SCK0                        (_UINT32_(1) << 10)
1705 
1706 #define PIN_PB16J_I2S_SCK0                         _UINT32_(48)
1707 #define MUX_PB16J_I2S_SCK0                         _UINT32_(9)
1708 #define PINMUX_PB16J_I2S_SCK0                      ((PIN_PB16J_I2S_SCK0 << 16) | MUX_PB16J_I2S_SCK0)
1709 #define PORT_PB16J_I2S_SCK0                        (_UINT32_(1) << 16)
1710 
1711 #define PIN_PB12J_I2S_SCK1                         _UINT32_(44)
1712 #define MUX_PB12J_I2S_SCK1                         _UINT32_(9)
1713 #define PINMUX_PB12J_I2S_SCK1                      ((PIN_PB12J_I2S_SCK1 << 16) | MUX_PB12J_I2S_SCK1)
1714 #define PORT_PB12J_I2S_SCK1                        (_UINT32_(1) << 12)
1715 
1716 #define PIN_PA22J_I2S_SDI                          _UINT32_(22)
1717 #define MUX_PA22J_I2S_SDI                          _UINT32_(9)
1718 #define PINMUX_PA22J_I2S_SDI                       ((PIN_PA22J_I2S_SDI << 16) | MUX_PA22J_I2S_SDI)
1719 #define PORT_PA22J_I2S_SDI                         (_UINT32_(1) << 22)
1720 
1721 #define PIN_PB10J_I2S_SDI                          _UINT32_(42)
1722 #define MUX_PB10J_I2S_SDI                          _UINT32_(9)
1723 #define PINMUX_PB10J_I2S_SDI                       ((PIN_PB10J_I2S_SDI << 16) | MUX_PB10J_I2S_SDI)
1724 #define PORT_PB10J_I2S_SDI                         (_UINT32_(1) << 10)
1725 
1726 #define PIN_PA11J_I2S_SDO                          _UINT32_(11)
1727 #define MUX_PA11J_I2S_SDO                          _UINT32_(9)
1728 #define PINMUX_PA11J_I2S_SDO                       ((PIN_PA11J_I2S_SDO << 16) | MUX_PA11J_I2S_SDO)
1729 #define PORT_PA11J_I2S_SDO                         (_UINT32_(1) << 11)
1730 
1731 #define PIN_PA21J_I2S_SDO                          _UINT32_(21)
1732 #define MUX_PA21J_I2S_SDO                          _UINT32_(9)
1733 #define PINMUX_PA21J_I2S_SDO                       ((PIN_PA21J_I2S_SDO << 16) | MUX_PA21J_I2S_SDO)
1734 #define PORT_PA21J_I2S_SDO                         (_UINT32_(1) << 21)
1735 
1736 /* =================== PORT definition for PCC peripheral =================== */
1737 #define PIN_PA14K_PCC_CLK                          _UINT32_(14)
1738 #define MUX_PA14K_PCC_CLK                          _UINT32_(10)
1739 #define PINMUX_PA14K_PCC_CLK                       ((PIN_PA14K_PCC_CLK << 16) | MUX_PA14K_PCC_CLK)
1740 #define PORT_PA14K_PCC_CLK                         (_UINT32_(1) << 14)
1741 
1742 #define PIN_PA16K_PCC_DATA0                        _UINT32_(16)
1743 #define MUX_PA16K_PCC_DATA0                        _UINT32_(10)
1744 #define PINMUX_PA16K_PCC_DATA0                     ((PIN_PA16K_PCC_DATA0 << 16) | MUX_PA16K_PCC_DATA0)
1745 #define PORT_PA16K_PCC_DATA0                       (_UINT32_(1) << 16)
1746 
1747 #define PIN_PA17K_PCC_DATA1                        _UINT32_(17)
1748 #define MUX_PA17K_PCC_DATA1                        _UINT32_(10)
1749 #define PINMUX_PA17K_PCC_DATA1                     ((PIN_PA17K_PCC_DATA1 << 16) | MUX_PA17K_PCC_DATA1)
1750 #define PORT_PA17K_PCC_DATA1                       (_UINT32_(1) << 17)
1751 
1752 #define PIN_PA18K_PCC_DATA2                        _UINT32_(18)
1753 #define MUX_PA18K_PCC_DATA2                        _UINT32_(10)
1754 #define PINMUX_PA18K_PCC_DATA2                     ((PIN_PA18K_PCC_DATA2 << 16) | MUX_PA18K_PCC_DATA2)
1755 #define PORT_PA18K_PCC_DATA2                       (_UINT32_(1) << 18)
1756 
1757 #define PIN_PA19K_PCC_DATA3                        _UINT32_(19)
1758 #define MUX_PA19K_PCC_DATA3                        _UINT32_(10)
1759 #define PINMUX_PA19K_PCC_DATA3                     ((PIN_PA19K_PCC_DATA3 << 16) | MUX_PA19K_PCC_DATA3)
1760 #define PORT_PA19K_PCC_DATA3                       (_UINT32_(1) << 19)
1761 
1762 #define PIN_PA20K_PCC_DATA4                        _UINT32_(20)
1763 #define MUX_PA20K_PCC_DATA4                        _UINT32_(10)
1764 #define PINMUX_PA20K_PCC_DATA4                     ((PIN_PA20K_PCC_DATA4 << 16) | MUX_PA20K_PCC_DATA4)
1765 #define PORT_PA20K_PCC_DATA4                       (_UINT32_(1) << 20)
1766 
1767 #define PIN_PA21K_PCC_DATA5                        _UINT32_(21)
1768 #define MUX_PA21K_PCC_DATA5                        _UINT32_(10)
1769 #define PINMUX_PA21K_PCC_DATA5                     ((PIN_PA21K_PCC_DATA5 << 16) | MUX_PA21K_PCC_DATA5)
1770 #define PORT_PA21K_PCC_DATA5                       (_UINT32_(1) << 21)
1771 
1772 #define PIN_PA22K_PCC_DATA6                        _UINT32_(22)
1773 #define MUX_PA22K_PCC_DATA6                        _UINT32_(10)
1774 #define PINMUX_PA22K_PCC_DATA6                     ((PIN_PA22K_PCC_DATA6 << 16) | MUX_PA22K_PCC_DATA6)
1775 #define PORT_PA22K_PCC_DATA6                       (_UINT32_(1) << 22)
1776 
1777 #define PIN_PA23K_PCC_DATA7                        _UINT32_(23)
1778 #define MUX_PA23K_PCC_DATA7                        _UINT32_(10)
1779 #define PINMUX_PA23K_PCC_DATA7                     ((PIN_PA23K_PCC_DATA7 << 16) | MUX_PA23K_PCC_DATA7)
1780 #define PORT_PA23K_PCC_DATA7                       (_UINT32_(1) << 23)
1781 
1782 #define PIN_PB14K_PCC_DATA8                        _UINT32_(46)
1783 #define MUX_PB14K_PCC_DATA8                        _UINT32_(10)
1784 #define PINMUX_PB14K_PCC_DATA8                     ((PIN_PB14K_PCC_DATA8 << 16) | MUX_PB14K_PCC_DATA8)
1785 #define PORT_PB14K_PCC_DATA8                       (_UINT32_(1) << 14)
1786 
1787 #define PIN_PB15K_PCC_DATA9                        _UINT32_(47)
1788 #define MUX_PB15K_PCC_DATA9                        _UINT32_(10)
1789 #define PINMUX_PB15K_PCC_DATA9                     ((PIN_PB15K_PCC_DATA9 << 16) | MUX_PB15K_PCC_DATA9)
1790 #define PORT_PB15K_PCC_DATA9                       (_UINT32_(1) << 15)
1791 
1792 #define PIN_PC12K_PCC_DATA10                       _UINT32_(76)
1793 #define MUX_PC12K_PCC_DATA10                       _UINT32_(10)
1794 #define PINMUX_PC12K_PCC_DATA10                    ((PIN_PC12K_PCC_DATA10 << 16) | MUX_PC12K_PCC_DATA10)
1795 #define PORT_PC12K_PCC_DATA10                      (_UINT32_(1) << 12)
1796 
1797 #define PIN_PC13K_PCC_DATA11                       _UINT32_(77)
1798 #define MUX_PC13K_PCC_DATA11                       _UINT32_(10)
1799 #define PINMUX_PC13K_PCC_DATA11                    ((PIN_PC13K_PCC_DATA11 << 16) | MUX_PC13K_PCC_DATA11)
1800 #define PORT_PC13K_PCC_DATA11                      (_UINT32_(1) << 13)
1801 
1802 #define PIN_PC14K_PCC_DATA12                       _UINT32_(78)
1803 #define MUX_PC14K_PCC_DATA12                       _UINT32_(10)
1804 #define PINMUX_PC14K_PCC_DATA12                    ((PIN_PC14K_PCC_DATA12 << 16) | MUX_PC14K_PCC_DATA12)
1805 #define PORT_PC14K_PCC_DATA12                      (_UINT32_(1) << 14)
1806 
1807 #define PIN_PC15K_PCC_DATA13                       _UINT32_(79)
1808 #define MUX_PC15K_PCC_DATA13                       _UINT32_(10)
1809 #define PINMUX_PC15K_PCC_DATA13                    ((PIN_PC15K_PCC_DATA13 << 16) | MUX_PC15K_PCC_DATA13)
1810 #define PORT_PC15K_PCC_DATA13                      (_UINT32_(1) << 15)
1811 
1812 #define PIN_PA12K_PCC_DEN1                         _UINT32_(12)
1813 #define MUX_PA12K_PCC_DEN1                         _UINT32_(10)
1814 #define PINMUX_PA12K_PCC_DEN1                      ((PIN_PA12K_PCC_DEN1 << 16) | MUX_PA12K_PCC_DEN1)
1815 #define PORT_PA12K_PCC_DEN1                        (_UINT32_(1) << 12)
1816 
1817 #define PIN_PA13K_PCC_DEN2                         _UINT32_(13)
1818 #define MUX_PA13K_PCC_DEN2                         _UINT32_(10)
1819 #define PINMUX_PA13K_PCC_DEN2                      ((PIN_PA13K_PCC_DEN2 << 16) | MUX_PA13K_PCC_DEN2)
1820 #define PORT_PA13K_PCC_DEN2                        (_UINT32_(1) << 13)
1821 
1822 /* ================== PORT definition for PDEC peripheral =================== */
1823 #define PIN_PB18G_PDEC_QDI0                        _UINT32_(50)
1824 #define MUX_PB18G_PDEC_QDI0                        _UINT32_(6)
1825 #define PINMUX_PB18G_PDEC_QDI0                     ((PIN_PB18G_PDEC_QDI0 << 16) | MUX_PB18G_PDEC_QDI0)
1826 #define PORT_PB18G_PDEC_QDI0                       (_UINT32_(1) << 18)
1827 
1828 #define PIN_PB23G_PDEC_QDI0                        _UINT32_(55)
1829 #define MUX_PB23G_PDEC_QDI0                        _UINT32_(6)
1830 #define PINMUX_PB23G_PDEC_QDI0                     ((PIN_PB23G_PDEC_QDI0 << 16) | MUX_PB23G_PDEC_QDI0)
1831 #define PORT_PB23G_PDEC_QDI0                       (_UINT32_(1) << 23)
1832 
1833 #define PIN_PC16G_PDEC_QDI0                        _UINT32_(80)
1834 #define MUX_PC16G_PDEC_QDI0                        _UINT32_(6)
1835 #define PINMUX_PC16G_PDEC_QDI0                     ((PIN_PC16G_PDEC_QDI0 << 16) | MUX_PC16G_PDEC_QDI0)
1836 #define PORT_PC16G_PDEC_QDI0                       (_UINT32_(1) << 16)
1837 
1838 #define PIN_PA24G_PDEC_QDI0                        _UINT32_(24)
1839 #define MUX_PA24G_PDEC_QDI0                        _UINT32_(6)
1840 #define PINMUX_PA24G_PDEC_QDI0                     ((PIN_PA24G_PDEC_QDI0 << 16) | MUX_PA24G_PDEC_QDI0)
1841 #define PORT_PA24G_PDEC_QDI0                       (_UINT32_(1) << 24)
1842 
1843 #define PIN_PB19G_PDEC_QDI1                        _UINT32_(51)
1844 #define MUX_PB19G_PDEC_QDI1                        _UINT32_(6)
1845 #define PINMUX_PB19G_PDEC_QDI1                     ((PIN_PB19G_PDEC_QDI1 << 16) | MUX_PB19G_PDEC_QDI1)
1846 #define PORT_PB19G_PDEC_QDI1                       (_UINT32_(1) << 19)
1847 
1848 #define PIN_PB24G_PDEC_QDI1                        _UINT32_(56)
1849 #define MUX_PB24G_PDEC_QDI1                        _UINT32_(6)
1850 #define PINMUX_PB24G_PDEC_QDI1                     ((PIN_PB24G_PDEC_QDI1 << 16) | MUX_PB24G_PDEC_QDI1)
1851 #define PORT_PB24G_PDEC_QDI1                       (_UINT32_(1) << 24)
1852 
1853 #define PIN_PC17G_PDEC_QDI1                        _UINT32_(81)
1854 #define MUX_PC17G_PDEC_QDI1                        _UINT32_(6)
1855 #define PINMUX_PC17G_PDEC_QDI1                     ((PIN_PC17G_PDEC_QDI1 << 16) | MUX_PC17G_PDEC_QDI1)
1856 #define PORT_PC17G_PDEC_QDI1                       (_UINT32_(1) << 17)
1857 
1858 #define PIN_PA25G_PDEC_QDI1                        _UINT32_(25)
1859 #define MUX_PA25G_PDEC_QDI1                        _UINT32_(6)
1860 #define PINMUX_PA25G_PDEC_QDI1                     ((PIN_PA25G_PDEC_QDI1 << 16) | MUX_PA25G_PDEC_QDI1)
1861 #define PORT_PA25G_PDEC_QDI1                       (_UINT32_(1) << 25)
1862 
1863 #define PIN_PB20G_PDEC_QDI2                        _UINT32_(52)
1864 #define MUX_PB20G_PDEC_QDI2                        _UINT32_(6)
1865 #define PINMUX_PB20G_PDEC_QDI2                     ((PIN_PB20G_PDEC_QDI2 << 16) | MUX_PB20G_PDEC_QDI2)
1866 #define PORT_PB20G_PDEC_QDI2                       (_UINT32_(1) << 20)
1867 
1868 #define PIN_PB25G_PDEC_QDI2                        _UINT32_(57)
1869 #define MUX_PB25G_PDEC_QDI2                        _UINT32_(6)
1870 #define PINMUX_PB25G_PDEC_QDI2                     ((PIN_PB25G_PDEC_QDI2 << 16) | MUX_PB25G_PDEC_QDI2)
1871 #define PORT_PB25G_PDEC_QDI2                       (_UINT32_(1) << 25)
1872 
1873 #define PIN_PC18G_PDEC_QDI2                        _UINT32_(82)
1874 #define MUX_PC18G_PDEC_QDI2                        _UINT32_(6)
1875 #define PINMUX_PC18G_PDEC_QDI2                     ((PIN_PC18G_PDEC_QDI2 << 16) | MUX_PC18G_PDEC_QDI2)
1876 #define PORT_PC18G_PDEC_QDI2                       (_UINT32_(1) << 18)
1877 
1878 #define PIN_PB22G_PDEC_QDI2                        _UINT32_(54)
1879 #define MUX_PB22G_PDEC_QDI2                        _UINT32_(6)
1880 #define PINMUX_PB22G_PDEC_QDI2                     ((PIN_PB22G_PDEC_QDI2 << 16) | MUX_PB22G_PDEC_QDI2)
1881 #define PORT_PB22G_PDEC_QDI2                       (_UINT32_(1) << 22)
1882 
1883 /* ================== PORT definition for QSPI peripheral =================== */
1884 #define PIN_PB11H_QSPI_CS                          _UINT32_(43)
1885 #define MUX_PB11H_QSPI_CS                          _UINT32_(7)
1886 #define PINMUX_PB11H_QSPI_CS                       ((PIN_PB11H_QSPI_CS << 16) | MUX_PB11H_QSPI_CS)
1887 #define PORT_PB11H_QSPI_CS                         (_UINT32_(1) << 11)
1888 
1889 #define PIN_PA08H_QSPI_DATA0                       _UINT32_(8)
1890 #define MUX_PA08H_QSPI_DATA0                       _UINT32_(7)
1891 #define PINMUX_PA08H_QSPI_DATA0                    ((PIN_PA08H_QSPI_DATA0 << 16) | MUX_PA08H_QSPI_DATA0)
1892 #define PORT_PA08H_QSPI_DATA0                      (_UINT32_(1) << 8)
1893 
1894 #define PIN_PA09H_QSPI_DATA1                       _UINT32_(9)
1895 #define MUX_PA09H_QSPI_DATA1                       _UINT32_(7)
1896 #define PINMUX_PA09H_QSPI_DATA1                    ((PIN_PA09H_QSPI_DATA1 << 16) | MUX_PA09H_QSPI_DATA1)
1897 #define PORT_PA09H_QSPI_DATA1                      (_UINT32_(1) << 9)
1898 
1899 #define PIN_PA10H_QSPI_DATA2                       _UINT32_(10)
1900 #define MUX_PA10H_QSPI_DATA2                       _UINT32_(7)
1901 #define PINMUX_PA10H_QSPI_DATA2                    ((PIN_PA10H_QSPI_DATA2 << 16) | MUX_PA10H_QSPI_DATA2)
1902 #define PORT_PA10H_QSPI_DATA2                      (_UINT32_(1) << 10)
1903 
1904 #define PIN_PA11H_QSPI_DATA3                       _UINT32_(11)
1905 #define MUX_PA11H_QSPI_DATA3                       _UINT32_(7)
1906 #define PINMUX_PA11H_QSPI_DATA3                    ((PIN_PA11H_QSPI_DATA3 << 16) | MUX_PA11H_QSPI_DATA3)
1907 #define PORT_PA11H_QSPI_DATA3                      (_UINT32_(1) << 11)
1908 
1909 #define PIN_PB10H_QSPI_SCK                         _UINT32_(42)
1910 #define MUX_PB10H_QSPI_SCK                         _UINT32_(7)
1911 #define PINMUX_PB10H_QSPI_SCK                      ((PIN_PB10H_QSPI_SCK << 16) | MUX_PB10H_QSPI_SCK)
1912 #define PORT_PB10H_QSPI_SCK                        (_UINT32_(1) << 10)
1913 
1914 /* ================== PORT definition for SDHC0 peripheral ================== */
1915 #define PIN_PA06I_SDHC0_SDCD                       _UINT32_(6)
1916 #define MUX_PA06I_SDHC0_SDCD                       _UINT32_(8)
1917 #define PINMUX_PA06I_SDHC0_SDCD                    ((PIN_PA06I_SDHC0_SDCD << 16) | MUX_PA06I_SDHC0_SDCD)
1918 #define PORT_PA06I_SDHC0_SDCD                      (_UINT32_(1) << 6)
1919 
1920 #define PIN_PA12I_SDHC0_SDCD                       _UINT32_(12)
1921 #define MUX_PA12I_SDHC0_SDCD                       _UINT32_(8)
1922 #define PINMUX_PA12I_SDHC0_SDCD                    ((PIN_PA12I_SDHC0_SDCD << 16) | MUX_PA12I_SDHC0_SDCD)
1923 #define PORT_PA12I_SDHC0_SDCD                      (_UINT32_(1) << 12)
1924 
1925 #define PIN_PB12I_SDHC0_SDCD                       _UINT32_(44)
1926 #define MUX_PB12I_SDHC0_SDCD                       _UINT32_(8)
1927 #define PINMUX_PB12I_SDHC0_SDCD                    ((PIN_PB12I_SDHC0_SDCD << 16) | MUX_PB12I_SDHC0_SDCD)
1928 #define PORT_PB12I_SDHC0_SDCD                      (_UINT32_(1) << 12)
1929 
1930 #define PIN_PC06I_SDHC0_SDCD                       _UINT32_(70)
1931 #define MUX_PC06I_SDHC0_SDCD                       _UINT32_(8)
1932 #define PINMUX_PC06I_SDHC0_SDCD                    ((PIN_PC06I_SDHC0_SDCD << 16) | MUX_PC06I_SDHC0_SDCD)
1933 #define PORT_PC06I_SDHC0_SDCD                      (_UINT32_(1) << 6)
1934 
1935 #define PIN_PB11I_SDHC0_SDCK                       _UINT32_(43)
1936 #define MUX_PB11I_SDHC0_SDCK                       _UINT32_(8)
1937 #define PINMUX_PB11I_SDHC0_SDCK                    ((PIN_PB11I_SDHC0_SDCK << 16) | MUX_PB11I_SDHC0_SDCK)
1938 #define PORT_PB11I_SDHC0_SDCK                      (_UINT32_(1) << 11)
1939 
1940 #define PIN_PA08I_SDHC0_SDCMD                      _UINT32_(8)
1941 #define MUX_PA08I_SDHC0_SDCMD                      _UINT32_(8)
1942 #define PINMUX_PA08I_SDHC0_SDCMD                   ((PIN_PA08I_SDHC0_SDCMD << 16) | MUX_PA08I_SDHC0_SDCMD)
1943 #define PORT_PA08I_SDHC0_SDCMD                     (_UINT32_(1) << 8)
1944 
1945 #define PIN_PA09I_SDHC0_SDDAT0                     _UINT32_(9)
1946 #define MUX_PA09I_SDHC0_SDDAT0                     _UINT32_(8)
1947 #define PINMUX_PA09I_SDHC0_SDDAT0                  ((PIN_PA09I_SDHC0_SDDAT0 << 16) | MUX_PA09I_SDHC0_SDDAT0)
1948 #define PORT_PA09I_SDHC0_SDDAT0                    (_UINT32_(1) << 9)
1949 
1950 #define PIN_PA10I_SDHC0_SDDAT1                     _UINT32_(10)
1951 #define MUX_PA10I_SDHC0_SDDAT1                     _UINT32_(8)
1952 #define PINMUX_PA10I_SDHC0_SDDAT1                  ((PIN_PA10I_SDHC0_SDDAT1 << 16) | MUX_PA10I_SDHC0_SDDAT1)
1953 #define PORT_PA10I_SDHC0_SDDAT1                    (_UINT32_(1) << 10)
1954 
1955 #define PIN_PA11I_SDHC0_SDDAT2                     _UINT32_(11)
1956 #define MUX_PA11I_SDHC0_SDDAT2                     _UINT32_(8)
1957 #define PINMUX_PA11I_SDHC0_SDDAT2                  ((PIN_PA11I_SDHC0_SDDAT2 << 16) | MUX_PA11I_SDHC0_SDDAT2)
1958 #define PORT_PA11I_SDHC0_SDDAT2                    (_UINT32_(1) << 11)
1959 
1960 #define PIN_PB10I_SDHC0_SDDAT3                     _UINT32_(42)
1961 #define MUX_PB10I_SDHC0_SDDAT3                     _UINT32_(8)
1962 #define PINMUX_PB10I_SDHC0_SDDAT3                  ((PIN_PB10I_SDHC0_SDDAT3 << 16) | MUX_PB10I_SDHC0_SDDAT3)
1963 #define PORT_PB10I_SDHC0_SDDAT3                    (_UINT32_(1) << 10)
1964 
1965 #define PIN_PA07I_SDHC0_SDWP                       _UINT32_(7)
1966 #define MUX_PA07I_SDHC0_SDWP                       _UINT32_(8)
1967 #define PINMUX_PA07I_SDHC0_SDWP                    ((PIN_PA07I_SDHC0_SDWP << 16) | MUX_PA07I_SDHC0_SDWP)
1968 #define PORT_PA07I_SDHC0_SDWP                      (_UINT32_(1) << 7)
1969 
1970 #define PIN_PA13I_SDHC0_SDWP                       _UINT32_(13)
1971 #define MUX_PA13I_SDHC0_SDWP                       _UINT32_(8)
1972 #define PINMUX_PA13I_SDHC0_SDWP                    ((PIN_PA13I_SDHC0_SDWP << 16) | MUX_PA13I_SDHC0_SDWP)
1973 #define PORT_PA13I_SDHC0_SDWP                      (_UINT32_(1) << 13)
1974 
1975 #define PIN_PB13I_SDHC0_SDWP                       _UINT32_(45)
1976 #define MUX_PB13I_SDHC0_SDWP                       _UINT32_(8)
1977 #define PINMUX_PB13I_SDHC0_SDWP                    ((PIN_PB13I_SDHC0_SDWP << 16) | MUX_PB13I_SDHC0_SDWP)
1978 #define PORT_PB13I_SDHC0_SDWP                      (_UINT32_(1) << 13)
1979 
1980 #define PIN_PC07I_SDHC0_SDWP                       _UINT32_(71)
1981 #define MUX_PC07I_SDHC0_SDWP                       _UINT32_(8)
1982 #define PINMUX_PC07I_SDHC0_SDWP                    ((PIN_PC07I_SDHC0_SDWP << 16) | MUX_PC07I_SDHC0_SDWP)
1983 #define PORT_PC07I_SDHC0_SDWP                      (_UINT32_(1) << 7)
1984 
1985 /* ================== PORT definition for SDHC1 peripheral ================== */
1986 #define PIN_PB16I_SDHC1_SDCD                       _UINT32_(48)
1987 #define MUX_PB16I_SDHC1_SDCD                       _UINT32_(8)
1988 #define PINMUX_PB16I_SDHC1_SDCD                    ((PIN_PB16I_SDHC1_SDCD << 16) | MUX_PB16I_SDHC1_SDCD)
1989 #define PORT_PB16I_SDHC1_SDCD                      (_UINT32_(1) << 16)
1990 
1991 #define PIN_PC20I_SDHC1_SDCD                       _UINT32_(84)
1992 #define MUX_PC20I_SDHC1_SDCD                       _UINT32_(8)
1993 #define PINMUX_PC20I_SDHC1_SDCD                    ((PIN_PC20I_SDHC1_SDCD << 16) | MUX_PC20I_SDHC1_SDCD)
1994 #define PORT_PC20I_SDHC1_SDCD                      (_UINT32_(1) << 20)
1995 
1996 #define PIN_PA21I_SDHC1_SDCK                       _UINT32_(21)
1997 #define MUX_PA21I_SDHC1_SDCK                       _UINT32_(8)
1998 #define PINMUX_PA21I_SDHC1_SDCK                    ((PIN_PA21I_SDHC1_SDCK << 16) | MUX_PA21I_SDHC1_SDCK)
1999 #define PORT_PA21I_SDHC1_SDCK                      (_UINT32_(1) << 21)
2000 
2001 #define PIN_PA20I_SDHC1_SDCMD                      _UINT32_(20)
2002 #define MUX_PA20I_SDHC1_SDCMD                      _UINT32_(8)
2003 #define PINMUX_PA20I_SDHC1_SDCMD                   ((PIN_PA20I_SDHC1_SDCMD << 16) | MUX_PA20I_SDHC1_SDCMD)
2004 #define PORT_PA20I_SDHC1_SDCMD                     (_UINT32_(1) << 20)
2005 
2006 #define PIN_PB18I_SDHC1_SDDAT0                     _UINT32_(50)
2007 #define MUX_PB18I_SDHC1_SDDAT0                     _UINT32_(8)
2008 #define PINMUX_PB18I_SDHC1_SDDAT0                  ((PIN_PB18I_SDHC1_SDDAT0 << 16) | MUX_PB18I_SDHC1_SDDAT0)
2009 #define PORT_PB18I_SDHC1_SDDAT0                    (_UINT32_(1) << 18)
2010 
2011 #define PIN_PB19I_SDHC1_SDDAT1                     _UINT32_(51)
2012 #define MUX_PB19I_SDHC1_SDDAT1                     _UINT32_(8)
2013 #define PINMUX_PB19I_SDHC1_SDDAT1                  ((PIN_PB19I_SDHC1_SDDAT1 << 16) | MUX_PB19I_SDHC1_SDDAT1)
2014 #define PORT_PB19I_SDHC1_SDDAT1                    (_UINT32_(1) << 19)
2015 
2016 #define PIN_PB20I_SDHC1_SDDAT2                     _UINT32_(52)
2017 #define MUX_PB20I_SDHC1_SDDAT2                     _UINT32_(8)
2018 #define PINMUX_PB20I_SDHC1_SDDAT2                  ((PIN_PB20I_SDHC1_SDDAT2 << 16) | MUX_PB20I_SDHC1_SDDAT2)
2019 #define PORT_PB20I_SDHC1_SDDAT2                    (_UINT32_(1) << 20)
2020 
2021 #define PIN_PB21I_SDHC1_SDDAT3                     _UINT32_(53)
2022 #define MUX_PB21I_SDHC1_SDDAT3                     _UINT32_(8)
2023 #define PINMUX_PB21I_SDHC1_SDDAT3                  ((PIN_PB21I_SDHC1_SDDAT3 << 16) | MUX_PB21I_SDHC1_SDDAT3)
2024 #define PORT_PB21I_SDHC1_SDDAT3                    (_UINT32_(1) << 21)
2025 
2026 #define PIN_PB17I_SDHC1_SDWP                       _UINT32_(49)
2027 #define MUX_PB17I_SDHC1_SDWP                       _UINT32_(8)
2028 #define PINMUX_PB17I_SDHC1_SDWP                    ((PIN_PB17I_SDHC1_SDWP << 16) | MUX_PB17I_SDHC1_SDWP)
2029 #define PORT_PB17I_SDHC1_SDWP                      (_UINT32_(1) << 17)
2030 
2031 #define PIN_PC21I_SDHC1_SDWP                       _UINT32_(85)
2032 #define MUX_PC21I_SDHC1_SDWP                       _UINT32_(8)
2033 #define PINMUX_PC21I_SDHC1_SDWP                    ((PIN_PC21I_SDHC1_SDWP << 16) | MUX_PC21I_SDHC1_SDWP)
2034 #define PORT_PC21I_SDHC1_SDWP                      (_UINT32_(1) << 21)
2035 
2036 /* ================= PORT definition for SERCOM0 peripheral ================= */
2037 #define PIN_PA04D_SERCOM0_PAD0                     _UINT32_(4)
2038 #define MUX_PA04D_SERCOM0_PAD0                     _UINT32_(3)
2039 #define PINMUX_PA04D_SERCOM0_PAD0                  ((PIN_PA04D_SERCOM0_PAD0 << 16) | MUX_PA04D_SERCOM0_PAD0)
2040 #define PORT_PA04D_SERCOM0_PAD0                    (_UINT32_(1) << 4)
2041 
2042 #define PIN_PC17D_SERCOM0_PAD0                     _UINT32_(81)
2043 #define MUX_PC17D_SERCOM0_PAD0                     _UINT32_(3)
2044 #define PINMUX_PC17D_SERCOM0_PAD0                  ((PIN_PC17D_SERCOM0_PAD0 << 16) | MUX_PC17D_SERCOM0_PAD0)
2045 #define PORT_PC17D_SERCOM0_PAD0                    (_UINT32_(1) << 17)
2046 
2047 #define PIN_PA08C_SERCOM0_PAD0                     _UINT32_(8)
2048 #define MUX_PA08C_SERCOM0_PAD0                     _UINT32_(2)
2049 #define PINMUX_PA08C_SERCOM0_PAD0                  ((PIN_PA08C_SERCOM0_PAD0 << 16) | MUX_PA08C_SERCOM0_PAD0)
2050 #define PORT_PA08C_SERCOM0_PAD0                    (_UINT32_(1) << 8)
2051 
2052 #define PIN_PB24C_SERCOM0_PAD0                     _UINT32_(56)
2053 #define MUX_PB24C_SERCOM0_PAD0                     _UINT32_(2)
2054 #define PINMUX_PB24C_SERCOM0_PAD0                  ((PIN_PB24C_SERCOM0_PAD0 << 16) | MUX_PB24C_SERCOM0_PAD0)
2055 #define PORT_PB24C_SERCOM0_PAD0                    (_UINT32_(1) << 24)
2056 
2057 #define PIN_PA05D_SERCOM0_PAD1                     _UINT32_(5)
2058 #define MUX_PA05D_SERCOM0_PAD1                     _UINT32_(3)
2059 #define PINMUX_PA05D_SERCOM0_PAD1                  ((PIN_PA05D_SERCOM0_PAD1 << 16) | MUX_PA05D_SERCOM0_PAD1)
2060 #define PORT_PA05D_SERCOM0_PAD1                    (_UINT32_(1) << 5)
2061 
2062 #define PIN_PC16D_SERCOM0_PAD1                     _UINT32_(80)
2063 #define MUX_PC16D_SERCOM0_PAD1                     _UINT32_(3)
2064 #define PINMUX_PC16D_SERCOM0_PAD1                  ((PIN_PC16D_SERCOM0_PAD1 << 16) | MUX_PC16D_SERCOM0_PAD1)
2065 #define PORT_PC16D_SERCOM0_PAD1                    (_UINT32_(1) << 16)
2066 
2067 #define PIN_PA09C_SERCOM0_PAD1                     _UINT32_(9)
2068 #define MUX_PA09C_SERCOM0_PAD1                     _UINT32_(2)
2069 #define PINMUX_PA09C_SERCOM0_PAD1                  ((PIN_PA09C_SERCOM0_PAD1 << 16) | MUX_PA09C_SERCOM0_PAD1)
2070 #define PORT_PA09C_SERCOM0_PAD1                    (_UINT32_(1) << 9)
2071 
2072 #define PIN_PB25C_SERCOM0_PAD1                     _UINT32_(57)
2073 #define MUX_PB25C_SERCOM0_PAD1                     _UINT32_(2)
2074 #define PINMUX_PB25C_SERCOM0_PAD1                  ((PIN_PB25C_SERCOM0_PAD1 << 16) | MUX_PB25C_SERCOM0_PAD1)
2075 #define PORT_PB25C_SERCOM0_PAD1                    (_UINT32_(1) << 25)
2076 
2077 #define PIN_PA06D_SERCOM0_PAD2                     _UINT32_(6)
2078 #define MUX_PA06D_SERCOM0_PAD2                     _UINT32_(3)
2079 #define PINMUX_PA06D_SERCOM0_PAD2                  ((PIN_PA06D_SERCOM0_PAD2 << 16) | MUX_PA06D_SERCOM0_PAD2)
2080 #define PORT_PA06D_SERCOM0_PAD2                    (_UINT32_(1) << 6)
2081 
2082 #define PIN_PC18D_SERCOM0_PAD2                     _UINT32_(82)
2083 #define MUX_PC18D_SERCOM0_PAD2                     _UINT32_(3)
2084 #define PINMUX_PC18D_SERCOM0_PAD2                  ((PIN_PC18D_SERCOM0_PAD2 << 16) | MUX_PC18D_SERCOM0_PAD2)
2085 #define PORT_PC18D_SERCOM0_PAD2                    (_UINT32_(1) << 18)
2086 
2087 #define PIN_PA10C_SERCOM0_PAD2                     _UINT32_(10)
2088 #define MUX_PA10C_SERCOM0_PAD2                     _UINT32_(2)
2089 #define PINMUX_PA10C_SERCOM0_PAD2                  ((PIN_PA10C_SERCOM0_PAD2 << 16) | MUX_PA10C_SERCOM0_PAD2)
2090 #define PORT_PA10C_SERCOM0_PAD2                    (_UINT32_(1) << 10)
2091 
2092 #define PIN_PC24C_SERCOM0_PAD2                     _UINT32_(88)
2093 #define MUX_PC24C_SERCOM0_PAD2                     _UINT32_(2)
2094 #define PINMUX_PC24C_SERCOM0_PAD2                  ((PIN_PC24C_SERCOM0_PAD2 << 16) | MUX_PC24C_SERCOM0_PAD2)
2095 #define PORT_PC24C_SERCOM0_PAD2                    (_UINT32_(1) << 24)
2096 
2097 #define PIN_PA07D_SERCOM0_PAD3                     _UINT32_(7)
2098 #define MUX_PA07D_SERCOM0_PAD3                     _UINT32_(3)
2099 #define PINMUX_PA07D_SERCOM0_PAD3                  ((PIN_PA07D_SERCOM0_PAD3 << 16) | MUX_PA07D_SERCOM0_PAD3)
2100 #define PORT_PA07D_SERCOM0_PAD3                    (_UINT32_(1) << 7)
2101 
2102 #define PIN_PC19D_SERCOM0_PAD3                     _UINT32_(83)
2103 #define MUX_PC19D_SERCOM0_PAD3                     _UINT32_(3)
2104 #define PINMUX_PC19D_SERCOM0_PAD3                  ((PIN_PC19D_SERCOM0_PAD3 << 16) | MUX_PC19D_SERCOM0_PAD3)
2105 #define PORT_PC19D_SERCOM0_PAD3                    (_UINT32_(1) << 19)
2106 
2107 #define PIN_PA11C_SERCOM0_PAD3                     _UINT32_(11)
2108 #define MUX_PA11C_SERCOM0_PAD3                     _UINT32_(2)
2109 #define PINMUX_PA11C_SERCOM0_PAD3                  ((PIN_PA11C_SERCOM0_PAD3 << 16) | MUX_PA11C_SERCOM0_PAD3)
2110 #define PORT_PA11C_SERCOM0_PAD3                    (_UINT32_(1) << 11)
2111 
2112 #define PIN_PC25C_SERCOM0_PAD3                     _UINT32_(89)
2113 #define MUX_PC25C_SERCOM0_PAD3                     _UINT32_(2)
2114 #define PINMUX_PC25C_SERCOM0_PAD3                  ((PIN_PC25C_SERCOM0_PAD3 << 16) | MUX_PC25C_SERCOM0_PAD3)
2115 #define PORT_PC25C_SERCOM0_PAD3                    (_UINT32_(1) << 25)
2116 
2117 /* ================= PORT definition for SERCOM1 peripheral ================= */
2118 #define PIN_PA00D_SERCOM1_PAD0                     _UINT32_(0)
2119 #define MUX_PA00D_SERCOM1_PAD0                     _UINT32_(3)
2120 #define PINMUX_PA00D_SERCOM1_PAD0                  ((PIN_PA00D_SERCOM1_PAD0 << 16) | MUX_PA00D_SERCOM1_PAD0)
2121 #define PORT_PA00D_SERCOM1_PAD0                    (_UINT32_(1) << 0)
2122 
2123 #define PIN_PA16C_SERCOM1_PAD0                     _UINT32_(16)
2124 #define MUX_PA16C_SERCOM1_PAD0                     _UINT32_(2)
2125 #define PINMUX_PA16C_SERCOM1_PAD0                  ((PIN_PA16C_SERCOM1_PAD0 << 16) | MUX_PA16C_SERCOM1_PAD0)
2126 #define PORT_PA16C_SERCOM1_PAD0                    (_UINT32_(1) << 16)
2127 
2128 #define PIN_PC27C_SERCOM1_PAD0                     _UINT32_(91)
2129 #define MUX_PC27C_SERCOM1_PAD0                     _UINT32_(2)
2130 #define PINMUX_PC27C_SERCOM1_PAD0                  ((PIN_PC27C_SERCOM1_PAD0 << 16) | MUX_PC27C_SERCOM1_PAD0)
2131 #define PORT_PC27C_SERCOM1_PAD0                    (_UINT32_(1) << 27)
2132 
2133 #define PIN_PA01D_SERCOM1_PAD1                     _UINT32_(1)
2134 #define MUX_PA01D_SERCOM1_PAD1                     _UINT32_(3)
2135 #define PINMUX_PA01D_SERCOM1_PAD1                  ((PIN_PA01D_SERCOM1_PAD1 << 16) | MUX_PA01D_SERCOM1_PAD1)
2136 #define PORT_PA01D_SERCOM1_PAD1                    (_UINT32_(1) << 1)
2137 
2138 #define PIN_PA17C_SERCOM1_PAD1                     _UINT32_(17)
2139 #define MUX_PA17C_SERCOM1_PAD1                     _UINT32_(2)
2140 #define PINMUX_PA17C_SERCOM1_PAD1                  ((PIN_PA17C_SERCOM1_PAD1 << 16) | MUX_PA17C_SERCOM1_PAD1)
2141 #define PORT_PA17C_SERCOM1_PAD1                    (_UINT32_(1) << 17)
2142 
2143 #define PIN_PC28C_SERCOM1_PAD1                     _UINT32_(92)
2144 #define MUX_PC28C_SERCOM1_PAD1                     _UINT32_(2)
2145 #define PINMUX_PC28C_SERCOM1_PAD1                  ((PIN_PC28C_SERCOM1_PAD1 << 16) | MUX_PC28C_SERCOM1_PAD1)
2146 #define PORT_PC28C_SERCOM1_PAD1                    (_UINT32_(1) << 28)
2147 
2148 #define PIN_PA30D_SERCOM1_PAD2                     _UINT32_(30)
2149 #define MUX_PA30D_SERCOM1_PAD2                     _UINT32_(3)
2150 #define PINMUX_PA30D_SERCOM1_PAD2                  ((PIN_PA30D_SERCOM1_PAD2 << 16) | MUX_PA30D_SERCOM1_PAD2)
2151 #define PORT_PA30D_SERCOM1_PAD2                    (_UINT32_(1) << 30)
2152 
2153 #define PIN_PA18C_SERCOM1_PAD2                     _UINT32_(18)
2154 #define MUX_PA18C_SERCOM1_PAD2                     _UINT32_(2)
2155 #define PINMUX_PA18C_SERCOM1_PAD2                  ((PIN_PA18C_SERCOM1_PAD2 << 16) | MUX_PA18C_SERCOM1_PAD2)
2156 #define PORT_PA18C_SERCOM1_PAD2                    (_UINT32_(1) << 18)
2157 
2158 #define PIN_PB22C_SERCOM1_PAD2                     _UINT32_(54)
2159 #define MUX_PB22C_SERCOM1_PAD2                     _UINT32_(2)
2160 #define PINMUX_PB22C_SERCOM1_PAD2                  ((PIN_PB22C_SERCOM1_PAD2 << 16) | MUX_PB22C_SERCOM1_PAD2)
2161 #define PORT_PB22C_SERCOM1_PAD2                    (_UINT32_(1) << 22)
2162 
2163 #define PIN_PA31D_SERCOM1_PAD3                     _UINT32_(31)
2164 #define MUX_PA31D_SERCOM1_PAD3                     _UINT32_(3)
2165 #define PINMUX_PA31D_SERCOM1_PAD3                  ((PIN_PA31D_SERCOM1_PAD3 << 16) | MUX_PA31D_SERCOM1_PAD3)
2166 #define PORT_PA31D_SERCOM1_PAD3                    (_UINT32_(1) << 31)
2167 
2168 #define PIN_PA19C_SERCOM1_PAD3                     _UINT32_(19)
2169 #define MUX_PA19C_SERCOM1_PAD3                     _UINT32_(2)
2170 #define PINMUX_PA19C_SERCOM1_PAD3                  ((PIN_PA19C_SERCOM1_PAD3 << 16) | MUX_PA19C_SERCOM1_PAD3)
2171 #define PORT_PA19C_SERCOM1_PAD3                    (_UINT32_(1) << 19)
2172 
2173 #define PIN_PB23C_SERCOM1_PAD3                     _UINT32_(55)
2174 #define MUX_PB23C_SERCOM1_PAD3                     _UINT32_(2)
2175 #define PINMUX_PB23C_SERCOM1_PAD3                  ((PIN_PB23C_SERCOM1_PAD3 << 16) | MUX_PB23C_SERCOM1_PAD3)
2176 #define PORT_PB23C_SERCOM1_PAD3                    (_UINT32_(1) << 23)
2177 
2178 /* ================= PORT definition for SERCOM2 peripheral ================= */
2179 #define PIN_PA09D_SERCOM2_PAD0                     _UINT32_(9)
2180 #define MUX_PA09D_SERCOM2_PAD0                     _UINT32_(3)
2181 #define PINMUX_PA09D_SERCOM2_PAD0                  ((PIN_PA09D_SERCOM2_PAD0 << 16) | MUX_PA09D_SERCOM2_PAD0)
2182 #define PORT_PA09D_SERCOM2_PAD0                    (_UINT32_(1) << 9)
2183 
2184 #define PIN_PB25D_SERCOM2_PAD0                     _UINT32_(57)
2185 #define MUX_PB25D_SERCOM2_PAD0                     _UINT32_(3)
2186 #define PINMUX_PB25D_SERCOM2_PAD0                  ((PIN_PB25D_SERCOM2_PAD0 << 16) | MUX_PB25D_SERCOM2_PAD0)
2187 #define PORT_PB25D_SERCOM2_PAD0                    (_UINT32_(1) << 25)
2188 
2189 #define PIN_PA12C_SERCOM2_PAD0                     _UINT32_(12)
2190 #define MUX_PA12C_SERCOM2_PAD0                     _UINT32_(2)
2191 #define PINMUX_PA12C_SERCOM2_PAD0                  ((PIN_PA12C_SERCOM2_PAD0 << 16) | MUX_PA12C_SERCOM2_PAD0)
2192 #define PORT_PA12C_SERCOM2_PAD0                    (_UINT32_(1) << 12)
2193 
2194 #define PIN_PA08D_SERCOM2_PAD1                     _UINT32_(8)
2195 #define MUX_PA08D_SERCOM2_PAD1                     _UINT32_(3)
2196 #define PINMUX_PA08D_SERCOM2_PAD1                  ((PIN_PA08D_SERCOM2_PAD1 << 16) | MUX_PA08D_SERCOM2_PAD1)
2197 #define PORT_PA08D_SERCOM2_PAD1                    (_UINT32_(1) << 8)
2198 
2199 #define PIN_PB24D_SERCOM2_PAD1                     _UINT32_(56)
2200 #define MUX_PB24D_SERCOM2_PAD1                     _UINT32_(3)
2201 #define PINMUX_PB24D_SERCOM2_PAD1                  ((PIN_PB24D_SERCOM2_PAD1 << 16) | MUX_PB24D_SERCOM2_PAD1)
2202 #define PORT_PB24D_SERCOM2_PAD1                    (_UINT32_(1) << 24)
2203 
2204 #define PIN_PA13C_SERCOM2_PAD1                     _UINT32_(13)
2205 #define MUX_PA13C_SERCOM2_PAD1                     _UINT32_(2)
2206 #define PINMUX_PA13C_SERCOM2_PAD1                  ((PIN_PA13C_SERCOM2_PAD1 << 16) | MUX_PA13C_SERCOM2_PAD1)
2207 #define PORT_PA13C_SERCOM2_PAD1                    (_UINT32_(1) << 13)
2208 
2209 #define PIN_PA10D_SERCOM2_PAD2                     _UINT32_(10)
2210 #define MUX_PA10D_SERCOM2_PAD2                     _UINT32_(3)
2211 #define PINMUX_PA10D_SERCOM2_PAD2                  ((PIN_PA10D_SERCOM2_PAD2 << 16) | MUX_PA10D_SERCOM2_PAD2)
2212 #define PORT_PA10D_SERCOM2_PAD2                    (_UINT32_(1) << 10)
2213 
2214 #define PIN_PC24D_SERCOM2_PAD2                     _UINT32_(88)
2215 #define MUX_PC24D_SERCOM2_PAD2                     _UINT32_(3)
2216 #define PINMUX_PC24D_SERCOM2_PAD2                  ((PIN_PC24D_SERCOM2_PAD2 << 16) | MUX_PC24D_SERCOM2_PAD2)
2217 #define PORT_PC24D_SERCOM2_PAD2                    (_UINT32_(1) << 24)
2218 
2219 #define PIN_PA14C_SERCOM2_PAD2                     _UINT32_(14)
2220 #define MUX_PA14C_SERCOM2_PAD2                     _UINT32_(2)
2221 #define PINMUX_PA14C_SERCOM2_PAD2                  ((PIN_PA14C_SERCOM2_PAD2 << 16) | MUX_PA14C_SERCOM2_PAD2)
2222 #define PORT_PA14C_SERCOM2_PAD2                    (_UINT32_(1) << 14)
2223 
2224 #define PIN_PA11D_SERCOM2_PAD3                     _UINT32_(11)
2225 #define MUX_PA11D_SERCOM2_PAD3                     _UINT32_(3)
2226 #define PINMUX_PA11D_SERCOM2_PAD3                  ((PIN_PA11D_SERCOM2_PAD3 << 16) | MUX_PA11D_SERCOM2_PAD3)
2227 #define PORT_PA11D_SERCOM2_PAD3                    (_UINT32_(1) << 11)
2228 
2229 #define PIN_PC25D_SERCOM2_PAD3                     _UINT32_(89)
2230 #define MUX_PC25D_SERCOM2_PAD3                     _UINT32_(3)
2231 #define PINMUX_PC25D_SERCOM2_PAD3                  ((PIN_PC25D_SERCOM2_PAD3 << 16) | MUX_PC25D_SERCOM2_PAD3)
2232 #define PORT_PC25D_SERCOM2_PAD3                    (_UINT32_(1) << 25)
2233 
2234 #define PIN_PA15C_SERCOM2_PAD3                     _UINT32_(15)
2235 #define MUX_PA15C_SERCOM2_PAD3                     _UINT32_(2)
2236 #define PINMUX_PA15C_SERCOM2_PAD3                  ((PIN_PA15C_SERCOM2_PAD3 << 16) | MUX_PA15C_SERCOM2_PAD3)
2237 #define PORT_PA15C_SERCOM2_PAD3                    (_UINT32_(1) << 15)
2238 
2239 /* ================= PORT definition for SERCOM3 peripheral ================= */
2240 #define PIN_PA17D_SERCOM3_PAD0                     _UINT32_(17)
2241 #define MUX_PA17D_SERCOM3_PAD0                     _UINT32_(3)
2242 #define PINMUX_PA17D_SERCOM3_PAD0                  ((PIN_PA17D_SERCOM3_PAD0 << 16) | MUX_PA17D_SERCOM3_PAD0)
2243 #define PORT_PA17D_SERCOM3_PAD0                    (_UINT32_(1) << 17)
2244 
2245 #define PIN_PA22C_SERCOM3_PAD0                     _UINT32_(22)
2246 #define MUX_PA22C_SERCOM3_PAD0                     _UINT32_(2)
2247 #define PINMUX_PA22C_SERCOM3_PAD0                  ((PIN_PA22C_SERCOM3_PAD0 << 16) | MUX_PA22C_SERCOM3_PAD0)
2248 #define PORT_PA22C_SERCOM3_PAD0                    (_UINT32_(1) << 22)
2249 
2250 #define PIN_PB20C_SERCOM3_PAD0                     _UINT32_(52)
2251 #define MUX_PB20C_SERCOM3_PAD0                     _UINT32_(2)
2252 #define PINMUX_PB20C_SERCOM3_PAD0                  ((PIN_PB20C_SERCOM3_PAD0 << 16) | MUX_PB20C_SERCOM3_PAD0)
2253 #define PORT_PB20C_SERCOM3_PAD0                    (_UINT32_(1) << 20)
2254 
2255 #define PIN_PA16D_SERCOM3_PAD1                     _UINT32_(16)
2256 #define MUX_PA16D_SERCOM3_PAD1                     _UINT32_(3)
2257 #define PINMUX_PA16D_SERCOM3_PAD1                  ((PIN_PA16D_SERCOM3_PAD1 << 16) | MUX_PA16D_SERCOM3_PAD1)
2258 #define PORT_PA16D_SERCOM3_PAD1                    (_UINT32_(1) << 16)
2259 
2260 #define PIN_PA23C_SERCOM3_PAD1                     _UINT32_(23)
2261 #define MUX_PA23C_SERCOM3_PAD1                     _UINT32_(2)
2262 #define PINMUX_PA23C_SERCOM3_PAD1                  ((PIN_PA23C_SERCOM3_PAD1 << 16) | MUX_PA23C_SERCOM3_PAD1)
2263 #define PORT_PA23C_SERCOM3_PAD1                    (_UINT32_(1) << 23)
2264 
2265 #define PIN_PB21C_SERCOM3_PAD1                     _UINT32_(53)
2266 #define MUX_PB21C_SERCOM3_PAD1                     _UINT32_(2)
2267 #define PINMUX_PB21C_SERCOM3_PAD1                  ((PIN_PB21C_SERCOM3_PAD1 << 16) | MUX_PB21C_SERCOM3_PAD1)
2268 #define PORT_PB21C_SERCOM3_PAD1                    (_UINT32_(1) << 21)
2269 
2270 #define PIN_PA18D_SERCOM3_PAD2                     _UINT32_(18)
2271 #define MUX_PA18D_SERCOM3_PAD2                     _UINT32_(3)
2272 #define PINMUX_PA18D_SERCOM3_PAD2                  ((PIN_PA18D_SERCOM3_PAD2 << 16) | MUX_PA18D_SERCOM3_PAD2)
2273 #define PORT_PA18D_SERCOM3_PAD2                    (_UINT32_(1) << 18)
2274 
2275 #define PIN_PA20D_SERCOM3_PAD2                     _UINT32_(20)
2276 #define MUX_PA20D_SERCOM3_PAD2                     _UINT32_(3)
2277 #define PINMUX_PA20D_SERCOM3_PAD2                  ((PIN_PA20D_SERCOM3_PAD2 << 16) | MUX_PA20D_SERCOM3_PAD2)
2278 #define PORT_PA20D_SERCOM3_PAD2                    (_UINT32_(1) << 20)
2279 
2280 #define PIN_PA24C_SERCOM3_PAD2                     _UINT32_(24)
2281 #define MUX_PA24C_SERCOM3_PAD2                     _UINT32_(2)
2282 #define PINMUX_PA24C_SERCOM3_PAD2                  ((PIN_PA24C_SERCOM3_PAD2 << 16) | MUX_PA24C_SERCOM3_PAD2)
2283 #define PORT_PA24C_SERCOM3_PAD2                    (_UINT32_(1) << 24)
2284 
2285 #define PIN_PA19D_SERCOM3_PAD3                     _UINT32_(19)
2286 #define MUX_PA19D_SERCOM3_PAD3                     _UINT32_(3)
2287 #define PINMUX_PA19D_SERCOM3_PAD3                  ((PIN_PA19D_SERCOM3_PAD3 << 16) | MUX_PA19D_SERCOM3_PAD3)
2288 #define PORT_PA19D_SERCOM3_PAD3                    (_UINT32_(1) << 19)
2289 
2290 #define PIN_PA21D_SERCOM3_PAD3                     _UINT32_(21)
2291 #define MUX_PA21D_SERCOM3_PAD3                     _UINT32_(3)
2292 #define PINMUX_PA21D_SERCOM3_PAD3                  ((PIN_PA21D_SERCOM3_PAD3 << 16) | MUX_PA21D_SERCOM3_PAD3)
2293 #define PORT_PA21D_SERCOM3_PAD3                    (_UINT32_(1) << 21)
2294 
2295 #define PIN_PA25C_SERCOM3_PAD3                     _UINT32_(25)
2296 #define MUX_PA25C_SERCOM3_PAD3                     _UINT32_(2)
2297 #define PINMUX_PA25C_SERCOM3_PAD3                  ((PIN_PA25C_SERCOM3_PAD3 << 16) | MUX_PA25C_SERCOM3_PAD3)
2298 #define PORT_PA25C_SERCOM3_PAD3                    (_UINT32_(1) << 25)
2299 
2300 /* ================= PORT definition for SERCOM4 peripheral ================= */
2301 #define PIN_PA13D_SERCOM4_PAD0                     _UINT32_(13)
2302 #define MUX_PA13D_SERCOM4_PAD0                     _UINT32_(3)
2303 #define PINMUX_PA13D_SERCOM4_PAD0                  ((PIN_PA13D_SERCOM4_PAD0 << 16) | MUX_PA13D_SERCOM4_PAD0)
2304 #define PORT_PA13D_SERCOM4_PAD0                    (_UINT32_(1) << 13)
2305 
2306 #define PIN_PB08D_SERCOM4_PAD0                     _UINT32_(40)
2307 #define MUX_PB08D_SERCOM4_PAD0                     _UINT32_(3)
2308 #define PINMUX_PB08D_SERCOM4_PAD0                  ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
2309 #define PORT_PB08D_SERCOM4_PAD0                    (_UINT32_(1) << 8)
2310 
2311 #define PIN_PB12C_SERCOM4_PAD0                     _UINT32_(44)
2312 #define MUX_PB12C_SERCOM4_PAD0                     _UINT32_(2)
2313 #define PINMUX_PB12C_SERCOM4_PAD0                  ((PIN_PB12C_SERCOM4_PAD0 << 16) | MUX_PB12C_SERCOM4_PAD0)
2314 #define PORT_PB12C_SERCOM4_PAD0                    (_UINT32_(1) << 12)
2315 
2316 #define PIN_PA12D_SERCOM4_PAD1                     _UINT32_(12)
2317 #define MUX_PA12D_SERCOM4_PAD1                     _UINT32_(3)
2318 #define PINMUX_PA12D_SERCOM4_PAD1                  ((PIN_PA12D_SERCOM4_PAD1 << 16) | MUX_PA12D_SERCOM4_PAD1)
2319 #define PORT_PA12D_SERCOM4_PAD1                    (_UINT32_(1) << 12)
2320 
2321 #define PIN_PB09D_SERCOM4_PAD1                     _UINT32_(41)
2322 #define MUX_PB09D_SERCOM4_PAD1                     _UINT32_(3)
2323 #define PINMUX_PB09D_SERCOM4_PAD1                  ((PIN_PB09D_SERCOM4_PAD1 << 16) | MUX_PB09D_SERCOM4_PAD1)
2324 #define PORT_PB09D_SERCOM4_PAD1                    (_UINT32_(1) << 9)
2325 
2326 #define PIN_PB13C_SERCOM4_PAD1                     _UINT32_(45)
2327 #define MUX_PB13C_SERCOM4_PAD1                     _UINT32_(2)
2328 #define PINMUX_PB13C_SERCOM4_PAD1                  ((PIN_PB13C_SERCOM4_PAD1 << 16) | MUX_PB13C_SERCOM4_PAD1)
2329 #define PORT_PB13C_SERCOM4_PAD1                    (_UINT32_(1) << 13)
2330 
2331 #define PIN_PA14D_SERCOM4_PAD2                     _UINT32_(14)
2332 #define MUX_PA14D_SERCOM4_PAD2                     _UINT32_(3)
2333 #define PINMUX_PA14D_SERCOM4_PAD2                  ((PIN_PA14D_SERCOM4_PAD2 << 16) | MUX_PA14D_SERCOM4_PAD2)
2334 #define PORT_PA14D_SERCOM4_PAD2                    (_UINT32_(1) << 14)
2335 
2336 #define PIN_PB10D_SERCOM4_PAD2                     _UINT32_(42)
2337 #define MUX_PB10D_SERCOM4_PAD2                     _UINT32_(3)
2338 #define PINMUX_PB10D_SERCOM4_PAD2                  ((PIN_PB10D_SERCOM4_PAD2 << 16) | MUX_PB10D_SERCOM4_PAD2)
2339 #define PORT_PB10D_SERCOM4_PAD2                    (_UINT32_(1) << 10)
2340 
2341 #define PIN_PB14C_SERCOM4_PAD2                     _UINT32_(46)
2342 #define MUX_PB14C_SERCOM4_PAD2                     _UINT32_(2)
2343 #define PINMUX_PB14C_SERCOM4_PAD2                  ((PIN_PB14C_SERCOM4_PAD2 << 16) | MUX_PB14C_SERCOM4_PAD2)
2344 #define PORT_PB14C_SERCOM4_PAD2                    (_UINT32_(1) << 14)
2345 
2346 #define PIN_PB11D_SERCOM4_PAD3                     _UINT32_(43)
2347 #define MUX_PB11D_SERCOM4_PAD3                     _UINT32_(3)
2348 #define PINMUX_PB11D_SERCOM4_PAD3                  ((PIN_PB11D_SERCOM4_PAD3 << 16) | MUX_PB11D_SERCOM4_PAD3)
2349 #define PORT_PB11D_SERCOM4_PAD3                    (_UINT32_(1) << 11)
2350 
2351 #define PIN_PA15D_SERCOM4_PAD3                     _UINT32_(15)
2352 #define MUX_PA15D_SERCOM4_PAD3                     _UINT32_(3)
2353 #define PINMUX_PA15D_SERCOM4_PAD3                  ((PIN_PA15D_SERCOM4_PAD3 << 16) | MUX_PA15D_SERCOM4_PAD3)
2354 #define PORT_PA15D_SERCOM4_PAD3                    (_UINT32_(1) << 15)
2355 
2356 #define PIN_PB15C_SERCOM4_PAD3                     _UINT32_(47)
2357 #define MUX_PB15C_SERCOM4_PAD3                     _UINT32_(2)
2358 #define PINMUX_PB15C_SERCOM4_PAD3                  ((PIN_PB15C_SERCOM4_PAD3 << 16) | MUX_PB15C_SERCOM4_PAD3)
2359 #define PORT_PB15C_SERCOM4_PAD3                    (_UINT32_(1) << 15)
2360 
2361 /* ================= PORT definition for SERCOM5 peripheral ================= */
2362 #define PIN_PA23D_SERCOM5_PAD0                     _UINT32_(23)
2363 #define MUX_PA23D_SERCOM5_PAD0                     _UINT32_(3)
2364 #define PINMUX_PA23D_SERCOM5_PAD0                  ((PIN_PA23D_SERCOM5_PAD0 << 16) | MUX_PA23D_SERCOM5_PAD0)
2365 #define PORT_PA23D_SERCOM5_PAD0                    (_UINT32_(1) << 23)
2366 
2367 #define PIN_PB02D_SERCOM5_PAD0                     _UINT32_(34)
2368 #define MUX_PB02D_SERCOM5_PAD0                     _UINT32_(3)
2369 #define PINMUX_PB02D_SERCOM5_PAD0                  ((PIN_PB02D_SERCOM5_PAD0 << 16) | MUX_PB02D_SERCOM5_PAD0)
2370 #define PORT_PB02D_SERCOM5_PAD0                    (_UINT32_(1) << 2)
2371 
2372 #define PIN_PB31D_SERCOM5_PAD0                     _UINT32_(63)
2373 #define MUX_PB31D_SERCOM5_PAD0                     _UINT32_(3)
2374 #define PINMUX_PB31D_SERCOM5_PAD0                  ((PIN_PB31D_SERCOM5_PAD0 << 16) | MUX_PB31D_SERCOM5_PAD0)
2375 #define PORT_PB31D_SERCOM5_PAD0                    (_UINT32_(1) << 31)
2376 
2377 #define PIN_PB16C_SERCOM5_PAD0                     _UINT32_(48)
2378 #define MUX_PB16C_SERCOM5_PAD0                     _UINT32_(2)
2379 #define PINMUX_PB16C_SERCOM5_PAD0                  ((PIN_PB16C_SERCOM5_PAD0 << 16) | MUX_PB16C_SERCOM5_PAD0)
2380 #define PORT_PB16C_SERCOM5_PAD0                    (_UINT32_(1) << 16)
2381 
2382 #define PIN_PA22D_SERCOM5_PAD1                     _UINT32_(22)
2383 #define MUX_PA22D_SERCOM5_PAD1                     _UINT32_(3)
2384 #define PINMUX_PA22D_SERCOM5_PAD1                  ((PIN_PA22D_SERCOM5_PAD1 << 16) | MUX_PA22D_SERCOM5_PAD1)
2385 #define PORT_PA22D_SERCOM5_PAD1                    (_UINT32_(1) << 22)
2386 
2387 #define PIN_PB03D_SERCOM5_PAD1                     _UINT32_(35)
2388 #define MUX_PB03D_SERCOM5_PAD1                     _UINT32_(3)
2389 #define PINMUX_PB03D_SERCOM5_PAD1                  ((PIN_PB03D_SERCOM5_PAD1 << 16) | MUX_PB03D_SERCOM5_PAD1)
2390 #define PORT_PB03D_SERCOM5_PAD1                    (_UINT32_(1) << 3)
2391 
2392 #define PIN_PB30D_SERCOM5_PAD1                     _UINT32_(62)
2393 #define MUX_PB30D_SERCOM5_PAD1                     _UINT32_(3)
2394 #define PINMUX_PB30D_SERCOM5_PAD1                  ((PIN_PB30D_SERCOM5_PAD1 << 16) | MUX_PB30D_SERCOM5_PAD1)
2395 #define PORT_PB30D_SERCOM5_PAD1                    (_UINT32_(1) << 30)
2396 
2397 #define PIN_PB17C_SERCOM5_PAD1                     _UINT32_(49)
2398 #define MUX_PB17C_SERCOM5_PAD1                     _UINT32_(2)
2399 #define PINMUX_PB17C_SERCOM5_PAD1                  ((PIN_PB17C_SERCOM5_PAD1 << 16) | MUX_PB17C_SERCOM5_PAD1)
2400 #define PORT_PB17C_SERCOM5_PAD1                    (_UINT32_(1) << 17)
2401 
2402 #define PIN_PA24D_SERCOM5_PAD2                     _UINT32_(24)
2403 #define MUX_PA24D_SERCOM5_PAD2                     _UINT32_(3)
2404 #define PINMUX_PA24D_SERCOM5_PAD2                  ((PIN_PA24D_SERCOM5_PAD2 << 16) | MUX_PA24D_SERCOM5_PAD2)
2405 #define PORT_PA24D_SERCOM5_PAD2                    (_UINT32_(1) << 24)
2406 
2407 #define PIN_PB00D_SERCOM5_PAD2                     _UINT32_(32)
2408 #define MUX_PB00D_SERCOM5_PAD2                     _UINT32_(3)
2409 #define PINMUX_PB00D_SERCOM5_PAD2                  ((PIN_PB00D_SERCOM5_PAD2 << 16) | MUX_PB00D_SERCOM5_PAD2)
2410 #define PORT_PB00D_SERCOM5_PAD2                    (_UINT32_(1) << 0)
2411 
2412 #define PIN_PB22D_SERCOM5_PAD2                     _UINT32_(54)
2413 #define MUX_PB22D_SERCOM5_PAD2                     _UINT32_(3)
2414 #define PINMUX_PB22D_SERCOM5_PAD2                  ((PIN_PB22D_SERCOM5_PAD2 << 16) | MUX_PB22D_SERCOM5_PAD2)
2415 #define PORT_PB22D_SERCOM5_PAD2                    (_UINT32_(1) << 22)
2416 
2417 #define PIN_PA20C_SERCOM5_PAD2                     _UINT32_(20)
2418 #define MUX_PA20C_SERCOM5_PAD2                     _UINT32_(2)
2419 #define PINMUX_PA20C_SERCOM5_PAD2                  ((PIN_PA20C_SERCOM5_PAD2 << 16) | MUX_PA20C_SERCOM5_PAD2)
2420 #define PORT_PA20C_SERCOM5_PAD2                    (_UINT32_(1) << 20)
2421 
2422 #define PIN_PB18C_SERCOM5_PAD2                     _UINT32_(50)
2423 #define MUX_PB18C_SERCOM5_PAD2                     _UINT32_(2)
2424 #define PINMUX_PB18C_SERCOM5_PAD2                  ((PIN_PB18C_SERCOM5_PAD2 << 16) | MUX_PB18C_SERCOM5_PAD2)
2425 #define PORT_PB18C_SERCOM5_PAD2                    (_UINT32_(1) << 18)
2426 
2427 #define PIN_PA25D_SERCOM5_PAD3                     _UINT32_(25)
2428 #define MUX_PA25D_SERCOM5_PAD3                     _UINT32_(3)
2429 #define PINMUX_PA25D_SERCOM5_PAD3                  ((PIN_PA25D_SERCOM5_PAD3 << 16) | MUX_PA25D_SERCOM5_PAD3)
2430 #define PORT_PA25D_SERCOM5_PAD3                    (_UINT32_(1) << 25)
2431 
2432 #define PIN_PB01D_SERCOM5_PAD3                     _UINT32_(33)
2433 #define MUX_PB01D_SERCOM5_PAD3                     _UINT32_(3)
2434 #define PINMUX_PB01D_SERCOM5_PAD3                  ((PIN_PB01D_SERCOM5_PAD3 << 16) | MUX_PB01D_SERCOM5_PAD3)
2435 #define PORT_PB01D_SERCOM5_PAD3                    (_UINT32_(1) << 1)
2436 
2437 #define PIN_PB23D_SERCOM5_PAD3                     _UINT32_(55)
2438 #define MUX_PB23D_SERCOM5_PAD3                     _UINT32_(3)
2439 #define PINMUX_PB23D_SERCOM5_PAD3                  ((PIN_PB23D_SERCOM5_PAD3 << 16) | MUX_PB23D_SERCOM5_PAD3)
2440 #define PORT_PB23D_SERCOM5_PAD3                    (_UINT32_(1) << 23)
2441 
2442 #define PIN_PA21C_SERCOM5_PAD3                     _UINT32_(21)
2443 #define MUX_PA21C_SERCOM5_PAD3                     _UINT32_(2)
2444 #define PINMUX_PA21C_SERCOM5_PAD3                  ((PIN_PA21C_SERCOM5_PAD3 << 16) | MUX_PA21C_SERCOM5_PAD3)
2445 #define PORT_PA21C_SERCOM5_PAD3                    (_UINT32_(1) << 21)
2446 
2447 #define PIN_PB19C_SERCOM5_PAD3                     _UINT32_(51)
2448 #define MUX_PB19C_SERCOM5_PAD3                     _UINT32_(2)
2449 #define PINMUX_PB19C_SERCOM5_PAD3                  ((PIN_PB19C_SERCOM5_PAD3 << 16) | MUX_PB19C_SERCOM5_PAD3)
2450 #define PORT_PB19C_SERCOM5_PAD3                    (_UINT32_(1) << 19)
2451 
2452 /* ================= PORT definition for SERCOM6 peripheral ================= */
2453 #define PIN_PC13D_SERCOM6_PAD0                     _UINT32_(77)
2454 #define MUX_PC13D_SERCOM6_PAD0                     _UINT32_(3)
2455 #define PINMUX_PC13D_SERCOM6_PAD0                  ((PIN_PC13D_SERCOM6_PAD0 << 16) | MUX_PC13D_SERCOM6_PAD0)
2456 #define PORT_PC13D_SERCOM6_PAD0                    (_UINT32_(1) << 13)
2457 
2458 #define PIN_PC16C_SERCOM6_PAD0                     _UINT32_(80)
2459 #define MUX_PC16C_SERCOM6_PAD0                     _UINT32_(2)
2460 #define PINMUX_PC16C_SERCOM6_PAD0                  ((PIN_PC16C_SERCOM6_PAD0 << 16) | MUX_PC16C_SERCOM6_PAD0)
2461 #define PORT_PC16C_SERCOM6_PAD0                    (_UINT32_(1) << 16)
2462 
2463 #define PIN_PC12D_SERCOM6_PAD1                     _UINT32_(76)
2464 #define MUX_PC12D_SERCOM6_PAD1                     _UINT32_(3)
2465 #define PINMUX_PC12D_SERCOM6_PAD1                  ((PIN_PC12D_SERCOM6_PAD1 << 16) | MUX_PC12D_SERCOM6_PAD1)
2466 #define PORT_PC12D_SERCOM6_PAD1                    (_UINT32_(1) << 12)
2467 
2468 #define PIN_PC05C_SERCOM6_PAD1                     _UINT32_(69)
2469 #define MUX_PC05C_SERCOM6_PAD1                     _UINT32_(2)
2470 #define PINMUX_PC05C_SERCOM6_PAD1                  ((PIN_PC05C_SERCOM6_PAD1 << 16) | MUX_PC05C_SERCOM6_PAD1)
2471 #define PORT_PC05C_SERCOM6_PAD1                    (_UINT32_(1) << 5)
2472 
2473 #define PIN_PC17C_SERCOM6_PAD1                     _UINT32_(81)
2474 #define MUX_PC17C_SERCOM6_PAD1                     _UINT32_(2)
2475 #define PINMUX_PC17C_SERCOM6_PAD1                  ((PIN_PC17C_SERCOM6_PAD1 << 16) | MUX_PC17C_SERCOM6_PAD1)
2476 #define PORT_PC17C_SERCOM6_PAD1                    (_UINT32_(1) << 17)
2477 
2478 #define PIN_PC14D_SERCOM6_PAD2                     _UINT32_(78)
2479 #define MUX_PC14D_SERCOM6_PAD2                     _UINT32_(3)
2480 #define PINMUX_PC14D_SERCOM6_PAD2                  ((PIN_PC14D_SERCOM6_PAD2 << 16) | MUX_PC14D_SERCOM6_PAD2)
2481 #define PORT_PC14D_SERCOM6_PAD2                    (_UINT32_(1) << 14)
2482 
2483 #define PIN_PC06C_SERCOM6_PAD2                     _UINT32_(70)
2484 #define MUX_PC06C_SERCOM6_PAD2                     _UINT32_(2)
2485 #define PINMUX_PC06C_SERCOM6_PAD2                  ((PIN_PC06C_SERCOM6_PAD2 << 16) | MUX_PC06C_SERCOM6_PAD2)
2486 #define PORT_PC06C_SERCOM6_PAD2                    (_UINT32_(1) << 6)
2487 
2488 #define PIN_PC10C_SERCOM6_PAD2                     _UINT32_(74)
2489 #define MUX_PC10C_SERCOM6_PAD2                     _UINT32_(2)
2490 #define PINMUX_PC10C_SERCOM6_PAD2                  ((PIN_PC10C_SERCOM6_PAD2 << 16) | MUX_PC10C_SERCOM6_PAD2)
2491 #define PORT_PC10C_SERCOM6_PAD2                    (_UINT32_(1) << 10)
2492 
2493 #define PIN_PC18C_SERCOM6_PAD2                     _UINT32_(82)
2494 #define MUX_PC18C_SERCOM6_PAD2                     _UINT32_(2)
2495 #define PINMUX_PC18C_SERCOM6_PAD2                  ((PIN_PC18C_SERCOM6_PAD2 << 16) | MUX_PC18C_SERCOM6_PAD2)
2496 #define PORT_PC18C_SERCOM6_PAD2                    (_UINT32_(1) << 18)
2497 
2498 #define PIN_PC15D_SERCOM6_PAD3                     _UINT32_(79)
2499 #define MUX_PC15D_SERCOM6_PAD3                     _UINT32_(3)
2500 #define PINMUX_PC15D_SERCOM6_PAD3                  ((PIN_PC15D_SERCOM6_PAD3 << 16) | MUX_PC15D_SERCOM6_PAD3)
2501 #define PORT_PC15D_SERCOM6_PAD3                    (_UINT32_(1) << 15)
2502 
2503 #define PIN_PC07C_SERCOM6_PAD3                     _UINT32_(71)
2504 #define MUX_PC07C_SERCOM6_PAD3                     _UINT32_(2)
2505 #define PINMUX_PC07C_SERCOM6_PAD3                  ((PIN_PC07C_SERCOM6_PAD3 << 16) | MUX_PC07C_SERCOM6_PAD3)
2506 #define PORT_PC07C_SERCOM6_PAD3                    (_UINT32_(1) << 7)
2507 
2508 #define PIN_PC11C_SERCOM6_PAD3                     _UINT32_(75)
2509 #define MUX_PC11C_SERCOM6_PAD3                     _UINT32_(2)
2510 #define PINMUX_PC11C_SERCOM6_PAD3                  ((PIN_PC11C_SERCOM6_PAD3 << 16) | MUX_PC11C_SERCOM6_PAD3)
2511 #define PORT_PC11C_SERCOM6_PAD3                    (_UINT32_(1) << 11)
2512 
2513 #define PIN_PC19C_SERCOM6_PAD3                     _UINT32_(83)
2514 #define MUX_PC19C_SERCOM6_PAD3                     _UINT32_(2)
2515 #define PINMUX_PC19C_SERCOM6_PAD3                  ((PIN_PC19C_SERCOM6_PAD3 << 16) | MUX_PC19C_SERCOM6_PAD3)
2516 #define PORT_PC19C_SERCOM6_PAD3                    (_UINT32_(1) << 19)
2517 
2518 /* ================= PORT definition for SERCOM7 peripheral ================= */
2519 #define PIN_PB21D_SERCOM7_PAD0                     _UINT32_(53)
2520 #define MUX_PB21D_SERCOM7_PAD0                     _UINT32_(3)
2521 #define PINMUX_PB21D_SERCOM7_PAD0                  ((PIN_PB21D_SERCOM7_PAD0 << 16) | MUX_PB21D_SERCOM7_PAD0)
2522 #define PORT_PB21D_SERCOM7_PAD0                    (_UINT32_(1) << 21)
2523 
2524 #define PIN_PB30C_SERCOM7_PAD0                     _UINT32_(62)
2525 #define MUX_PB30C_SERCOM7_PAD0                     _UINT32_(2)
2526 #define PINMUX_PB30C_SERCOM7_PAD0                  ((PIN_PB30C_SERCOM7_PAD0 << 16) | MUX_PB30C_SERCOM7_PAD0)
2527 #define PORT_PB30C_SERCOM7_PAD0                    (_UINT32_(1) << 30)
2528 
2529 #define PIN_PC12C_SERCOM7_PAD0                     _UINT32_(76)
2530 #define MUX_PC12C_SERCOM7_PAD0                     _UINT32_(2)
2531 #define PINMUX_PC12C_SERCOM7_PAD0                  ((PIN_PC12C_SERCOM7_PAD0 << 16) | MUX_PC12C_SERCOM7_PAD0)
2532 #define PORT_PC12C_SERCOM7_PAD0                    (_UINT32_(1) << 12)
2533 
2534 #define PIN_PB20D_SERCOM7_PAD1                     _UINT32_(52)
2535 #define MUX_PB20D_SERCOM7_PAD1                     _UINT32_(3)
2536 #define PINMUX_PB20D_SERCOM7_PAD1                  ((PIN_PB20D_SERCOM7_PAD1 << 16) | MUX_PB20D_SERCOM7_PAD1)
2537 #define PORT_PB20D_SERCOM7_PAD1                    (_UINT32_(1) << 20)
2538 
2539 #define PIN_PB31C_SERCOM7_PAD1                     _UINT32_(63)
2540 #define MUX_PB31C_SERCOM7_PAD1                     _UINT32_(2)
2541 #define PINMUX_PB31C_SERCOM7_PAD1                  ((PIN_PB31C_SERCOM7_PAD1 << 16) | MUX_PB31C_SERCOM7_PAD1)
2542 #define PORT_PB31C_SERCOM7_PAD1                    (_UINT32_(1) << 31)
2543 
2544 #define PIN_PC13C_SERCOM7_PAD1                     _UINT32_(77)
2545 #define MUX_PC13C_SERCOM7_PAD1                     _UINT32_(2)
2546 #define PINMUX_PC13C_SERCOM7_PAD1                  ((PIN_PC13C_SERCOM7_PAD1 << 16) | MUX_PC13C_SERCOM7_PAD1)
2547 #define PORT_PC13C_SERCOM7_PAD1                    (_UINT32_(1) << 13)
2548 
2549 #define PIN_PB18D_SERCOM7_PAD2                     _UINT32_(50)
2550 #define MUX_PB18D_SERCOM7_PAD2                     _UINT32_(3)
2551 #define PINMUX_PB18D_SERCOM7_PAD2                  ((PIN_PB18D_SERCOM7_PAD2 << 16) | MUX_PB18D_SERCOM7_PAD2)
2552 #define PORT_PB18D_SERCOM7_PAD2                    (_UINT32_(1) << 18)
2553 
2554 #define PIN_PC10D_SERCOM7_PAD2                     _UINT32_(74)
2555 #define MUX_PC10D_SERCOM7_PAD2                     _UINT32_(3)
2556 #define PINMUX_PC10D_SERCOM7_PAD2                  ((PIN_PC10D_SERCOM7_PAD2 << 16) | MUX_PC10D_SERCOM7_PAD2)
2557 #define PORT_PC10D_SERCOM7_PAD2                    (_UINT32_(1) << 10)
2558 
2559 #define PIN_PC14C_SERCOM7_PAD2                     _UINT32_(78)
2560 #define MUX_PC14C_SERCOM7_PAD2                     _UINT32_(2)
2561 #define PINMUX_PC14C_SERCOM7_PAD2                  ((PIN_PC14C_SERCOM7_PAD2 << 16) | MUX_PC14C_SERCOM7_PAD2)
2562 #define PORT_PC14C_SERCOM7_PAD2                    (_UINT32_(1) << 14)
2563 
2564 #define PIN_PA30C_SERCOM7_PAD2                     _UINT32_(30)
2565 #define MUX_PA30C_SERCOM7_PAD2                     _UINT32_(2)
2566 #define PINMUX_PA30C_SERCOM7_PAD2                  ((PIN_PA30C_SERCOM7_PAD2 << 16) | MUX_PA30C_SERCOM7_PAD2)
2567 #define PORT_PA30C_SERCOM7_PAD2                    (_UINT32_(1) << 30)
2568 
2569 #define PIN_PB19D_SERCOM7_PAD3                     _UINT32_(51)
2570 #define MUX_PB19D_SERCOM7_PAD3                     _UINT32_(3)
2571 #define PINMUX_PB19D_SERCOM7_PAD3                  ((PIN_PB19D_SERCOM7_PAD3 << 16) | MUX_PB19D_SERCOM7_PAD3)
2572 #define PORT_PB19D_SERCOM7_PAD3                    (_UINT32_(1) << 19)
2573 
2574 #define PIN_PC11D_SERCOM7_PAD3                     _UINT32_(75)
2575 #define MUX_PC11D_SERCOM7_PAD3                     _UINT32_(3)
2576 #define PINMUX_PC11D_SERCOM7_PAD3                  ((PIN_PC11D_SERCOM7_PAD3 << 16) | MUX_PC11D_SERCOM7_PAD3)
2577 #define PORT_PC11D_SERCOM7_PAD3                    (_UINT32_(1) << 11)
2578 
2579 #define PIN_PC15C_SERCOM7_PAD3                     _UINT32_(79)
2580 #define MUX_PC15C_SERCOM7_PAD3                     _UINT32_(2)
2581 #define PINMUX_PC15C_SERCOM7_PAD3                  ((PIN_PC15C_SERCOM7_PAD3 << 16) | MUX_PC15C_SERCOM7_PAD3)
2582 #define PORT_PC15C_SERCOM7_PAD3                    (_UINT32_(1) << 15)
2583 
2584 #define PIN_PA31C_SERCOM7_PAD3                     _UINT32_(31)
2585 #define MUX_PA31C_SERCOM7_PAD3                     _UINT32_(2)
2586 #define PINMUX_PA31C_SERCOM7_PAD3                  ((PIN_PA31C_SERCOM7_PAD3 << 16) | MUX_PA31C_SERCOM7_PAD3)
2587 #define PORT_PA31C_SERCOM7_PAD3                    (_UINT32_(1) << 31)
2588 
2589 /* =================== PORT definition for TC0 peripheral =================== */
2590 #define PIN_PA04E_TC0_WO0                          _UINT32_(4)
2591 #define MUX_PA04E_TC0_WO0                          _UINT32_(4)
2592 #define PINMUX_PA04E_TC0_WO0                       ((PIN_PA04E_TC0_WO0 << 16) | MUX_PA04E_TC0_WO0)
2593 #define PORT_PA04E_TC0_WO0                         (_UINT32_(1) << 4)
2594 
2595 #define PIN_PA08E_TC0_WO0                          _UINT32_(8)
2596 #define MUX_PA08E_TC0_WO0                          _UINT32_(4)
2597 #define PINMUX_PA08E_TC0_WO0                       ((PIN_PA08E_TC0_WO0 << 16) | MUX_PA08E_TC0_WO0)
2598 #define PORT_PA08E_TC0_WO0                         (_UINT32_(1) << 8)
2599 
2600 #define PIN_PB30E_TC0_WO0                          _UINT32_(62)
2601 #define MUX_PB30E_TC0_WO0                          _UINT32_(4)
2602 #define PINMUX_PB30E_TC0_WO0                       ((PIN_PB30E_TC0_WO0 << 16) | MUX_PB30E_TC0_WO0)
2603 #define PORT_PB30E_TC0_WO0                         (_UINT32_(1) << 30)
2604 
2605 #define PIN_PA05E_TC0_WO1                          _UINT32_(5)
2606 #define MUX_PA05E_TC0_WO1                          _UINT32_(4)
2607 #define PINMUX_PA05E_TC0_WO1                       ((PIN_PA05E_TC0_WO1 << 16) | MUX_PA05E_TC0_WO1)
2608 #define PORT_PA05E_TC0_WO1                         (_UINT32_(1) << 5)
2609 
2610 #define PIN_PA09E_TC0_WO1                          _UINT32_(9)
2611 #define MUX_PA09E_TC0_WO1                          _UINT32_(4)
2612 #define PINMUX_PA09E_TC0_WO1                       ((PIN_PA09E_TC0_WO1 << 16) | MUX_PA09E_TC0_WO1)
2613 #define PORT_PA09E_TC0_WO1                         (_UINT32_(1) << 9)
2614 
2615 #define PIN_PB31E_TC0_WO1                          _UINT32_(63)
2616 #define MUX_PB31E_TC0_WO1                          _UINT32_(4)
2617 #define PINMUX_PB31E_TC0_WO1                       ((PIN_PB31E_TC0_WO1 << 16) | MUX_PB31E_TC0_WO1)
2618 #define PORT_PB31E_TC0_WO1                         (_UINT32_(1) << 31)
2619 
2620 /* =================== PORT definition for TC1 peripheral =================== */
2621 #define PIN_PA06E_TC1_WO0                          _UINT32_(6)
2622 #define MUX_PA06E_TC1_WO0                          _UINT32_(4)
2623 #define PINMUX_PA06E_TC1_WO0                       ((PIN_PA06E_TC1_WO0 << 16) | MUX_PA06E_TC1_WO0)
2624 #define PORT_PA06E_TC1_WO0                         (_UINT32_(1) << 6)
2625 
2626 #define PIN_PA10E_TC1_WO0                          _UINT32_(10)
2627 #define MUX_PA10E_TC1_WO0                          _UINT32_(4)
2628 #define PINMUX_PA10E_TC1_WO0                       ((PIN_PA10E_TC1_WO0 << 16) | MUX_PA10E_TC1_WO0)
2629 #define PORT_PA10E_TC1_WO0                         (_UINT32_(1) << 10)
2630 
2631 #define PIN_PA07E_TC1_WO1                          _UINT32_(7)
2632 #define MUX_PA07E_TC1_WO1                          _UINT32_(4)
2633 #define PINMUX_PA07E_TC1_WO1                       ((PIN_PA07E_TC1_WO1 << 16) | MUX_PA07E_TC1_WO1)
2634 #define PORT_PA07E_TC1_WO1                         (_UINT32_(1) << 7)
2635 
2636 #define PIN_PA11E_TC1_WO1                          _UINT32_(11)
2637 #define MUX_PA11E_TC1_WO1                          _UINT32_(4)
2638 #define PINMUX_PA11E_TC1_WO1                       ((PIN_PA11E_TC1_WO1 << 16) | MUX_PA11E_TC1_WO1)
2639 #define PORT_PA11E_TC1_WO1                         (_UINT32_(1) << 11)
2640 
2641 /* =================== PORT definition for TC2 peripheral =================== */
2642 #define PIN_PA12E_TC2_WO0                          _UINT32_(12)
2643 #define MUX_PA12E_TC2_WO0                          _UINT32_(4)
2644 #define PINMUX_PA12E_TC2_WO0                       ((PIN_PA12E_TC2_WO0 << 16) | MUX_PA12E_TC2_WO0)
2645 #define PORT_PA12E_TC2_WO0                         (_UINT32_(1) << 12)
2646 
2647 #define PIN_PA16E_TC2_WO0                          _UINT32_(16)
2648 #define MUX_PA16E_TC2_WO0                          _UINT32_(4)
2649 #define PINMUX_PA16E_TC2_WO0                       ((PIN_PA16E_TC2_WO0 << 16) | MUX_PA16E_TC2_WO0)
2650 #define PORT_PA16E_TC2_WO0                         (_UINT32_(1) << 16)
2651 
2652 #define PIN_PA00E_TC2_WO0                          _UINT32_(0)
2653 #define MUX_PA00E_TC2_WO0                          _UINT32_(4)
2654 #define PINMUX_PA00E_TC2_WO0                       ((PIN_PA00E_TC2_WO0 << 16) | MUX_PA00E_TC2_WO0)
2655 #define PORT_PA00E_TC2_WO0                         (_UINT32_(1) << 0)
2656 
2657 #define PIN_PA01E_TC2_WO1                          _UINT32_(1)
2658 #define MUX_PA01E_TC2_WO1                          _UINT32_(4)
2659 #define PINMUX_PA01E_TC2_WO1                       ((PIN_PA01E_TC2_WO1 << 16) | MUX_PA01E_TC2_WO1)
2660 #define PORT_PA01E_TC2_WO1                         (_UINT32_(1) << 1)
2661 
2662 #define PIN_PA13E_TC2_WO1                          _UINT32_(13)
2663 #define MUX_PA13E_TC2_WO1                          _UINT32_(4)
2664 #define PINMUX_PA13E_TC2_WO1                       ((PIN_PA13E_TC2_WO1 << 16) | MUX_PA13E_TC2_WO1)
2665 #define PORT_PA13E_TC2_WO1                         (_UINT32_(1) << 13)
2666 
2667 #define PIN_PA17E_TC2_WO1                          _UINT32_(17)
2668 #define MUX_PA17E_TC2_WO1                          _UINT32_(4)
2669 #define PINMUX_PA17E_TC2_WO1                       ((PIN_PA17E_TC2_WO1 << 16) | MUX_PA17E_TC2_WO1)
2670 #define PORT_PA17E_TC2_WO1                         (_UINT32_(1) << 17)
2671 
2672 /* =================== PORT definition for TC3 peripheral =================== */
2673 #define PIN_PA18E_TC3_WO0                          _UINT32_(18)
2674 #define MUX_PA18E_TC3_WO0                          _UINT32_(4)
2675 #define PINMUX_PA18E_TC3_WO0                       ((PIN_PA18E_TC3_WO0 << 16) | MUX_PA18E_TC3_WO0)
2676 #define PORT_PA18E_TC3_WO0                         (_UINT32_(1) << 18)
2677 
2678 #define PIN_PA14E_TC3_WO0                          _UINT32_(14)
2679 #define MUX_PA14E_TC3_WO0                          _UINT32_(4)
2680 #define PINMUX_PA14E_TC3_WO0                       ((PIN_PA14E_TC3_WO0 << 16) | MUX_PA14E_TC3_WO0)
2681 #define PORT_PA14E_TC3_WO0                         (_UINT32_(1) << 14)
2682 
2683 #define PIN_PA15E_TC3_WO1                          _UINT32_(15)
2684 #define MUX_PA15E_TC3_WO1                          _UINT32_(4)
2685 #define PINMUX_PA15E_TC3_WO1                       ((PIN_PA15E_TC3_WO1 << 16) | MUX_PA15E_TC3_WO1)
2686 #define PORT_PA15E_TC3_WO1                         (_UINT32_(1) << 15)
2687 
2688 #define PIN_PA19E_TC3_WO1                          _UINT32_(19)
2689 #define MUX_PA19E_TC3_WO1                          _UINT32_(4)
2690 #define PINMUX_PA19E_TC3_WO1                       ((PIN_PA19E_TC3_WO1 << 16) | MUX_PA19E_TC3_WO1)
2691 #define PORT_PA19E_TC3_WO1                         (_UINT32_(1) << 19)
2692 
2693 /* =================== PORT definition for TC4 peripheral =================== */
2694 #define PIN_PA22E_TC4_WO0                          _UINT32_(22)
2695 #define MUX_PA22E_TC4_WO0                          _UINT32_(4)
2696 #define PINMUX_PA22E_TC4_WO0                       ((PIN_PA22E_TC4_WO0 << 16) | MUX_PA22E_TC4_WO0)
2697 #define PORT_PA22E_TC4_WO0                         (_UINT32_(1) << 22)
2698 
2699 #define PIN_PB08E_TC4_WO0                          _UINT32_(40)
2700 #define MUX_PB08E_TC4_WO0                          _UINT32_(4)
2701 #define PINMUX_PB08E_TC4_WO0                       ((PIN_PB08E_TC4_WO0 << 16) | MUX_PB08E_TC4_WO0)
2702 #define PORT_PB08E_TC4_WO0                         (_UINT32_(1) << 8)
2703 
2704 #define PIN_PB12E_TC4_WO0                          _UINT32_(44)
2705 #define MUX_PB12E_TC4_WO0                          _UINT32_(4)
2706 #define PINMUX_PB12E_TC4_WO0                       ((PIN_PB12E_TC4_WO0 << 16) | MUX_PB12E_TC4_WO0)
2707 #define PORT_PB12E_TC4_WO0                         (_UINT32_(1) << 12)
2708 
2709 #define PIN_PA23E_TC4_WO1                          _UINT32_(23)
2710 #define MUX_PA23E_TC4_WO1                          _UINT32_(4)
2711 #define PINMUX_PA23E_TC4_WO1                       ((PIN_PA23E_TC4_WO1 << 16) | MUX_PA23E_TC4_WO1)
2712 #define PORT_PA23E_TC4_WO1                         (_UINT32_(1) << 23)
2713 
2714 #define PIN_PB09E_TC4_WO1                          _UINT32_(41)
2715 #define MUX_PB09E_TC4_WO1                          _UINT32_(4)
2716 #define PINMUX_PB09E_TC4_WO1                       ((PIN_PB09E_TC4_WO1 << 16) | MUX_PB09E_TC4_WO1)
2717 #define PORT_PB09E_TC4_WO1                         (_UINT32_(1) << 9)
2718 
2719 #define PIN_PB13E_TC4_WO1                          _UINT32_(45)
2720 #define MUX_PB13E_TC4_WO1                          _UINT32_(4)
2721 #define PINMUX_PB13E_TC4_WO1                       ((PIN_PB13E_TC4_WO1 << 16) | MUX_PB13E_TC4_WO1)
2722 #define PORT_PB13E_TC4_WO1                         (_UINT32_(1) << 13)
2723 
2724 /* =================== PORT definition for TC5 peripheral =================== */
2725 #define PIN_PA24E_TC5_WO0                          _UINT32_(24)
2726 #define MUX_PA24E_TC5_WO0                          _UINT32_(4)
2727 #define PINMUX_PA24E_TC5_WO0                       ((PIN_PA24E_TC5_WO0 << 16) | MUX_PA24E_TC5_WO0)
2728 #define PORT_PA24E_TC5_WO0                         (_UINT32_(1) << 24)
2729 
2730 #define PIN_PB10E_TC5_WO0                          _UINT32_(42)
2731 #define MUX_PB10E_TC5_WO0                          _UINT32_(4)
2732 #define PINMUX_PB10E_TC5_WO0                       ((PIN_PB10E_TC5_WO0 << 16) | MUX_PB10E_TC5_WO0)
2733 #define PORT_PB10E_TC5_WO0                         (_UINT32_(1) << 10)
2734 
2735 #define PIN_PB14E_TC5_WO0                          _UINT32_(46)
2736 #define MUX_PB14E_TC5_WO0                          _UINT32_(4)
2737 #define PINMUX_PB14E_TC5_WO0                       ((PIN_PB14E_TC5_WO0 << 16) | MUX_PB14E_TC5_WO0)
2738 #define PORT_PB14E_TC5_WO0                         (_UINT32_(1) << 14)
2739 
2740 #define PIN_PA25E_TC5_WO1                          _UINT32_(25)
2741 #define MUX_PA25E_TC5_WO1                          _UINT32_(4)
2742 #define PINMUX_PA25E_TC5_WO1                       ((PIN_PA25E_TC5_WO1 << 16) | MUX_PA25E_TC5_WO1)
2743 #define PORT_PA25E_TC5_WO1                         (_UINT32_(1) << 25)
2744 
2745 #define PIN_PB11E_TC5_WO1                          _UINT32_(43)
2746 #define MUX_PB11E_TC5_WO1                          _UINT32_(4)
2747 #define PINMUX_PB11E_TC5_WO1                       ((PIN_PB11E_TC5_WO1 << 16) | MUX_PB11E_TC5_WO1)
2748 #define PORT_PB11E_TC5_WO1                         (_UINT32_(1) << 11)
2749 
2750 #define PIN_PB15E_TC5_WO1                          _UINT32_(47)
2751 #define MUX_PB15E_TC5_WO1                          _UINT32_(4)
2752 #define PINMUX_PB15E_TC5_WO1                       ((PIN_PB15E_TC5_WO1 << 16) | MUX_PB15E_TC5_WO1)
2753 #define PORT_PB15E_TC5_WO1                         (_UINT32_(1) << 15)
2754 
2755 /* =================== PORT definition for TC6 peripheral =================== */
2756 #define PIN_PA30E_TC6_WO0                          _UINT32_(30)
2757 #define MUX_PA30E_TC6_WO0                          _UINT32_(4)
2758 #define PINMUX_PA30E_TC6_WO0                       ((PIN_PA30E_TC6_WO0 << 16) | MUX_PA30E_TC6_WO0)
2759 #define PORT_PA30E_TC6_WO0                         (_UINT32_(1) << 30)
2760 
2761 #define PIN_PB02E_TC6_WO0                          _UINT32_(34)
2762 #define MUX_PB02E_TC6_WO0                          _UINT32_(4)
2763 #define PINMUX_PB02E_TC6_WO0                       ((PIN_PB02E_TC6_WO0 << 16) | MUX_PB02E_TC6_WO0)
2764 #define PORT_PB02E_TC6_WO0                         (_UINT32_(1) << 2)
2765 
2766 #define PIN_PB16E_TC6_WO0                          _UINT32_(48)
2767 #define MUX_PB16E_TC6_WO0                          _UINT32_(4)
2768 #define PINMUX_PB16E_TC6_WO0                       ((PIN_PB16E_TC6_WO0 << 16) | MUX_PB16E_TC6_WO0)
2769 #define PORT_PB16E_TC6_WO0                         (_UINT32_(1) << 16)
2770 
2771 #define PIN_PA31E_TC6_WO1                          _UINT32_(31)
2772 #define MUX_PA31E_TC6_WO1                          _UINT32_(4)
2773 #define PINMUX_PA31E_TC6_WO1                       ((PIN_PA31E_TC6_WO1 << 16) | MUX_PA31E_TC6_WO1)
2774 #define PORT_PA31E_TC6_WO1                         (_UINT32_(1) << 31)
2775 
2776 #define PIN_PB03E_TC6_WO1                          _UINT32_(35)
2777 #define MUX_PB03E_TC6_WO1                          _UINT32_(4)
2778 #define PINMUX_PB03E_TC6_WO1                       ((PIN_PB03E_TC6_WO1 << 16) | MUX_PB03E_TC6_WO1)
2779 #define PORT_PB03E_TC6_WO1                         (_UINT32_(1) << 3)
2780 
2781 #define PIN_PB17E_TC6_WO1                          _UINT32_(49)
2782 #define MUX_PB17E_TC6_WO1                          _UINT32_(4)
2783 #define PINMUX_PB17E_TC6_WO1                       ((PIN_PB17E_TC6_WO1 << 16) | MUX_PB17E_TC6_WO1)
2784 #define PORT_PB17E_TC6_WO1                         (_UINT32_(1) << 17)
2785 
2786 /* =================== PORT definition for TC7 peripheral =================== */
2787 #define PIN_PA20E_TC7_WO0                          _UINT32_(20)
2788 #define MUX_PA20E_TC7_WO0                          _UINT32_(4)
2789 #define PINMUX_PA20E_TC7_WO0                       ((PIN_PA20E_TC7_WO0 << 16) | MUX_PA20E_TC7_WO0)
2790 #define PORT_PA20E_TC7_WO0                         (_UINT32_(1) << 20)
2791 
2792 #define PIN_PB00E_TC7_WO0                          _UINT32_(32)
2793 #define MUX_PB00E_TC7_WO0                          _UINT32_(4)
2794 #define PINMUX_PB00E_TC7_WO0                       ((PIN_PB00E_TC7_WO0 << 16) | MUX_PB00E_TC7_WO0)
2795 #define PORT_PB00E_TC7_WO0                         (_UINT32_(1) << 0)
2796 
2797 #define PIN_PB22E_TC7_WO0                          _UINT32_(54)
2798 #define MUX_PB22E_TC7_WO0                          _UINT32_(4)
2799 #define PINMUX_PB22E_TC7_WO0                       ((PIN_PB22E_TC7_WO0 << 16) | MUX_PB22E_TC7_WO0)
2800 #define PORT_PB22E_TC7_WO0                         (_UINT32_(1) << 22)
2801 
2802 #define PIN_PA21E_TC7_WO1                          _UINT32_(21)
2803 #define MUX_PA21E_TC7_WO1                          _UINT32_(4)
2804 #define PINMUX_PA21E_TC7_WO1                       ((PIN_PA21E_TC7_WO1 << 16) | MUX_PA21E_TC7_WO1)
2805 #define PORT_PA21E_TC7_WO1                         (_UINT32_(1) << 21)
2806 
2807 #define PIN_PB01E_TC7_WO1                          _UINT32_(33)
2808 #define MUX_PB01E_TC7_WO1                          _UINT32_(4)
2809 #define PINMUX_PB01E_TC7_WO1                       ((PIN_PB01E_TC7_WO1 << 16) | MUX_PB01E_TC7_WO1)
2810 #define PORT_PB01E_TC7_WO1                         (_UINT32_(1) << 1)
2811 
2812 #define PIN_PB23E_TC7_WO1                          _UINT32_(55)
2813 #define MUX_PB23E_TC7_WO1                          _UINT32_(4)
2814 #define PINMUX_PB23E_TC7_WO1                       ((PIN_PB23E_TC7_WO1 << 16) | MUX_PB23E_TC7_WO1)
2815 #define PORT_PB23E_TC7_WO1                         (_UINT32_(1) << 23)
2816 
2817 /* ================== PORT definition for TCC0 peripheral =================== */
2818 #define PIN_PA20G_TCC0_WO0                         _UINT32_(20)
2819 #define MUX_PA20G_TCC0_WO0                         _UINT32_(6)
2820 #define PINMUX_PA20G_TCC0_WO0                      ((PIN_PA20G_TCC0_WO0 << 16) | MUX_PA20G_TCC0_WO0)
2821 #define PORT_PA20G_TCC0_WO0                        (_UINT32_(1) << 20)
2822 
2823 #define PIN_PB12G_TCC0_WO0                         _UINT32_(44)
2824 #define MUX_PB12G_TCC0_WO0                         _UINT32_(6)
2825 #define PINMUX_PB12G_TCC0_WO0                      ((PIN_PB12G_TCC0_WO0 << 16) | MUX_PB12G_TCC0_WO0)
2826 #define PORT_PB12G_TCC0_WO0                        (_UINT32_(1) << 12)
2827 
2828 #define PIN_PA08F_TCC0_WO0                         _UINT32_(8)
2829 #define MUX_PA08F_TCC0_WO0                         _UINT32_(5)
2830 #define PINMUX_PA08F_TCC0_WO0                      ((PIN_PA08F_TCC0_WO0 << 16) | MUX_PA08F_TCC0_WO0)
2831 #define PORT_PA08F_TCC0_WO0                        (_UINT32_(1) << 8)
2832 
2833 #define PIN_PC10F_TCC0_WO0                         _UINT32_(74)
2834 #define MUX_PC10F_TCC0_WO0                         _UINT32_(5)
2835 #define PINMUX_PC10F_TCC0_WO0                      ((PIN_PC10F_TCC0_WO0 << 16) | MUX_PC10F_TCC0_WO0)
2836 #define PORT_PC10F_TCC0_WO0                        (_UINT32_(1) << 10)
2837 
2838 #define PIN_PC16F_TCC0_WO0                         _UINT32_(80)
2839 #define MUX_PC16F_TCC0_WO0                         _UINT32_(5)
2840 #define PINMUX_PC16F_TCC0_WO0                      ((PIN_PC16F_TCC0_WO0 << 16) | MUX_PC16F_TCC0_WO0)
2841 #define PORT_PC16F_TCC0_WO0                        (_UINT32_(1) << 16)
2842 
2843 #define PIN_PA21G_TCC0_WO1                         _UINT32_(21)
2844 #define MUX_PA21G_TCC0_WO1                         _UINT32_(6)
2845 #define PINMUX_PA21G_TCC0_WO1                      ((PIN_PA21G_TCC0_WO1 << 16) | MUX_PA21G_TCC0_WO1)
2846 #define PORT_PA21G_TCC0_WO1                        (_UINT32_(1) << 21)
2847 
2848 #define PIN_PB13G_TCC0_WO1                         _UINT32_(45)
2849 #define MUX_PB13G_TCC0_WO1                         _UINT32_(6)
2850 #define PINMUX_PB13G_TCC0_WO1                      ((PIN_PB13G_TCC0_WO1 << 16) | MUX_PB13G_TCC0_WO1)
2851 #define PORT_PB13G_TCC0_WO1                        (_UINT32_(1) << 13)
2852 
2853 #define PIN_PA09F_TCC0_WO1                         _UINT32_(9)
2854 #define MUX_PA09F_TCC0_WO1                         _UINT32_(5)
2855 #define PINMUX_PA09F_TCC0_WO1                      ((PIN_PA09F_TCC0_WO1 << 16) | MUX_PA09F_TCC0_WO1)
2856 #define PORT_PA09F_TCC0_WO1                        (_UINT32_(1) << 9)
2857 
2858 #define PIN_PC11F_TCC0_WO1                         _UINT32_(75)
2859 #define MUX_PC11F_TCC0_WO1                         _UINT32_(5)
2860 #define PINMUX_PC11F_TCC0_WO1                      ((PIN_PC11F_TCC0_WO1 << 16) | MUX_PC11F_TCC0_WO1)
2861 #define PORT_PC11F_TCC0_WO1                        (_UINT32_(1) << 11)
2862 
2863 #define PIN_PC17F_TCC0_WO1                         _UINT32_(81)
2864 #define MUX_PC17F_TCC0_WO1                         _UINT32_(5)
2865 #define PINMUX_PC17F_TCC0_WO1                      ((PIN_PC17F_TCC0_WO1 << 16) | MUX_PC17F_TCC0_WO1)
2866 #define PORT_PC17F_TCC0_WO1                        (_UINT32_(1) << 17)
2867 
2868 #define PIN_PA22G_TCC0_WO2                         _UINT32_(22)
2869 #define MUX_PA22G_TCC0_WO2                         _UINT32_(6)
2870 #define PINMUX_PA22G_TCC0_WO2                      ((PIN_PA22G_TCC0_WO2 << 16) | MUX_PA22G_TCC0_WO2)
2871 #define PORT_PA22G_TCC0_WO2                        (_UINT32_(1) << 22)
2872 
2873 #define PIN_PB14G_TCC0_WO2                         _UINT32_(46)
2874 #define MUX_PB14G_TCC0_WO2                         _UINT32_(6)
2875 #define PINMUX_PB14G_TCC0_WO2                      ((PIN_PB14G_TCC0_WO2 << 16) | MUX_PB14G_TCC0_WO2)
2876 #define PORT_PB14G_TCC0_WO2                        (_UINT32_(1) << 14)
2877 
2878 #define PIN_PA10F_TCC0_WO2                         _UINT32_(10)
2879 #define MUX_PA10F_TCC0_WO2                         _UINT32_(5)
2880 #define PINMUX_PA10F_TCC0_WO2                      ((PIN_PA10F_TCC0_WO2 << 16) | MUX_PA10F_TCC0_WO2)
2881 #define PORT_PA10F_TCC0_WO2                        (_UINT32_(1) << 10)
2882 
2883 #define PIN_PC12F_TCC0_WO2                         _UINT32_(76)
2884 #define MUX_PC12F_TCC0_WO2                         _UINT32_(5)
2885 #define PINMUX_PC12F_TCC0_WO2                      ((PIN_PC12F_TCC0_WO2 << 16) | MUX_PC12F_TCC0_WO2)
2886 #define PORT_PC12F_TCC0_WO2                        (_UINT32_(1) << 12)
2887 
2888 #define PIN_PC18F_TCC0_WO2                         _UINT32_(82)
2889 #define MUX_PC18F_TCC0_WO2                         _UINT32_(5)
2890 #define PINMUX_PC18F_TCC0_WO2                      ((PIN_PC18F_TCC0_WO2 << 16) | MUX_PC18F_TCC0_WO2)
2891 #define PORT_PC18F_TCC0_WO2                        (_UINT32_(1) << 18)
2892 
2893 #define PIN_PA23G_TCC0_WO3                         _UINT32_(23)
2894 #define MUX_PA23G_TCC0_WO3                         _UINT32_(6)
2895 #define PINMUX_PA23G_TCC0_WO3                      ((PIN_PA23G_TCC0_WO3 << 16) | MUX_PA23G_TCC0_WO3)
2896 #define PORT_PA23G_TCC0_WO3                        (_UINT32_(1) << 23)
2897 
2898 #define PIN_PB15G_TCC0_WO3                         _UINT32_(47)
2899 #define MUX_PB15G_TCC0_WO3                         _UINT32_(6)
2900 #define PINMUX_PB15G_TCC0_WO3                      ((PIN_PB15G_TCC0_WO3 << 16) | MUX_PB15G_TCC0_WO3)
2901 #define PORT_PB15G_TCC0_WO3                        (_UINT32_(1) << 15)
2902 
2903 #define PIN_PA11F_TCC0_WO3                         _UINT32_(11)
2904 #define MUX_PA11F_TCC0_WO3                         _UINT32_(5)
2905 #define PINMUX_PA11F_TCC0_WO3                      ((PIN_PA11F_TCC0_WO3 << 16) | MUX_PA11F_TCC0_WO3)
2906 #define PORT_PA11F_TCC0_WO3                        (_UINT32_(1) << 11)
2907 
2908 #define PIN_PC13F_TCC0_WO3                         _UINT32_(77)
2909 #define MUX_PC13F_TCC0_WO3                         _UINT32_(5)
2910 #define PINMUX_PC13F_TCC0_WO3                      ((PIN_PC13F_TCC0_WO3 << 16) | MUX_PC13F_TCC0_WO3)
2911 #define PORT_PC13F_TCC0_WO3                        (_UINT32_(1) << 13)
2912 
2913 #define PIN_PC19F_TCC0_WO3                         _UINT32_(83)
2914 #define MUX_PC19F_TCC0_WO3                         _UINT32_(5)
2915 #define PINMUX_PC19F_TCC0_WO3                      ((PIN_PC19F_TCC0_WO3 << 16) | MUX_PC19F_TCC0_WO3)
2916 #define PORT_PC19F_TCC0_WO3                        (_UINT32_(1) << 19)
2917 
2918 #define PIN_PA16G_TCC0_WO4                         _UINT32_(16)
2919 #define MUX_PA16G_TCC0_WO4                         _UINT32_(6)
2920 #define PINMUX_PA16G_TCC0_WO4                      ((PIN_PA16G_TCC0_WO4 << 16) | MUX_PA16G_TCC0_WO4)
2921 #define PORT_PA16G_TCC0_WO4                        (_UINT32_(1) << 16)
2922 
2923 #define PIN_PB16G_TCC0_WO4                         _UINT32_(48)
2924 #define MUX_PB16G_TCC0_WO4                         _UINT32_(6)
2925 #define PINMUX_PB16G_TCC0_WO4                      ((PIN_PB16G_TCC0_WO4 << 16) | MUX_PB16G_TCC0_WO4)
2926 #define PORT_PB16G_TCC0_WO4                        (_UINT32_(1) << 16)
2927 
2928 #define PIN_PB10F_TCC0_WO4                         _UINT32_(42)
2929 #define MUX_PB10F_TCC0_WO4                         _UINT32_(5)
2930 #define PINMUX_PB10F_TCC0_WO4                      ((PIN_PB10F_TCC0_WO4 << 16) | MUX_PB10F_TCC0_WO4)
2931 #define PORT_PB10F_TCC0_WO4                        (_UINT32_(1) << 10)
2932 
2933 #define PIN_PC14F_TCC0_WO4                         _UINT32_(78)
2934 #define MUX_PC14F_TCC0_WO4                         _UINT32_(5)
2935 #define PINMUX_PC14F_TCC0_WO4                      ((PIN_PC14F_TCC0_WO4 << 16) | MUX_PC14F_TCC0_WO4)
2936 #define PORT_PC14F_TCC0_WO4                        (_UINT32_(1) << 14)
2937 
2938 #define PIN_PC20F_TCC0_WO4                         _UINT32_(84)
2939 #define MUX_PC20F_TCC0_WO4                         _UINT32_(5)
2940 #define PINMUX_PC20F_TCC0_WO4                      ((PIN_PC20F_TCC0_WO4 << 16) | MUX_PC20F_TCC0_WO4)
2941 #define PORT_PC20F_TCC0_WO4                        (_UINT32_(1) << 20)
2942 
2943 #define PIN_PA17G_TCC0_WO5                         _UINT32_(17)
2944 #define MUX_PA17G_TCC0_WO5                         _UINT32_(6)
2945 #define PINMUX_PA17G_TCC0_WO5                      ((PIN_PA17G_TCC0_WO5 << 16) | MUX_PA17G_TCC0_WO5)
2946 #define PORT_PA17G_TCC0_WO5                        (_UINT32_(1) << 17)
2947 
2948 #define PIN_PB17G_TCC0_WO5                         _UINT32_(49)
2949 #define MUX_PB17G_TCC0_WO5                         _UINT32_(6)
2950 #define PINMUX_PB17G_TCC0_WO5                      ((PIN_PB17G_TCC0_WO5 << 16) | MUX_PB17G_TCC0_WO5)
2951 #define PORT_PB17G_TCC0_WO5                        (_UINT32_(1) << 17)
2952 
2953 #define PIN_PB11F_TCC0_WO5                         _UINT32_(43)
2954 #define MUX_PB11F_TCC0_WO5                         _UINT32_(5)
2955 #define PINMUX_PB11F_TCC0_WO5                      ((PIN_PB11F_TCC0_WO5 << 16) | MUX_PB11F_TCC0_WO5)
2956 #define PORT_PB11F_TCC0_WO5                        (_UINT32_(1) << 11)
2957 
2958 #define PIN_PC15F_TCC0_WO5                         _UINT32_(79)
2959 #define MUX_PC15F_TCC0_WO5                         _UINT32_(5)
2960 #define PINMUX_PC15F_TCC0_WO5                      ((PIN_PC15F_TCC0_WO5 << 16) | MUX_PC15F_TCC0_WO5)
2961 #define PORT_PC15F_TCC0_WO5                        (_UINT32_(1) << 15)
2962 
2963 #define PIN_PC21F_TCC0_WO5                         _UINT32_(85)
2964 #define MUX_PC21F_TCC0_WO5                         _UINT32_(5)
2965 #define PINMUX_PC21F_TCC0_WO5                      ((PIN_PC21F_TCC0_WO5 << 16) | MUX_PC21F_TCC0_WO5)
2966 #define PORT_PC21F_TCC0_WO5                        (_UINT32_(1) << 21)
2967 
2968 #define PIN_PA18G_TCC0_WO6                         _UINT32_(18)
2969 #define MUX_PA18G_TCC0_WO6                         _UINT32_(6)
2970 #define PINMUX_PA18G_TCC0_WO6                      ((PIN_PA18G_TCC0_WO6 << 16) | MUX_PA18G_TCC0_WO6)
2971 #define PORT_PA18G_TCC0_WO6                        (_UINT32_(1) << 18)
2972 
2973 #define PIN_PB30G_TCC0_WO6                         _UINT32_(62)
2974 #define MUX_PB30G_TCC0_WO6                         _UINT32_(6)
2975 #define PINMUX_PB30G_TCC0_WO6                      ((PIN_PB30G_TCC0_WO6 << 16) | MUX_PB30G_TCC0_WO6)
2976 #define PORT_PB30G_TCC0_WO6                        (_UINT32_(1) << 30)
2977 
2978 #define PIN_PA12F_TCC0_WO6                         _UINT32_(12)
2979 #define MUX_PA12F_TCC0_WO6                         _UINT32_(5)
2980 #define PINMUX_PA12F_TCC0_WO6                      ((PIN_PA12F_TCC0_WO6 << 16) | MUX_PA12F_TCC0_WO6)
2981 #define PORT_PA12F_TCC0_WO6                        (_UINT32_(1) << 12)
2982 
2983 #define PIN_PA19G_TCC0_WO7                         _UINT32_(19)
2984 #define MUX_PA19G_TCC0_WO7                         _UINT32_(6)
2985 #define PINMUX_PA19G_TCC0_WO7                      ((PIN_PA19G_TCC0_WO7 << 16) | MUX_PA19G_TCC0_WO7)
2986 #define PORT_PA19G_TCC0_WO7                        (_UINT32_(1) << 19)
2987 
2988 #define PIN_PB31G_TCC0_WO7                         _UINT32_(63)
2989 #define MUX_PB31G_TCC0_WO7                         _UINT32_(6)
2990 #define PINMUX_PB31G_TCC0_WO7                      ((PIN_PB31G_TCC0_WO7 << 16) | MUX_PB31G_TCC0_WO7)
2991 #define PORT_PB31G_TCC0_WO7                        (_UINT32_(1) << 31)
2992 
2993 #define PIN_PA13F_TCC0_WO7                         _UINT32_(13)
2994 #define MUX_PA13F_TCC0_WO7                         _UINT32_(5)
2995 #define PINMUX_PA13F_TCC0_WO7                      ((PIN_PA13F_TCC0_WO7 << 16) | MUX_PA13F_TCC0_WO7)
2996 #define PORT_PA13F_TCC0_WO7                        (_UINT32_(1) << 13)
2997 
2998 /* ================== PORT definition for TCC1 peripheral =================== */
2999 #define PIN_PB10G_TCC1_WO0                         _UINT32_(42)
3000 #define MUX_PB10G_TCC1_WO0                         _UINT32_(6)
3001 #define PINMUX_PB10G_TCC1_WO0                      ((PIN_PB10G_TCC1_WO0 << 16) | MUX_PB10G_TCC1_WO0)
3002 #define PORT_PB10G_TCC1_WO0                        (_UINT32_(1) << 10)
3003 
3004 #define PIN_PC14G_TCC1_WO0                         _UINT32_(78)
3005 #define MUX_PC14G_TCC1_WO0                         _UINT32_(6)
3006 #define PINMUX_PC14G_TCC1_WO0                      ((PIN_PC14G_TCC1_WO0 << 16) | MUX_PC14G_TCC1_WO0)
3007 #define PORT_PC14G_TCC1_WO0                        (_UINT32_(1) << 14)
3008 
3009 #define PIN_PA16F_TCC1_WO0                         _UINT32_(16)
3010 #define MUX_PA16F_TCC1_WO0                         _UINT32_(5)
3011 #define PINMUX_PA16F_TCC1_WO0                      ((PIN_PA16F_TCC1_WO0 << 16) | MUX_PA16F_TCC1_WO0)
3012 #define PORT_PA16F_TCC1_WO0                        (_UINT32_(1) << 16)
3013 
3014 #define PIN_PB18F_TCC1_WO0                         _UINT32_(50)
3015 #define MUX_PB18F_TCC1_WO0                         _UINT32_(5)
3016 #define PINMUX_PB18F_TCC1_WO0                      ((PIN_PB18F_TCC1_WO0 << 16) | MUX_PB18F_TCC1_WO0)
3017 #define PORT_PB18F_TCC1_WO0                        (_UINT32_(1) << 18)
3018 
3019 #define PIN_PB11G_TCC1_WO1                         _UINT32_(43)
3020 #define MUX_PB11G_TCC1_WO1                         _UINT32_(6)
3021 #define PINMUX_PB11G_TCC1_WO1                      ((PIN_PB11G_TCC1_WO1 << 16) | MUX_PB11G_TCC1_WO1)
3022 #define PORT_PB11G_TCC1_WO1                        (_UINT32_(1) << 11)
3023 
3024 #define PIN_PC15G_TCC1_WO1                         _UINT32_(79)
3025 #define MUX_PC15G_TCC1_WO1                         _UINT32_(6)
3026 #define PINMUX_PC15G_TCC1_WO1                      ((PIN_PC15G_TCC1_WO1 << 16) | MUX_PC15G_TCC1_WO1)
3027 #define PORT_PC15G_TCC1_WO1                        (_UINT32_(1) << 15)
3028 
3029 #define PIN_PA17F_TCC1_WO1                         _UINT32_(17)
3030 #define MUX_PA17F_TCC1_WO1                         _UINT32_(5)
3031 #define PINMUX_PA17F_TCC1_WO1                      ((PIN_PA17F_TCC1_WO1 << 16) | MUX_PA17F_TCC1_WO1)
3032 #define PORT_PA17F_TCC1_WO1                        (_UINT32_(1) << 17)
3033 
3034 #define PIN_PB19F_TCC1_WO1                         _UINT32_(51)
3035 #define MUX_PB19F_TCC1_WO1                         _UINT32_(5)
3036 #define PINMUX_PB19F_TCC1_WO1                      ((PIN_PB19F_TCC1_WO1 << 16) | MUX_PB19F_TCC1_WO1)
3037 #define PORT_PB19F_TCC1_WO1                        (_UINT32_(1) << 19)
3038 
3039 #define PIN_PA12G_TCC1_WO2                         _UINT32_(12)
3040 #define MUX_PA12G_TCC1_WO2                         _UINT32_(6)
3041 #define PINMUX_PA12G_TCC1_WO2                      ((PIN_PA12G_TCC1_WO2 << 16) | MUX_PA12G_TCC1_WO2)
3042 #define PORT_PA12G_TCC1_WO2                        (_UINT32_(1) << 12)
3043 
3044 #define PIN_PA14G_TCC1_WO2                         _UINT32_(14)
3045 #define MUX_PA14G_TCC1_WO2                         _UINT32_(6)
3046 #define PINMUX_PA14G_TCC1_WO2                      ((PIN_PA14G_TCC1_WO2 << 16) | MUX_PA14G_TCC1_WO2)
3047 #define PORT_PA14G_TCC1_WO2                        (_UINT32_(1) << 14)
3048 
3049 #define PIN_PA18F_TCC1_WO2                         _UINT32_(18)
3050 #define MUX_PA18F_TCC1_WO2                         _UINT32_(5)
3051 #define PINMUX_PA18F_TCC1_WO2                      ((PIN_PA18F_TCC1_WO2 << 16) | MUX_PA18F_TCC1_WO2)
3052 #define PORT_PA18F_TCC1_WO2                        (_UINT32_(1) << 18)
3053 
3054 #define PIN_PB20F_TCC1_WO2                         _UINT32_(52)
3055 #define MUX_PB20F_TCC1_WO2                         _UINT32_(5)
3056 #define PINMUX_PB20F_TCC1_WO2                      ((PIN_PB20F_TCC1_WO2 << 16) | MUX_PB20F_TCC1_WO2)
3057 #define PORT_PB20F_TCC1_WO2                        (_UINT32_(1) << 20)
3058 
3059 #define PIN_PA13G_TCC1_WO3                         _UINT32_(13)
3060 #define MUX_PA13G_TCC1_WO3                         _UINT32_(6)
3061 #define PINMUX_PA13G_TCC1_WO3                      ((PIN_PA13G_TCC1_WO3 << 16) | MUX_PA13G_TCC1_WO3)
3062 #define PORT_PA13G_TCC1_WO3                        (_UINT32_(1) << 13)
3063 
3064 #define PIN_PA15G_TCC1_WO3                         _UINT32_(15)
3065 #define MUX_PA15G_TCC1_WO3                         _UINT32_(6)
3066 #define PINMUX_PA15G_TCC1_WO3                      ((PIN_PA15G_TCC1_WO3 << 16) | MUX_PA15G_TCC1_WO3)
3067 #define PORT_PA15G_TCC1_WO3                        (_UINT32_(1) << 15)
3068 
3069 #define PIN_PA19F_TCC1_WO3                         _UINT32_(19)
3070 #define MUX_PA19F_TCC1_WO3                         _UINT32_(5)
3071 #define PINMUX_PA19F_TCC1_WO3                      ((PIN_PA19F_TCC1_WO3 << 16) | MUX_PA19F_TCC1_WO3)
3072 #define PORT_PA19F_TCC1_WO3                        (_UINT32_(1) << 19)
3073 
3074 #define PIN_PB21F_TCC1_WO3                         _UINT32_(53)
3075 #define MUX_PB21F_TCC1_WO3                         _UINT32_(5)
3076 #define PINMUX_PB21F_TCC1_WO3                      ((PIN_PB21F_TCC1_WO3 << 16) | MUX_PB21F_TCC1_WO3)
3077 #define PORT_PB21F_TCC1_WO3                        (_UINT32_(1) << 21)
3078 
3079 #define PIN_PA08G_TCC1_WO4                         _UINT32_(8)
3080 #define MUX_PA08G_TCC1_WO4                         _UINT32_(6)
3081 #define PINMUX_PA08G_TCC1_WO4                      ((PIN_PA08G_TCC1_WO4 << 16) | MUX_PA08G_TCC1_WO4)
3082 #define PORT_PA08G_TCC1_WO4                        (_UINT32_(1) << 8)
3083 
3084 #define PIN_PC10G_TCC1_WO4                         _UINT32_(74)
3085 #define MUX_PC10G_TCC1_WO4                         _UINT32_(6)
3086 #define PINMUX_PC10G_TCC1_WO4                      ((PIN_PC10G_TCC1_WO4 << 16) | MUX_PC10G_TCC1_WO4)
3087 #define PORT_PC10G_TCC1_WO4                        (_UINT32_(1) << 10)
3088 
3089 #define PIN_PA20F_TCC1_WO4                         _UINT32_(20)
3090 #define MUX_PA20F_TCC1_WO4                         _UINT32_(5)
3091 #define PINMUX_PA20F_TCC1_WO4                      ((PIN_PA20F_TCC1_WO4 << 16) | MUX_PA20F_TCC1_WO4)
3092 #define PORT_PA20F_TCC1_WO4                        (_UINT32_(1) << 20)
3093 
3094 #define PIN_PA09G_TCC1_WO5                         _UINT32_(9)
3095 #define MUX_PA09G_TCC1_WO5                         _UINT32_(6)
3096 #define PINMUX_PA09G_TCC1_WO5                      ((PIN_PA09G_TCC1_WO5 << 16) | MUX_PA09G_TCC1_WO5)
3097 #define PORT_PA09G_TCC1_WO5                        (_UINT32_(1) << 9)
3098 
3099 #define PIN_PC11G_TCC1_WO5                         _UINT32_(75)
3100 #define MUX_PC11G_TCC1_WO5                         _UINT32_(6)
3101 #define PINMUX_PC11G_TCC1_WO5                      ((PIN_PC11G_TCC1_WO5 << 16) | MUX_PC11G_TCC1_WO5)
3102 #define PORT_PC11G_TCC1_WO5                        (_UINT32_(1) << 11)
3103 
3104 #define PIN_PA21F_TCC1_WO5                         _UINT32_(21)
3105 #define MUX_PA21F_TCC1_WO5                         _UINT32_(5)
3106 #define PINMUX_PA21F_TCC1_WO5                      ((PIN_PA21F_TCC1_WO5 << 16) | MUX_PA21F_TCC1_WO5)
3107 #define PORT_PA21F_TCC1_WO5                        (_UINT32_(1) << 21)
3108 
3109 #define PIN_PA10G_TCC1_WO6                         _UINT32_(10)
3110 #define MUX_PA10G_TCC1_WO6                         _UINT32_(6)
3111 #define PINMUX_PA10G_TCC1_WO6                      ((PIN_PA10G_TCC1_WO6 << 16) | MUX_PA10G_TCC1_WO6)
3112 #define PORT_PA10G_TCC1_WO6                        (_UINT32_(1) << 10)
3113 
3114 #define PIN_PC12G_TCC1_WO6                         _UINT32_(76)
3115 #define MUX_PC12G_TCC1_WO6                         _UINT32_(6)
3116 #define PINMUX_PC12G_TCC1_WO6                      ((PIN_PC12G_TCC1_WO6 << 16) | MUX_PC12G_TCC1_WO6)
3117 #define PORT_PC12G_TCC1_WO6                        (_UINT32_(1) << 12)
3118 
3119 #define PIN_PA22F_TCC1_WO6                         _UINT32_(22)
3120 #define MUX_PA22F_TCC1_WO6                         _UINT32_(5)
3121 #define PINMUX_PA22F_TCC1_WO6                      ((PIN_PA22F_TCC1_WO6 << 16) | MUX_PA22F_TCC1_WO6)
3122 #define PORT_PA22F_TCC1_WO6                        (_UINT32_(1) << 22)
3123 
3124 #define PIN_PA11G_TCC1_WO7                         _UINT32_(11)
3125 #define MUX_PA11G_TCC1_WO7                         _UINT32_(6)
3126 #define PINMUX_PA11G_TCC1_WO7                      ((PIN_PA11G_TCC1_WO7 << 16) | MUX_PA11G_TCC1_WO7)
3127 #define PORT_PA11G_TCC1_WO7                        (_UINT32_(1) << 11)
3128 
3129 #define PIN_PC13G_TCC1_WO7                         _UINT32_(77)
3130 #define MUX_PC13G_TCC1_WO7                         _UINT32_(6)
3131 #define PINMUX_PC13G_TCC1_WO7                      ((PIN_PC13G_TCC1_WO7 << 16) | MUX_PC13G_TCC1_WO7)
3132 #define PORT_PC13G_TCC1_WO7                        (_UINT32_(1) << 13)
3133 
3134 #define PIN_PA23F_TCC1_WO7                         _UINT32_(23)
3135 #define MUX_PA23F_TCC1_WO7                         _UINT32_(5)
3136 #define PINMUX_PA23F_TCC1_WO7                      ((PIN_PA23F_TCC1_WO7 << 16) | MUX_PA23F_TCC1_WO7)
3137 #define PORT_PA23F_TCC1_WO7                        (_UINT32_(1) << 23)
3138 
3139 /* ================== PORT definition for TCC2 peripheral =================== */
3140 #define PIN_PA14F_TCC2_WO0                         _UINT32_(14)
3141 #define MUX_PA14F_TCC2_WO0                         _UINT32_(5)
3142 #define PINMUX_PA14F_TCC2_WO0                      ((PIN_PA14F_TCC2_WO0 << 16) | MUX_PA14F_TCC2_WO0)
3143 #define PORT_PA14F_TCC2_WO0                        (_UINT32_(1) << 14)
3144 
3145 #define PIN_PA30F_TCC2_WO0                         _UINT32_(30)
3146 #define MUX_PA30F_TCC2_WO0                         _UINT32_(5)
3147 #define PINMUX_PA30F_TCC2_WO0                      ((PIN_PA30F_TCC2_WO0 << 16) | MUX_PA30F_TCC2_WO0)
3148 #define PORT_PA30F_TCC2_WO0                        (_UINT32_(1) << 30)
3149 
3150 #define PIN_PA15F_TCC2_WO1                         _UINT32_(15)
3151 #define MUX_PA15F_TCC2_WO1                         _UINT32_(5)
3152 #define PINMUX_PA15F_TCC2_WO1                      ((PIN_PA15F_TCC2_WO1 << 16) | MUX_PA15F_TCC2_WO1)
3153 #define PORT_PA15F_TCC2_WO1                        (_UINT32_(1) << 15)
3154 
3155 #define PIN_PA31F_TCC2_WO1                         _UINT32_(31)
3156 #define MUX_PA31F_TCC2_WO1                         _UINT32_(5)
3157 #define PINMUX_PA31F_TCC2_WO1                      ((PIN_PA31F_TCC2_WO1 << 16) | MUX_PA31F_TCC2_WO1)
3158 #define PORT_PA31F_TCC2_WO1                        (_UINT32_(1) << 31)
3159 
3160 #define PIN_PA24F_TCC2_WO2                         _UINT32_(24)
3161 #define MUX_PA24F_TCC2_WO2                         _UINT32_(5)
3162 #define PINMUX_PA24F_TCC2_WO2                      ((PIN_PA24F_TCC2_WO2 << 16) | MUX_PA24F_TCC2_WO2)
3163 #define PORT_PA24F_TCC2_WO2                        (_UINT32_(1) << 24)
3164 
3165 #define PIN_PB02F_TCC2_WO2                         _UINT32_(34)
3166 #define MUX_PB02F_TCC2_WO2                         _UINT32_(5)
3167 #define PINMUX_PB02F_TCC2_WO2                      ((PIN_PB02F_TCC2_WO2 << 16) | MUX_PB02F_TCC2_WO2)
3168 #define PORT_PB02F_TCC2_WO2                        (_UINT32_(1) << 2)
3169 
3170 /* ================== PORT definition for TCC3 peripheral =================== */
3171 #define PIN_PB12F_TCC3_WO0                         _UINT32_(44)
3172 #define MUX_PB12F_TCC3_WO0                         _UINT32_(5)
3173 #define PINMUX_PB12F_TCC3_WO0                      ((PIN_PB12F_TCC3_WO0 << 16) | MUX_PB12F_TCC3_WO0)
3174 #define PORT_PB12F_TCC3_WO0                        (_UINT32_(1) << 12)
3175 
3176 #define PIN_PB16F_TCC3_WO0                         _UINT32_(48)
3177 #define MUX_PB16F_TCC3_WO0                         _UINT32_(5)
3178 #define PINMUX_PB16F_TCC3_WO0                      ((PIN_PB16F_TCC3_WO0 << 16) | MUX_PB16F_TCC3_WO0)
3179 #define PORT_PB16F_TCC3_WO0                        (_UINT32_(1) << 16)
3180 
3181 #define PIN_PB13F_TCC3_WO1                         _UINT32_(45)
3182 #define MUX_PB13F_TCC3_WO1                         _UINT32_(5)
3183 #define PINMUX_PB13F_TCC3_WO1                      ((PIN_PB13F_TCC3_WO1 << 16) | MUX_PB13F_TCC3_WO1)
3184 #define PORT_PB13F_TCC3_WO1                        (_UINT32_(1) << 13)
3185 
3186 #define PIN_PB17F_TCC3_WO1                         _UINT32_(49)
3187 #define MUX_PB17F_TCC3_WO1                         _UINT32_(5)
3188 #define PINMUX_PB17F_TCC3_WO1                      ((PIN_PB17F_TCC3_WO1 << 16) | MUX_PB17F_TCC3_WO1)
3189 #define PORT_PB17F_TCC3_WO1                        (_UINT32_(1) << 17)
3190 
3191 /* ================== PORT definition for TCC4 peripheral =================== */
3192 #define PIN_PB14F_TCC4_WO0                         _UINT32_(46)
3193 #define MUX_PB14F_TCC4_WO0                         _UINT32_(5)
3194 #define PINMUX_PB14F_TCC4_WO0                      ((PIN_PB14F_TCC4_WO0 << 16) | MUX_PB14F_TCC4_WO0)
3195 #define PORT_PB14F_TCC4_WO0                        (_UINT32_(1) << 14)
3196 
3197 #define PIN_PB30F_TCC4_WO0                         _UINT32_(62)
3198 #define MUX_PB30F_TCC4_WO0                         _UINT32_(5)
3199 #define PINMUX_PB30F_TCC4_WO0                      ((PIN_PB30F_TCC4_WO0 << 16) | MUX_PB30F_TCC4_WO0)
3200 #define PORT_PB30F_TCC4_WO0                        (_UINT32_(1) << 30)
3201 
3202 #define PIN_PB15F_TCC4_WO1                         _UINT32_(47)
3203 #define MUX_PB15F_TCC4_WO1                         _UINT32_(5)
3204 #define PINMUX_PB15F_TCC4_WO1                      ((PIN_PB15F_TCC4_WO1 << 16) | MUX_PB15F_TCC4_WO1)
3205 #define PORT_PB15F_TCC4_WO1                        (_UINT32_(1) << 15)
3206 
3207 #define PIN_PB31F_TCC4_WO1                         _UINT32_(63)
3208 #define MUX_PB31F_TCC4_WO1                         _UINT32_(5)
3209 #define PINMUX_PB31F_TCC4_WO1                      ((PIN_PB31F_TCC4_WO1 << 16) | MUX_PB31F_TCC4_WO1)
3210 #define PORT_PB31F_TCC4_WO1                        (_UINT32_(1) << 31)
3211 
3212 /* =================== PORT definition for USB peripheral =================== */
3213 #define PIN_PA24H_USB_DM                           _UINT32_(24)
3214 #define MUX_PA24H_USB_DM                           _UINT32_(7)
3215 #define PINMUX_PA24H_USB_DM                        ((PIN_PA24H_USB_DM << 16) | MUX_PA24H_USB_DM)
3216 #define PORT_PA24H_USB_DM                          (_UINT32_(1) << 24)
3217 
3218 #define PIN_PA25H_USB_DP                           _UINT32_(25)
3219 #define MUX_PA25H_USB_DP                           _UINT32_(7)
3220 #define PINMUX_PA25H_USB_DP                        ((PIN_PA25H_USB_DP << 16) | MUX_PA25H_USB_DP)
3221 #define PORT_PA25H_USB_DP                          (_UINT32_(1) << 25)
3222 
3223 #define PIN_PA23H_USB_SOF_1KHZ                     _UINT32_(23)
3224 #define MUX_PA23H_USB_SOF_1KHZ                     _UINT32_(7)
3225 #define PINMUX_PA23H_USB_SOF_1KHZ                  ((PIN_PA23H_USB_SOF_1KHZ << 16) | MUX_PA23H_USB_SOF_1KHZ)
3226 #define PORT_PA23H_USB_SOF_1KHZ                    (_UINT32_(1) << 23)
3227 
3228 #define PIN_PB22H_USB_SOF_1KHZ                     _UINT32_(54)
3229 #define MUX_PB22H_USB_SOF_1KHZ                     _UINT32_(7)
3230 #define PINMUX_PB22H_USB_SOF_1KHZ                  ((PIN_PB22H_USB_SOF_1KHZ << 16) | MUX_PB22H_USB_SOF_1KHZ)
3231 #define PORT_PB22H_USB_SOF_1KHZ                    (_UINT32_(1) << 22)
3232 
3233 /* ================== PORT definition for TPIU peripheral =================== */
3234 #define PIN_PC27H_TPIU_TRACECLK                    _UINT32_(91)
3235 #define MUX_PC27H_TPIU_TRACECLK                    _UINT32_(7)
3236 #define PINMUX_PC27H_TPIU_TRACECLK                 ((PIN_PC27H_TPIU_TRACECLK << 16) | MUX_PC27H_TPIU_TRACECLK)
3237 #define PORT_PC27H_TPIU_TRACECLK                   (_UINT32_(1) << 27)
3238 
3239 #define PIN_PC28H_TPIU_TRACED0                     _UINT32_(92)
3240 #define MUX_PC28H_TPIU_TRACED0                     _UINT32_(7)
3241 #define PINMUX_PC28H_TPIU_TRACED0                  ((PIN_PC28H_TPIU_TRACED0 << 16) | MUX_PC28H_TPIU_TRACED0)
3242 #define PORT_PC28H_TPIU_TRACED0                    (_UINT32_(1) << 28)
3243 
3244 #define PIN_PC26H_TPIU_TRACED1                     _UINT32_(90)
3245 #define MUX_PC26H_TPIU_TRACED1                     _UINT32_(7)
3246 #define PINMUX_PC26H_TPIU_TRACED1                  ((PIN_PC26H_TPIU_TRACED1 << 16) | MUX_PC26H_TPIU_TRACED1)
3247 #define PORT_PC26H_TPIU_TRACED1                    (_UINT32_(1) << 26)
3248 
3249 #define PIN_PC25H_TPIU_TRACED2                     _UINT32_(89)
3250 #define MUX_PC25H_TPIU_TRACED2                     _UINT32_(7)
3251 #define PINMUX_PC25H_TPIU_TRACED2                  ((PIN_PC25H_TPIU_TRACED2 << 16) | MUX_PC25H_TPIU_TRACED2)
3252 #define PORT_PC25H_TPIU_TRACED2                    (_UINT32_(1) << 25)
3253 
3254 #define PIN_PC24H_TPIU_TRACED3                     _UINT32_(88)
3255 #define MUX_PC24H_TPIU_TRACED3                     _UINT32_(7)
3256 #define PINMUX_PC24H_TPIU_TRACED3                  ((PIN_PC24H_TPIU_TRACED3 << 16) | MUX_PC24H_TPIU_TRACED3)
3257 #define PORT_PC24H_TPIU_TRACED3                    (_UINT32_(1) << 24)
3258 
3259 
3260 
3261 #endif /* _PIC32CX1025SG41100_GPIO_H_ */
3262 
3263