1/*
2 * Copyright (c) 2022 Nordic Semiconductor
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6&pinctrl {
7	uart0_default: uart0_default {
8		group1 {
9			psels = <NRF_PSEL(UART_TX, 0, 6)>,
10				<NRF_PSEL(UART_RX, 0, 8)>,
11				<NRF_PSEL(UART_RTS, 0, 5)>,
12				<NRF_PSEL(UART_CTS, 0, 7)>;
13		};
14	};
15
16	uart0_sleep: uart0_sleep {
17		group1 {
18			psels = <NRF_PSEL(UART_TX, 0, 6)>,
19				<NRF_PSEL(UART_RX, 0, 8)>,
20				<NRF_PSEL(UART_RTS, 0, 5)>,
21				<NRF_PSEL(UART_CTS, 0, 7)>;
22			low-power-enable;
23		};
24	};
25
26	uart1_default: uart1_default {
27		group1 {
28			psels = <NRF_PSEL(UART_TX, 0, 14)>,
29				<NRF_PSEL(UART_RX, 0, 16)>,
30				<NRF_PSEL(UART_RTS, 0, 13)>,
31				<NRF_PSEL(UART_CTS, 0, 15)>;
32		};
33	};
34
35	uart1_sleep: uart1_sleep {
36		group1 {
37			psels = <NRF_PSEL(UART_TX, 0, 14)>,
38				<NRF_PSEL(UART_RX, 0, 16)>,
39				<NRF_PSEL(UART_RTS, 0, 13)>,
40				<NRF_PSEL(UART_CTS, 0, 15)>;
41			low-power-enable;
42		};
43	};
44
45	i2c0_default: i2c0_default {
46		group1 {
47			psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
48				<NRF_PSEL(TWIM_SCL, 0, 27)>;
49		};
50	};
51
52	i2c0_sleep: i2c0_sleep {
53		group1 {
54			psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
55				<NRF_PSEL(TWIM_SCL, 0, 27)>;
56			low-power-enable;
57		};
58	};
59
60	spi0_default: spi0_default {
61		group1 {
62			psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
63				<NRF_PSEL(SPIM_MOSI, 0, 26)>,
64				<NRF_PSEL(SPIM_MISO, 0, 29)>;
65		};
66	};
67
68	spi0_sleep: spi0_sleep {
69		group1 {
70			psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
71				<NRF_PSEL(SPIM_MOSI, 0, 26)>,
72				<NRF_PSEL(SPIM_MISO, 0, 29)>;
73			low-power-enable;
74		};
75	};
76
77	spi1_default: spi1_default {
78		group1 {
79			psels = <NRF_PSEL(SPIM_SCK, 0, 11)>,
80				<NRF_PSEL(SPIM_MOSI, 1, 0)>,
81				<NRF_PSEL(SPIM_MISO, 0, 12)>;
82		};
83	};
84
85	spi1_sleep: spi1_sleep {
86		group1 {
87			psels = <NRF_PSEL(SPIM_SCK, 0, 11)>,
88				<NRF_PSEL(SPIM_MOSI, 1, 0)>,
89				<NRF_PSEL(SPIM_MISO, 0, 12)>;
90			low-power-enable;
91		};
92	};
93
94	qspi_default: qspi_default {
95		group1 {
96			psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
97				<NRF_PSEL(QSPI_IO0, 0, 20)>,
98				<NRF_PSEL(QSPI_IO1, 0, 21)>,
99				<NRF_PSEL(QSPI_IO2, 0, 22)>,
100				<NRF_PSEL(QSPI_IO3, 0, 23)>,
101				<NRF_PSEL(QSPI_CSN, 0, 17)>;
102		};
103	};
104
105	qspi_sleep: qspi_sleep {
106		group1 {
107			psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
108				<NRF_PSEL(QSPI_IO0, 0, 20)>,
109				<NRF_PSEL(QSPI_IO1, 0, 21)>,
110				<NRF_PSEL(QSPI_IO2, 0, 22)>,
111				<NRF_PSEL(QSPI_IO3, 0, 23)>,
112				<NRF_PSEL(QSPI_CSN, 0, 17)>;
113			low-power-enable;
114		};
115	};
116
117};
118