1 /*
2 * Copyright (c) 2023 Nuvoton Technology Corporation.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #define DT_DRV_COMPAT nuvoton_numaker_pinctrl
8
9 #include <zephyr/drivers/pinctrl.h>
10 #include <NuMicro.h>
11
12 /* Get mfp_base, it should be == (&SYS->GPA_MFP0) */
13 #define MFP_BASE DT_INST_REG_ADDR_BY_NAME(0, mfp)
14 #define MFOS_BASE DT_INST_REG_ADDR_BY_NAME(0, mfos)
15 #define GPA_BASE DT_REG_ADDR(DT_NODELABEL(gpioa))
16 #define GPIO_SIZE DT_REG_SIZE(DT_NODELABEL(gpioa))
17
18 #define SLEWCTL_PIN_SHIFT(pin_idx) ((pin_idx) * 2)
19 #define SLEWCTL_MASK(pin_idx) (3 << SLEWCTL_PIN_SHIFT(pin_idx))
20 #define DINOFF_PIN_SHIFT(pin_idx) (pin_idx + GPIO_DINOFF_DINOFF0_Pos)
21 #define DINOFF_MASK(pin_idx) (1 << DINOFF_PIN_SHIFT(pin_idx))
22
gpio_configure(const pinctrl_soc_pin_t * pin,uint8_t port_idx,uint8_t pin_idx)23 static void gpio_configure(const pinctrl_soc_pin_t *pin, uint8_t port_idx, uint8_t pin_idx)
24 {
25 GPIO_T *port;
26
27 port = (GPIO_T *)(GPA_BASE + port_idx * GPIO_SIZE);
28
29 port->SMTEN = (port->SMTEN & ~BIT(pin_idx)) |
30 ((pin->schmitt_enable ? 1 : 0) << pin_idx);
31 port->SLEWCTL = (port->SLEWCTL & ~SLEWCTL_MASK(pin_idx)) |
32 (pin->slew_rate << SLEWCTL_PIN_SHIFT(pin_idx));
33 port->DINOFF = (port->DINOFF & ~DINOFF_MASK(pin_idx)) |
34 ((pin->digital_disable ? 1 : 0) << DINOFF_PIN_SHIFT(pin_idx));
35 }
36 /**
37 * Configure pin multi-function
38 */
configure_pin(const pinctrl_soc_pin_t * pin)39 static void configure_pin(const pinctrl_soc_pin_t *pin)
40 {
41 uint32_t pin_mux = pin->pin_mux;
42 uint8_t pin_index = PIN_INDEX(pin_mux);
43 uint8_t port_index = PORT_INDEX(pin_mux);
44 uint32_t mfp_cfg = MFP_CFG(pin_mux);
45
46
47 uint32_t *GPx_MFPx = ((uint32_t *)MFP_BASE) + port_index * 4 + (pin_index / 4);
48 uint32_t *GPx_MFOSx = ((uint32_t *)MFOS_BASE) + port_index;
49 uint32_t pinMask = NU_MFP_MASK(pin_index);
50
51 /*
52 * E.g.: SYS->GPA_MFP0 = (SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA0MFP_Msk) ) |
53 * SYS_GPA_MFP0_PA0MFP_SC0_CD;
54 */
55 *GPx_MFPx = (*GPx_MFPx & (~pinMask)) | mfp_cfg;
56 if (pin->open_drain != 0) {
57 *GPx_MFOSx |= BIT(pin_index);
58 } else {
59 *GPx_MFOSx &= ~BIT(pin_index);
60 }
61
62 gpio_configure(pin, port_index, pin_index);
63 }
64
65 /* Pinctrl API implementation */
pinctrl_configure_pins(const pinctrl_soc_pin_t * pins,uint8_t pin_cnt,uintptr_t reg)66 int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintptr_t reg)
67 {
68 ARG_UNUSED(reg);
69
70 /* Configure all peripheral devices' properties here. */
71 for (uint8_t i = 0U; i < pin_cnt; i++) {
72 configure_pin(&pins[i]);
73 }
74
75 return 0;
76 }
77
