1/*
2 * Copyright (c) 2019 SEAL AG
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <arm/armv7-m.dtsi>
8#include <zephyr/dt-bindings/adc/adc.h>
9#include <zephyr/dt-bindings/clock/kinetis_mcg.h>
10#include <zephyr/dt-bindings/clock/kinetis_sim.h>
11#include <zephyr/dt-bindings/gpio/gpio.h>
12#include <zephyr/dt-bindings/i2c/i2c.h>
13
14/ {
15	aliases {
16		watchdog0 = &wdog;
17	};
18
19	chosen {
20		zephyr,entropy = &trng;
21		zephyr,flash-controller = &ftfa;
22	};
23
24	cpus {
25		#address-cells = <1>;
26		#size-cells = <0>;
27
28		cpu@0 {
29			device_type = "cpu";
30			compatible = "arm,cortex-m4f";
31			reg = <0>;
32		};
33	};
34
35	/* Dummy pinctrl node, filled with pin mux options at board level */
36	pinctrl: pinctrl {
37		compatible = "nxp,port-pinctrl";
38		status = "okay";
39	};
40
41	soc {
42		mpu: mpu@4000d000 {
43			compatible = "nxp,sysmpu";
44			reg = <0x4000d000 0x1000>;
45			status = "disabled";
46		};
47
48		sim: sim@40047000 {
49			compatible = "nxp,kinetis-sim";
50			reg = <0x40047000 0x2000>;
51			#clock-cells = <3>;
52
53			core_clk {
54				compatible = "fixed-factor-clock";
55				clocks = <&mcg KINETIS_MCG_OUT_CLK>;
56				clock-div = <1>;
57				#clock-cells = <0>;
58			};
59
60			bus_clk {
61				compatible = "fixed-factor-clock";
62				clocks = <&mcg KINETIS_MCG_OUT_CLK>;
63				clock-div = <2>;
64				#clock-cells = <0>;
65			};
66
67			flexbus_clk {
68				compatible = "fixed-factor-clock";
69				clocks = <&mcg KINETIS_MCG_OUT_CLK>;
70				clock-div = <2>;
71				#clock-cells = <0>;
72			};
73
74			flash_clk {
75				compatible = "fixed-factor-clock";
76				clocks = <&mcg KINETIS_MCG_OUT_CLK>;
77				clock-div = <5>;
78				#clock-cells = <0>;
79			};
80		};
81
82		mcg: clock-controller@40064000 {
83			compatible = "nxp,kinetis-mcg";
84			reg = <0x40064000 0x1000>;
85			#clock-cells = <1>;
86		};
87
88		osc: clock-controller@40065000 {
89			compatible = "nxp,k8x-osc";
90			reg = <0x40065000 0x4>;
91			enable-external-reference;
92		};
93
94		ftfa: flash-controller@40020000 {
95			compatible = "nxp,kinetis-ftfa";
96			reg = <0x40020000 0x1000>;
97			interrupts = <18 0>, <19 0>;
98			interrupt-names = "command-complete", "read-collision";
99			status = "okay";
100
101			#address-cells = <1>;
102			#size-cells = <1>;
103		};
104
105		adc0: adc@4003b000 {
106			compatible = "nxp,kinetis-adc16";
107			reg = <0x4003b000 0x1000>;
108			clocks = <&sim KINETIS_SIM_SIM_SOPT7 0 0xF>,
109				<&sim KINETIS_SIM_SIM_SOPT7 7 0x80>;
110			interrupts = <39 0>;
111			dmas = <&edma0 0 40>;
112			dma-names = "adc0";
113			clk-source = <0>;
114			status = "disabled";
115			#io-channel-cells = <1>;
116		};
117
118		gpioa: gpio@400ff000 {
119			compatible = "nxp,kinetis-gpio";
120			status = "disabled";
121			reg = <0x400ff000 0x40>;
122			interrupts = <59 2>;
123			gpio-controller;
124			#gpio-cells = <2>;
125			nxp,kinetis-port = <&porta>;
126		};
127
128		gpiob: gpio@400ff040 {
129			compatible = "nxp,kinetis-gpio";
130			status = "disabled";
131			reg = <0x400ff040 0x40>;
132			interrupts = <60 2>;
133			gpio-controller;
134			#gpio-cells = <2>;
135			nxp,kinetis-port = <&portb>;
136		};
137
138		gpioc: gpio@400ff080 {
139			compatible = "nxp,kinetis-gpio";
140			status = "disabled";
141			reg = <0x400ff080 0x40>;
142			interrupts = <61 2>;
143			gpio-controller;
144			#gpio-cells = <2>;
145			nxp,kinetis-port = <&portc>;
146		};
147
148		gpiod: gpio@400ff0c0 {
149			compatible = "nxp,kinetis-gpio";
150			status = "disabled";
151			reg = <0x400ff0c0 0x40>;
152			interrupts = <62 2>;
153			gpio-controller;
154			#gpio-cells = <2>;
155			nxp,kinetis-port = <&portd>;
156		};
157
158		gpioe: gpio@400ff100 {
159			compatible = "nxp,kinetis-gpio";
160			status = "disabled";
161			reg = <0x400ff100 0x40>;
162			interrupts = <63 2>;
163			gpio-controller;
164			#gpio-cells = <2>;
165			nxp,kinetis-port = <&porte>;
166		};
167
168		i2c0: i2c@40066000 {
169			compatible = "nxp,kinetis-i2c";
170			clock-frequency = <I2C_BITRATE_STANDARD>;
171			#address-cells = <1>;
172			#size-cells = <0>;
173			reg = <0x40066000 0x1000>;
174			interrupts = <24 0>;
175			clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 6>;
176			status = "disabled";
177		};
178
179		i2c1: i2c@40067000 {
180			compatible = "nxp,kinetis-i2c";
181			clock-frequency = <I2C_BITRATE_STANDARD>;
182			#address-cells = <1>;
183			#size-cells = <0>;
184			reg = <0x40067000 0x1000>;
185			interrupts = <25 0>;
186			clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 7>;
187			status = "disabled";
188		};
189
190		i2c2: i2c@400e6000 {
191			compatible = "nxp,kinetis-i2c";
192			clock-frequency = <I2C_BITRATE_STANDARD>;
193			#address-cells = <1>;
194			#size-cells = <0>;
195			reg = <0x400e6000 0x1000>;
196			interrupts = <74 0>;
197			clocks = <&sim KINETIS_SIM_BUS_CLK 0x1028 6>;
198			status = "disabled";
199		};
200
201		i2c3: i2c@400e7000 {
202			compatible = "nxp,kinetis-i2c";
203			clock-frequency = <I2C_BITRATE_STANDARD>;
204			#address-cells = <1>;
205			#size-cells = <0>;
206			reg = <0x400e7000 0x1000>;
207			interrupts = <91 0>;
208			clocks = <&sim KINETIS_SIM_BUS_CLK 0x1028 7>;
209			status = "disabled";
210		};
211
212		lpuart0: lpuart@400c4000 {
213			compatible = "nxp,lpuart";
214			reg = <0x400c4000 0x1000>;
215			interrupts = <30 0>;
216			clocks = <&sim KINETIS_SIM_BUS_CLK 0x102c 4>;
217			dmas = <&edma0 1 2>, <&edma0 2 3>;
218			dma-names = "rx", "tx";
219			status = "disabled";
220		};
221
222		lpuart1: lpuart@400c5000 {
223			compatible = "nxp,lpuart";
224			reg = <0x400c5000 0x1000>;
225			interrupts = <31 0>;
226			clocks = <&sim KINETIS_SIM_BUS_CLK 0x102c 5>;
227			dmas = <&edma0 3 4>, <&edma0 4 5>;
228			dma-names = "rx", "tx";
229			status = "disabled";
230		};
231
232		lpuart2: lpuart@400c6000 {
233			compatible = "nxp,lpuart";
234			reg = <0x400c6000 0x1000>;
235			interrupts = <32 0>;
236			clocks = <&sim KINETIS_SIM_BUS_CLK 0x102c 6>;
237			dmas = <&edma0 5 6>, <&edma0 6 7>;
238			dma-names = "rx", "tx";
239			status = "disabled";
240		};
241
242		lpuart3: lpuart@400c7000 {
243			compatible = "nxp,lpuart";
244			reg = <0x400c7000 0x1000>;
245			interrupts = <33 0>;
246			clocks = <&sim KINETIS_SIM_BUS_CLK 0x102c 7>;
247			dmas = <&edma0 7 8>, <&edma0 8 9>;
248			dma-names = "rx", "tx";
249			status = "disabled";
250		};
251
252		lpuart4: lpuart@400d6000 {
253			compatible = "nxp,lpuart";
254			reg = <0x400d6000 0x1000>;
255			interrupts = <34 0>;
256			clocks = <&sim KINETIS_SIM_BUS_CLK 0x102c 22>;
257			dmas = <&edma0 9 10>, <&edma0 10 11>;
258			dma-names = "rx", "tx";
259			status = "disabled";
260		};
261
262		porta: pinmux@40049000 {
263			compatible = "nxp,port-pinmux";
264			reg = <0x40049000 0x1000>;
265			clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>;
266		};
267
268		portb: pinmux@4004a000 {
269			compatible = "nxp,port-pinmux";
270			reg = <0x4004a000 0x1000>;
271			clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>;
272		};
273
274		portc: pinmux@4004b000 {
275			compatible = "nxp,port-pinmux";
276			reg = <0x4004b000 0x1000>;
277			clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>;
278		};
279
280		portd: pinmux@4004c000 {
281			compatible = "nxp,port-pinmux";
282			reg = <0x4004c000 0x1000>;
283			clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>;
284		};
285
286		porte: pinmux@4004d000 {
287			compatible = "nxp,port-pinmux";
288			reg = <0x4004d000 0x1000>;
289			clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>;
290		};
291
292		ftm0: ftm@40038000 {
293			compatible = "nxp,ftm";
294			reg = <0x40038000 0x1000>;
295			interrupts = <42 0>;
296			clocks = <&mcg KINETIS_MCG_FIXED_FREQ_CLK>;
297			prescaler = <16>;
298			status = "disabled";
299		};
300
301		ftm1: ftm@40039000 {
302			compatible = "nxp,ftm";
303			reg = <0x40039000 0x1000>;
304			interrupts = <43 0>;
305			clocks = <&mcg KINETIS_MCG_FIXED_FREQ_CLK>;
306			prescaler = <16>;
307			status = "disabled";
308		};
309
310		ftm2: ftm@4003a000 {
311			compatible = "nxp,ftm";
312			reg = <0x4003a000 0x1000>;
313			interrupts = <44 0>;
314			clocks = <&mcg KINETIS_MCG_FIXED_FREQ_CLK>;
315			prescaler = <16>;
316			status = "disabled";
317		};
318
319		ftm3: ftm@400b9000 {
320			compatible = "nxp,ftm";
321			reg = <0x400b9000 0x1000>;
322			interrupts = <71 0>;
323			clocks = <&mcg KINETIS_MCG_FIXED_FREQ_CLK>;
324			prescaler = <16>;
325			status = "disabled";
326		};
327
328		rtc: rtc@4003d000 {
329			compatible = "nxp,rtc";
330			reg = <0x4003d000 0x1000>;
331			interrupts = <46 0>, <47 0>;
332			interrupt-names = "alarm", "seconds";
333			clock-frequency = <32768>;
334			prescaler = <32768>;
335		};
336
337		spi0: spi@4002c000 {
338			compatible = "nxp,dspi";
339			reg = <0x4002c000 0x1000>;
340			interrupts = <26 3>;
341			clocks = <&sim KINETIS_SIM_BUS_CLK 0x103c 12>;
342			#address-cells = <1>;
343			#size-cells = <0>;
344			status = "disabled";
345		};
346
347		spi1: spi@4002d000 {
348			compatible = "nxp,dspi";
349			reg = <0x4002d000 0x1000>;
350			interrupts = <27 3>;
351			clocks = <&sim KINETIS_SIM_BUS_CLK 0x103c 13>;
352			#address-cells = <1>;
353			#size-cells = <0>;
354			status = "disabled";
355		};
356
357		spi2: spi@400ac000 {
358			compatible = "nxp,dspi";
359			reg = <0x400ac000 0x1000>;
360			interrupts = <65 3>;
361			clocks = <&sim KINETIS_SIM_BUS_CLK 0x1030 12>;
362			#address-cells = <1>;
363			#size-cells = <0>;
364			status = "disabled";
365		};
366
367		trng: random@400a0000 {
368			compatible = "nxp,kinetis-trng";
369			reg = <0x400a0000 0x1000>;
370			interrupts = <23 0>;
371		};
372
373		usbotg: usbd@40072000 {
374			compatible = "nxp,kinetis-usbd";
375			reg = <0x40072000 0x1000>;
376			interrupts = <53 1>;
377			interrupt-names = "usb_otg";
378			num-bidir-endpoints = <16>;
379			status = "disabled";
380		};
381
382		wdog: watchdog@40052000 {
383			compatible = "nxp,kinetis-wdog";
384			reg = <0x40052000 0x1000>;
385			interrupts = <22 0>;
386			clocks = <&sim KINETIS_SIM_LPO_CLK 0 0>;
387		};
388
389		pit0: pit@40037000 {
390			compatible = "nxp,pit";
391			reg = <0x40037000 0x1000>;
392			clocks = <&sim KINETIS_SIM_BUS_CLK 0x103c 23>;
393			status = "disabled";
394			max-load-value = <0xffffffff>;
395			#address-cells = <1>;
396			#size-cells = <0>;
397
398			pit0_channel0: pit0_channel@0 {
399				compatible = "nxp,pit-channel";
400				reg = <0>;
401				interrupts = <48 0>;
402				status = "disabled";
403			};
404
405			pit0_channel1: pit0_channel@1 {
406				compatible = "nxp,pit-channel";
407				reg = <1>;
408				interrupts = <49 0>;
409				status = "disabled";
410			};
411
412			pit0_channel2: pit0_channel@2 {
413				compatible = "nxp,pit-channel";
414				reg = <2>;
415				interrupts = <50 0>;
416				status = "disabled";
417			};
418
419			pit0_channel3: pit0_channel@3 {
420				compatible = "nxp,pit-channel";
421				reg = <3>;
422				interrupts = <51 0>;
423				status = "disabled";
424			};
425		};
426
427		edma0: dma-controller@40008000 {
428			#dma-cells = <2>;
429			compatible = "nxp,mcux-edma";
430			nxp,version = <2>;
431			dma-channels = <16>;
432			dma-requests = <64>;
433			nxp,mem2mem;
434			reg = <0x40008000 0x1000>,
435				<0x40021000 0x1000>;
436			interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
437				<4 0>, <5 0>, <6 0>, <7 0>,
438				<8 0>, <9 0>, <10 0>, <11 0>,
439				<12 0>, <13 0>, <14 0>, <15 0>,
440				<16 0>;
441			clocks = <&sim KINETIS_SIM_DMA_CLK 0x1040 0x00000002>,
442				<&sim KINETIS_SIM_DMAMUX_CLK 0x103C 0x00000002>;
443			status = "disabled";
444		};
445
446	};
447};
448
449&nvic {
450	arm,num-irq-priority-bits = <4>;
451};
452