1 /* 2 * Copyright (c) 2024 - 2025, Nordic Semiconductor ASA 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright notice, this 11 * list of conditions and the following disclaimer. 12 * 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * 3. Neither the name of the copyright holder nor the names of its 18 * contributors may be used to endorse or promote products derived from this 19 * software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #ifndef NRFX_CONFIG_NRF9230_ENGB_RADIOCORE_H__ 35 #define NRFX_CONFIG_NRF9230_ENGB_RADIOCORE_H__ 36 37 #ifndef NRFX_CONFIG_H__ 38 #error "This file should not be included directly. Include nrfx_config.h instead." 39 #endif 40 41 #ifndef NRFX_RTC0_ENABLED 42 #define NRFX_RTC0_ENABLED 1 43 #endif 44 45 /** 46 * @brief NRFX_DEFAULT_IRQ_PRIORITY 47 * 48 * Integer value. Minimum: 0. Maximum: 7. 49 */ 50 #ifndef NRFX_DEFAULT_IRQ_PRIORITY 51 #define NRFX_DEFAULT_IRQ_PRIORITY 7 52 #endif 53 54 /** 55 * @brief NRFX_BELLBOARD_ENABLED 56 * 57 * Boolean. Accepted values: 0 and 1. 58 */ 59 #ifndef NRFX_BELLBOARD_ENABLED 60 #define NRFX_BELLBOARD_ENABLED 0 61 #endif 62 63 /** 64 * @brief NRFX_BELLBOARD_DEFAULT_CONFIG_IRQ_PRIORITY 65 * 66 * Integer value. Minimum: 0. Maximum: 7. 67 */ 68 #ifndef NRFX_BELLBOARD_DEFAULT_CONFIG_IRQ_PRIORITY 69 #define NRFX_BELLBOARD_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY 70 #endif 71 72 /** 73 * @brief NRFX_BELLBOARD0_ENABLED 74 * 75 * Boolean. Accepted values: 0 and 1. 76 */ 77 #ifndef NRFX_BELLBOARD0_ENABLED 78 #define NRFX_BELLBOARD0_ENABLED 0 79 #endif 80 81 /** 82 * @brief NRFX_BELLBOARD1_ENABLED 83 * 84 * Boolean. Accepted values: 0 and 1. 85 */ 86 #ifndef NRFX_BELLBOARD1_ENABLED 87 #define NRFX_BELLBOARD1_ENABLED 0 88 #endif 89 90 /** 91 * @brief NRFX_BELLBOARD2_ENABLED 92 * 93 * Boolean. Accepted values: 0 and 1. 94 */ 95 #ifndef NRFX_BELLBOARD2_ENABLED 96 #define NRFX_BELLBOARD2_ENABLED 0 97 #endif 98 99 /** 100 * @brief NRFX_BELLBOARD3_ENABLED 101 * 102 * Boolean. Accepted values: 0 and 1. 103 */ 104 #ifndef NRFX_BELLBOARD3_ENABLED 105 #define NRFX_BELLBOARD3_ENABLED 0 106 #endif 107 108 /** 109 * @brief NRFX_COMP_ENABLED 110 * 111 * Boolean. Accepted values: 0 and 1. 112 */ 113 #ifndef NRFX_COMP_ENABLED 114 #define NRFX_COMP_ENABLED 0 115 #endif 116 117 /** 118 * @brief NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY 119 * 120 * Integer value. Minimum: 0. Maximum: 7. 121 */ 122 #ifndef NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY 123 #define NRFX_COMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY 124 #endif 125 126 /** 127 * @brief NRFX_COMP_CONFIG_LOG_ENABLED 128 * 129 * Boolean. Accepted values: 0 and 1. 130 */ 131 #ifndef NRFX_COMP_CONFIG_LOG_ENABLED 132 #define NRFX_COMP_CONFIG_LOG_ENABLED 0 133 #endif 134 135 /** 136 * @brief NRFX_COMP_CONFIG_LOG_LEVEL 137 * 138 * Integer value. 139 * Supported values: 140 * - Off = 0 141 * - Error = 1 142 * - Warning = 2 143 * - Info = 3 144 * - Debug = 4 145 */ 146 #ifndef NRFX_COMP_CONFIG_LOG_LEVEL 147 #define NRFX_COMP_CONFIG_LOG_LEVEL 3 148 #endif 149 150 /** 151 * @brief NRFX_DPPI_ENABLED 152 * 153 * Boolean. Accepted values: 0 and 1. 154 */ 155 #ifndef NRFX_DPPI_ENABLED 156 #define NRFX_DPPI_ENABLED 0 157 #endif 158 159 /** 160 * @brief NRFX_DPPI_CONFIG_LOG_ENABLED 161 * 162 * Boolean. Accepted values: 0 and 1. 163 */ 164 #ifndef NRFX_DPPI_CONFIG_LOG_ENABLED 165 #define NRFX_DPPI_CONFIG_LOG_ENABLED 0 166 #endif 167 168 /** 169 * @brief NRFX_DPPI_CONFIG_LOG_LEVEL 170 * 171 * Integer value. 172 * Supported values: 173 * - Off = 0 174 * - Error = 1 175 * - Warning = 2 176 * - Info = 3 177 * - Debug = 4 178 */ 179 #ifndef NRFX_DPPI_CONFIG_LOG_LEVEL 180 #define NRFX_DPPI_CONFIG_LOG_LEVEL 3 181 #endif 182 183 /** 184 * @brief NRFX_DPPI020_CONFIG_OWNED_CHANNELS_MASK 185 */ 186 #ifndef NRFX_DPPI020_CONFIG_OWNED_CHANNELS_MASK 187 #define NRFX_DPPI020_CONFIG_OWNED_CHANNELS_MASK 0x0000000f 188 #endif 189 190 /** 191 * @brief NRFX_DPPI030_CONFIG_OWNED_CHANNELS_MASK 192 */ 193 #ifndef NRFX_DPPI030_CONFIG_OWNED_CHANNELS_MASK 194 #define NRFX_DPPI030_CONFIG_OWNED_CHANNELS_MASK 0x0000000f 195 #endif 196 197 /** 198 * @brief NRFX_DPPI120_CONFIG_OWNED_CHANNELS_MASK 199 */ 200 #ifndef NRFX_DPPI120_CONFIG_OWNED_CHANNELS_MASK 201 #define NRFX_DPPI120_CONFIG_OWNED_CHANNELS_MASK 0x000000ff 202 #endif 203 204 /** 205 * @brief NRFX_DPPI130_CONFIG_OWNED_CHANNELS_MASK 206 */ 207 #ifndef NRFX_DPPI130_CONFIG_OWNED_CHANNELS_MASK 208 #define NRFX_DPPI130_CONFIG_OWNED_CHANNELS_MASK 0x000000ff 209 #endif 210 211 /** 212 * @brief NRFX_DPPI131_CONFIG_OWNED_CHANNELS_MASK 213 */ 214 #ifndef NRFX_DPPI131_CONFIG_OWNED_CHANNELS_MASK 215 #define NRFX_DPPI131_CONFIG_OWNED_CHANNELS_MASK 0x000000ff 216 #endif 217 218 /** 219 * @brief NRFX_DPPI132_CONFIG_OWNED_CHANNELS_MASK 220 */ 221 #ifndef NRFX_DPPI132_CONFIG_OWNED_CHANNELS_MASK 222 #define NRFX_DPPI132_CONFIG_OWNED_CHANNELS_MASK 0 223 #endif 224 225 /** 226 * @brief NRFX_DPPI133_CONFIG_OWNED_CHANNELS_MASK 227 */ 228 #ifndef NRFX_DPPI133_CONFIG_OWNED_CHANNELS_MASK 229 #define NRFX_DPPI133_CONFIG_OWNED_CHANNELS_MASK 0x000000ff 230 #endif 231 232 /** 233 * @brief NRFX_DPPI134_CONFIG_OWNED_CHANNELS_MASK 234 */ 235 #ifndef NRFX_DPPI134_CONFIG_OWNED_CHANNELS_MASK 236 #define NRFX_DPPI134_CONFIG_OWNED_CHANNELS_MASK 0x000000ff 237 #endif 238 239 /** 240 * @brief NRFX_DPPI135_CONFIG_OWNED_CHANNELS_MASK 241 */ 242 #ifndef NRFX_DPPI135_CONFIG_OWNED_CHANNELS_MASK 243 #define NRFX_DPPI135_CONFIG_OWNED_CHANNELS_MASK 0x000000ff 244 #endif 245 246 /** 247 * @brief NRFX_DPPI136_CONFIG_OWNED_CHANNELS_MASK 248 */ 249 #ifndef NRFX_DPPI136_CONFIG_OWNED_CHANNELS_MASK 250 #define NRFX_DPPI136_CONFIG_OWNED_CHANNELS_MASK 0x000000ff 251 #endif 252 253 /** 254 * @brief NRFX_DPPI020_PUB_CONFIG_ALLOWED_CHANNELS_MASK 255 */ 256 #ifndef NRFX_DPPI020_PUB_CONFIG_ALLOWED_CHANNELS_MASK 257 #define NRFX_DPPI020_PUB_CONFIG_ALLOWED_CHANNELS_MASK 0x00000003 258 #endif 259 260 /** 261 * @brief NRFX_DPPI030_PUB_CONFIG_ALLOWED_CHANNELS_MASK 262 */ 263 #ifndef NRFX_DPPI030_PUB_CONFIG_ALLOWED_CHANNELS_MASK 264 #define NRFX_DPPI030_PUB_CONFIG_ALLOWED_CHANNELS_MASK 0x00000003 265 #endif 266 267 /** 268 * @brief NRFX_DPPI120_PUB_CONFIG_ALLOWED_CHANNELS_MASK 269 */ 270 #ifndef NRFX_DPPI120_PUB_CONFIG_ALLOWED_CHANNELS_MASK 271 #define NRFX_DPPI120_PUB_CONFIG_ALLOWED_CHANNELS_MASK 0x000000f0 272 #endif 273 274 /** 275 * @brief NRFX_DPPI130_PUB_CONFIG_ALLOWED_CHANNELS_MASK 276 */ 277 #ifndef NRFX_DPPI130_PUB_CONFIG_ALLOWED_CHANNELS_MASK 278 #define NRFX_DPPI130_PUB_CONFIG_ALLOWED_CHANNELS_MASK 0x000000ff 279 #endif 280 281 /** 282 * @brief NRFX_DPPI131_PUB_CONFIG_ALLOWED_CHANNELS_MASK 283 */ 284 #ifndef NRFX_DPPI131_PUB_CONFIG_ALLOWED_CHANNELS_MASK 285 #define NRFX_DPPI131_PUB_CONFIG_ALLOWED_CHANNELS_MASK 0 286 #endif 287 288 /** 289 * @brief NRFX_DPPI132_PUB_CONFIG_ALLOWED_CHANNELS_MASK 290 */ 291 #ifndef NRFX_DPPI132_PUB_CONFIG_ALLOWED_CHANNELS_MASK 292 #define NRFX_DPPI132_PUB_CONFIG_ALLOWED_CHANNELS_MASK 0 293 #endif 294 295 /** 296 * @brief NRFX_DPPI133_PUB_CONFIG_ALLOWED_CHANNELS_MASK 297 */ 298 #ifndef NRFX_DPPI133_PUB_CONFIG_ALLOWED_CHANNELS_MASK 299 #define NRFX_DPPI133_PUB_CONFIG_ALLOWED_CHANNELS_MASK 0x0000001e 300 #endif 301 302 /** 303 * @brief NRFX_DPPI134_PUB_CONFIG_ALLOWED_CHANNELS_MASK 304 */ 305 #ifndef NRFX_DPPI134_PUB_CONFIG_ALLOWED_CHANNELS_MASK 306 #define NRFX_DPPI134_PUB_CONFIG_ALLOWED_CHANNELS_MASK 0x00000020 307 #endif 308 309 /** 310 * @brief NRFX_DPPI135_PUB_CONFIG_ALLOWED_CHANNELS_MASK 311 */ 312 #ifndef NRFX_DPPI135_PUB_CONFIG_ALLOWED_CHANNELS_MASK 313 #define NRFX_DPPI135_PUB_CONFIG_ALLOWED_CHANNELS_MASK 0x00000040 314 #endif 315 316 /** 317 * @brief NRFX_DPPI136_PUB_CONFIG_ALLOWED_CHANNELS_MASK 318 */ 319 #ifndef NRFX_DPPI136_PUB_CONFIG_ALLOWED_CHANNELS_MASK 320 #define NRFX_DPPI136_PUB_CONFIG_ALLOWED_CHANNELS_MASK 0x00000081 321 #endif 322 323 /** 324 * @brief NRFX_DPPI020_SUB_CONFIG_ALLOWED_CHANNELS_MASK 325 */ 326 #ifndef NRFX_DPPI020_SUB_CONFIG_ALLOWED_CHANNELS_MASK 327 #define NRFX_DPPI020_SUB_CONFIG_ALLOWED_CHANNELS_MASK 0x0000000c 328 #endif 329 330 /** 331 * @brief NRFX_DPPI030_SUB_CONFIG_ALLOWED_CHANNELS_MASK 332 */ 333 #ifndef NRFX_DPPI030_SUB_CONFIG_ALLOWED_CHANNELS_MASK 334 #define NRFX_DPPI030_SUB_CONFIG_ALLOWED_CHANNELS_MASK 0x0000000c 335 #endif 336 337 /** 338 * @brief NRFX_DPPI120_SUB_CONFIG_ALLOWED_CHANNELS_MASK 339 */ 340 #ifndef NRFX_DPPI120_SUB_CONFIG_ALLOWED_CHANNELS_MASK 341 #define NRFX_DPPI120_SUB_CONFIG_ALLOWED_CHANNELS_MASK 0x0000000f 342 #endif 343 344 /** 345 * @brief NRFX_DPPI130_SUB_CONFIG_ALLOWED_CHANNELS_MASK 346 */ 347 #ifndef NRFX_DPPI130_SUB_CONFIG_ALLOWED_CHANNELS_MASK 348 #define NRFX_DPPI130_SUB_CONFIG_ALLOWED_CHANNELS_MASK 0x000000ff 349 #endif 350 351 /** 352 * @brief NRFX_DPPI131_SUB_CONFIG_ALLOWED_CHANNELS_MASK 353 */ 354 #ifndef NRFX_DPPI131_SUB_CONFIG_ALLOWED_CHANNELS_MASK 355 #define NRFX_DPPI131_SUB_CONFIG_ALLOWED_CHANNELS_MASK 0x000000ff 356 #endif 357 358 /** 359 * @brief NRFX_DPPI132_SUB_CONFIG_ALLOWED_CHANNELS_MASK 360 */ 361 #ifndef NRFX_DPPI132_SUB_CONFIG_ALLOWED_CHANNELS_MASK 362 #define NRFX_DPPI132_SUB_CONFIG_ALLOWED_CHANNELS_MASK 0 363 #endif 364 365 /** 366 * @brief NRFX_DPPI133_SUB_CONFIG_ALLOWED_CHANNELS_MASK 367 */ 368 #ifndef NRFX_DPPI133_SUB_CONFIG_ALLOWED_CHANNELS_MASK 369 #define NRFX_DPPI133_SUB_CONFIG_ALLOWED_CHANNELS_MASK 0x000000e1 370 #endif 371 372 /** 373 * @brief NRFX_DPPI134_SUB_CONFIG_ALLOWED_CHANNELS_MASK 374 */ 375 #ifndef NRFX_DPPI134_SUB_CONFIG_ALLOWED_CHANNELS_MASK 376 #define NRFX_DPPI134_SUB_CONFIG_ALLOWED_CHANNELS_MASK 0x000000df 377 #endif 378 379 /** 380 * @brief NRFX_DPPI135_SUB_CONFIG_ALLOWED_CHANNELS_MASK 381 */ 382 #ifndef NRFX_DPPI135_SUB_CONFIG_ALLOWED_CHANNELS_MASK 383 #define NRFX_DPPI135_SUB_CONFIG_ALLOWED_CHANNELS_MASK 0x000000bf 384 #endif 385 386 /** 387 * @brief NRFX_DPPI136_SUB_CONFIG_ALLOWED_CHANNELS_MASK 388 */ 389 #ifndef NRFX_DPPI136_SUB_CONFIG_ALLOWED_CHANNELS_MASK 390 #define NRFX_DPPI136_SUB_CONFIG_ALLOWED_CHANNELS_MASK 0x0000007e 391 #endif 392 393 /** 394 * @brief NRFX_DPPI020_ENABLED 395 * 396 * Boolean. Accepted values: 0 and 1. 397 */ 398 #ifndef NRFX_DPPI020_ENABLED 399 #define NRFX_DPPI020_ENABLED 0 400 #endif 401 402 /** 403 * @brief NRFX_DPPI030_ENABLED 404 * 405 * Boolean. Accepted values: 0 and 1. 406 */ 407 #ifndef NRFX_DPPI030_ENABLED 408 #define NRFX_DPPI030_ENABLED 0 409 #endif 410 411 /** 412 * @brief NRFX_DPPI120_ENABLED 413 * 414 * Boolean. Accepted values: 0 and 1. 415 */ 416 #ifndef NRFX_DPPI120_ENABLED 417 #define NRFX_DPPI120_ENABLED 0 418 #endif 419 420 /** 421 * @brief NRFX_DPPI130_ENABLED 422 * 423 * Boolean. Accepted values: 0 and 1. 424 */ 425 #ifndef NRFX_DPPI130_ENABLED 426 #define NRFX_DPPI130_ENABLED 0 427 #endif 428 429 /** 430 * @brief NRFX_DPPI131_ENABLED 431 * 432 * Boolean. Accepted values: 0 and 1. 433 */ 434 #ifndef NRFX_DPPI131_ENABLED 435 #define NRFX_DPPI131_ENABLED 0 436 #endif 437 438 /** 439 * @brief NRFX_DPPI132_ENABLED 440 * 441 * Boolean. Accepted values: 0 and 1. 442 */ 443 #ifndef NRFX_DPPI132_ENABLED 444 #define NRFX_DPPI132_ENABLED 0 445 #endif 446 447 /** 448 * @brief NRFX_DPPI133_ENABLED 449 * 450 * Boolean. Accepted values: 0 and 1. 451 */ 452 #ifndef NRFX_DPPI133_ENABLED 453 #define NRFX_DPPI133_ENABLED 0 454 #endif 455 456 /** 457 * @brief NRFX_DPPI134_ENABLED 458 * 459 * Boolean. Accepted values: 0 and 1. 460 */ 461 #ifndef NRFX_DPPI134_ENABLED 462 #define NRFX_DPPI134_ENABLED 0 463 #endif 464 465 /** 466 * @brief NRFX_DPPI135_ENABLED 467 * 468 * Boolean. Accepted values: 0 and 1. 469 */ 470 #ifndef NRFX_DPPI135_ENABLED 471 #define NRFX_DPPI135_ENABLED 0 472 #endif 473 474 /** 475 * @brief NRFX_DPPI136_ENABLED 476 * 477 * Boolean. Accepted values: 0 and 1. 478 */ 479 #ifndef NRFX_DPPI136_ENABLED 480 #define NRFX_DPPI136_ENABLED 0 481 #endif 482 483 /** 484 * @brief NRFX_EGU_ENABLED 485 * 486 * Boolean. Accepted values: 0 and 1. 487 */ 488 #ifndef NRFX_EGU_ENABLED 489 #define NRFX_EGU_ENABLED 0 490 #endif 491 492 /** 493 * @brief NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY 494 * 495 * Integer value. Minimum: 0. Maximum: 7. 496 */ 497 #ifndef NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY 498 #define NRFX_EGU_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY 499 #endif 500 501 /** 502 * @brief NRFX_EGU020_ENABLED 503 * 504 * Boolean. Accepted values: 0 and 1. 505 */ 506 #ifndef NRFX_EGU020_ENABLED 507 #define NRFX_EGU020_ENABLED 0 508 #endif 509 510 /** 511 * @brief NRFX_EGU130_ENABLED 512 * 513 * Boolean. Accepted values: 0 and 1. 514 */ 515 #ifndef NRFX_EGU130_ENABLED 516 #define NRFX_EGU130_ENABLED 0 517 #endif 518 519 /** 520 * @brief NRFX_GPIOTE_ENABLED 521 * 522 * Boolean. Accepted values: 0 and 1. 523 */ 524 #ifndef NRFX_GPIOTE_ENABLED 525 #define NRFX_GPIOTE_ENABLED 0 526 #endif 527 528 /** 529 * @brief NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY 530 * 531 * Integer value. Minimum: 0. Maximum: 7. 532 */ 533 #ifndef NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY 534 #define NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY 535 #endif 536 537 /** 538 * @brief NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS 539 * 540 * Integer value. Minimum: 0. Maximum: 15. 541 */ 542 #ifndef NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS 543 #define NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS 2 544 #endif 545 546 /** 547 * @brief NRFX_GPIOTE_CONFIG_LOG_ENABLED 548 * 549 * Boolean. Accepted values: 0 and 1. 550 */ 551 #ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED 552 #define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0 553 #endif 554 555 /** 556 * @brief NRFX_GPIOTE_CONFIG_LOG_LEVEL 557 * 558 * Integer value. 559 * Supported values: 560 * - Off = 0 561 * - Error = 1 562 * - Warning = 2 563 * - Info = 3 564 * - Debug = 4 565 */ 566 #ifndef NRFX_GPIOTE_CONFIG_LOG_LEVEL 567 #define NRFX_GPIOTE_CONFIG_LOG_LEVEL 3 568 #endif 569 570 /** 571 * @brief NRFX_GPIOTE130_ENABLED 572 * 573 * Boolean. Accepted values: 0 and 1. 574 */ 575 #ifndef NRFX_GPIOTE130_ENABLED 576 #define NRFX_GPIOTE130_ENABLED 0 577 #endif 578 579 /** 580 * @brief NRFX_GPIOTE131_ENABLED 581 * 582 * Boolean. Accepted values: 0 and 1. 583 */ 584 #ifndef NRFX_GPIOTE131_ENABLED 585 #define NRFX_GPIOTE131_ENABLED 0 586 #endif 587 588 /** 589 * @brief NRFX_GRTC_ENABLED 590 * 591 * Boolean. Accepted values: 0 and 1. 592 */ 593 #ifndef NRFX_GRTC_ENABLED 594 #define NRFX_GRTC_ENABLED 0 595 #endif 596 597 /** 598 * @brief NRFX_GRTC_CONFIG_AUTOEN 599 * 600 * Boolean. Accepted values: 0 and 1. 601 */ 602 #ifndef NRFX_GRTC_CONFIG_AUTOEN 603 #define NRFX_GRTC_CONFIG_AUTOEN 1 604 #endif 605 606 /** 607 * @brief NRFX_GRTC_CONFIG_AUTOSTART 608 * 609 * Boolean. Accepted values: 0 and 1. 610 */ 611 #ifndef NRFX_GRTC_CONFIG_AUTOSTART 612 #define NRFX_GRTC_CONFIG_AUTOSTART 0 613 #endif 614 615 /** 616 * @brief NRFX_GRTC_CONFIG_CLEAR_AT_INIT 617 * 618 * Boolean. Accepted values: 0 and 1. 619 */ 620 #ifndef NRFX_GRTC_CONFIG_CLEAR_AT_INIT 621 #define NRFX_GRTC_CONFIG_CLEAR_AT_INIT 0 622 #endif 623 624 /** 625 * @brief NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS 626 * 627 * Integer value. 628 */ 629 #ifndef NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS 630 #define NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS 4 631 #endif 632 633 /** 634 * @brief NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK 635 */ 636 #ifndef NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK 637 #define NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK 0x00000f00 638 #endif 639 640 /** 641 * @brief NRFX_GRTC_DEFAULT_CONFIG_IRQ_PRIORITY 642 * 643 * Integer value. Minimum: 0. Maximum: 7. 644 */ 645 #ifndef NRFX_GRTC_DEFAULT_CONFIG_IRQ_PRIORITY 646 #define NRFX_GRTC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY 647 #endif 648 649 /** 650 * @brief NRFX_GRTC_CONFIG_LOG_ENABLED 651 * 652 * Boolean. Accepted values: 0 and 1. 653 */ 654 #ifndef NRFX_GRTC_CONFIG_LOG_ENABLED 655 #define NRFX_GRTC_CONFIG_LOG_ENABLED 0 656 #endif 657 658 /** 659 * @brief NRFX_GRTC_CONFIG_LOG_LEVEL 660 * 661 * Integer value. 662 * Supported values: 663 * - Off = 0 664 * - Error = 1 665 * - Warning = 2 666 * - Info = 3 667 * - Debug = 4 668 */ 669 #ifndef NRFX_GRTC_CONFIG_LOG_LEVEL 670 #define NRFX_GRTC_CONFIG_LOG_LEVEL 3 671 #endif 672 673 /** 674 * @brief NRFX_I2S_ENABLED 675 * 676 * Boolean. Accepted values: 0 and 1. 677 */ 678 #ifndef NRFX_I2S_ENABLED 679 #define NRFX_I2S_ENABLED 0 680 #endif 681 682 /** 683 * @brief NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY 684 * 685 * Integer value. Minimum: 0. Maximum: 7. 686 */ 687 #ifndef NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY 688 #define NRFX_I2S_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY 689 #endif 690 691 /** 692 * @brief NRFX_I2S_CONFIG_LOG_ENABLED 693 * 694 * Boolean. Accepted values: 0 and 1. 695 */ 696 #ifndef NRFX_I2S_CONFIG_LOG_ENABLED 697 #define NRFX_I2S_CONFIG_LOG_ENABLED 0 698 #endif 699 700 /** 701 * @brief NRFX_I2S_CONFIG_LOG_LEVEL 702 * 703 * Integer value. 704 * Supported values: 705 * - Off = 0 706 * - Error = 1 707 * - Warning = 2 708 * - Info = 3 709 * - Debug = 4 710 */ 711 #ifndef NRFX_I2S_CONFIG_LOG_LEVEL 712 #define NRFX_I2S_CONFIG_LOG_LEVEL 3 713 #endif 714 715 /** 716 * @brief NRFX_I2S130_ENABLED 717 * 718 * Boolean. Accepted values: 0 and 1. 719 */ 720 #ifndef NRFX_I2S130_ENABLED 721 #define NRFX_I2S130_ENABLED 0 722 #endif 723 724 /** 725 * @brief NRFX_I2S131_ENABLED 726 * 727 * Boolean. Accepted values: 0 and 1. 728 */ 729 #ifndef NRFX_I2S131_ENABLED 730 #define NRFX_I2S131_ENABLED 0 731 #endif 732 733 /** 734 * @brief NRFX_IPCT_CONFIG_OWNED_CHANNELS_MASK 735 */ 736 #ifndef NRFX_IPCT_CONFIG_OWNED_CHANNELS_MASK 737 #define NRFX_IPCT_CONFIG_OWNED_CHANNELS_MASK 0x000000f0 738 #endif 739 740 /** 741 * @brief NRFX_IPCT_PUB_CONFIG_ALLOWED_CHANNELS_MASK 742 */ 743 #ifndef NRFX_IPCT_PUB_CONFIG_ALLOWED_CHANNELS_MASK 744 #define NRFX_IPCT_PUB_CONFIG_ALLOWED_CHANNELS_MASK 0x00000030 745 #endif 746 747 /** 748 * @brief NRFX_IPCT_SUB_CONFIG_ALLOWED_CHANNELS_MASK 749 */ 750 #ifndef NRFX_IPCT_SUB_CONFIG_ALLOWED_CHANNELS_MASK 751 #define NRFX_IPCT_SUB_CONFIG_ALLOWED_CHANNELS_MASK 0x000000c0 752 #endif 753 754 /** 755 * @brief NRFX_IPCT120_CONFIG_OWNED_CHANNELS_MASK 756 */ 757 #ifndef NRFX_IPCT120_CONFIG_OWNED_CHANNELS_MASK 758 #define NRFX_IPCT120_CONFIG_OWNED_CHANNELS_MASK 0 759 #endif 760 761 /** 762 * @brief NRFX_IPCT130_CONFIG_OWNED_CHANNELS_MASK 763 */ 764 #ifndef NRFX_IPCT130_CONFIG_OWNED_CHANNELS_MASK 765 #define NRFX_IPCT130_CONFIG_OWNED_CHANNELS_MASK 0x0000000f 766 #endif 767 768 /** 769 * @brief NRFX_IPCT120_PUB_CONFIG_ALLOWED_CHANNELS_MASK 770 */ 771 #ifndef NRFX_IPCT120_PUB_CONFIG_ALLOWED_CHANNELS_MASK 772 #define NRFX_IPCT120_PUB_CONFIG_ALLOWED_CHANNELS_MASK 0 773 #endif 774 775 /** 776 * @brief NRFX_IPCT130_PUB_CONFIG_ALLOWED_CHANNELS_MASK 777 */ 778 #ifndef NRFX_IPCT130_PUB_CONFIG_ALLOWED_CHANNELS_MASK 779 #define NRFX_IPCT130_PUB_CONFIG_ALLOWED_CHANNELS_MASK 0x0000000c 780 #endif 781 782 /** 783 * @brief NRFX_IPCT120_SUB_CONFIG_ALLOWED_CHANNELS_MASK 784 */ 785 #ifndef NRFX_IPCT120_SUB_CONFIG_ALLOWED_CHANNELS_MASK 786 #define NRFX_IPCT120_SUB_CONFIG_ALLOWED_CHANNELS_MASK 0 787 #endif 788 789 /** 790 * @brief NRFX_IPCT130_SUB_CONFIG_ALLOWED_CHANNELS_MASK 791 */ 792 #ifndef NRFX_IPCT130_SUB_CONFIG_ALLOWED_CHANNELS_MASK 793 #define NRFX_IPCT130_SUB_CONFIG_ALLOWED_CHANNELS_MASK 0x00000003 794 #endif 795 796 /** 797 * @brief NRFX_LPCOMP_ENABLED 798 * 799 * Boolean. Accepted values: 0 and 1. 800 */ 801 #ifndef NRFX_LPCOMP_ENABLED 802 #define NRFX_LPCOMP_ENABLED 0 803 #endif 804 805 /** 806 * @brief NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY 807 * 808 * Integer value. Minimum: 0. Maximum: 7. 809 */ 810 #ifndef NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY 811 #define NRFX_LPCOMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY 812 #endif 813 814 /** 815 * @brief NRFX_LPCOMP_CONFIG_LOG_ENABLED 816 * 817 * Boolean. Accepted values: 0 and 1. 818 */ 819 #ifndef NRFX_LPCOMP_CONFIG_LOG_ENABLED 820 #define NRFX_LPCOMP_CONFIG_LOG_ENABLED 0 821 #endif 822 823 /** 824 * @brief NRFX_LPCOMP_CONFIG_LOG_LEVEL 825 * 826 * Integer value. 827 * Supported values: 828 * - Off = 0 829 * - Error = 1 830 * - Warning = 2 831 * - Info = 3 832 * - Debug = 4 833 */ 834 #ifndef NRFX_LPCOMP_CONFIG_LOG_LEVEL 835 #define NRFX_LPCOMP_CONFIG_LOG_LEVEL 3 836 #endif 837 838 /** 839 * @brief NRFX_MVDMA_ENABLED 840 * 841 * Boolean. Accepted values: 0 and 1. 842 */ 843 #ifndef NRFX_MVDMA_ENABLED 844 #define NRFX_MVDMA_ENABLED 0 845 #endif 846 847 /** 848 * @brief NRFX_MVDMA120_ENABLED 849 * 850 * Boolean. Accepted values: 0 and 1. 851 */ 852 #ifndef NRFX_MVDMA120_ENABLED 853 #define NRFX_MVDMA120_ENABLED 0 854 #endif 855 856 /** 857 * @brief NRFX_MVDMA121_ENABLED 858 * 859 * Boolean. Accepted values: 0 and 1. 860 */ 861 #ifndef NRFX_MVDMA121_ENABLED 862 #define NRFX_MVDMA121_ENABLED 0 863 #endif 864 865 /** 866 * @brief NRFX_PDM_ENABLED 867 * 868 * Boolean. Accepted values: 0 and 1. 869 */ 870 #ifndef NRFX_PDM_ENABLED 871 #define NRFX_PDM_ENABLED 0 872 #endif 873 874 /** 875 * @brief NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY 876 * 877 * Integer value. Minimum: 0. Maximum: 7. 878 */ 879 #ifndef NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY 880 #define NRFX_PDM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY 881 #endif 882 883 /** 884 * @brief NRFX_PDM_CONFIG_LOG_ENABLED 885 * 886 * Boolean. Accepted values: 0 and 1. 887 */ 888 #ifndef NRFX_PDM_CONFIG_LOG_ENABLED 889 #define NRFX_PDM_CONFIG_LOG_ENABLED 0 890 #endif 891 892 /** 893 * @brief NRFX_PDM_CONFIG_LOG_LEVEL 894 * 895 * Integer value. 896 * Supported values: 897 * - Off = 0 898 * - Error = 1 899 * - Warning = 2 900 * - Info = 3 901 * - Debug = 4 902 */ 903 #ifndef NRFX_PDM_CONFIG_LOG_LEVEL 904 #define NRFX_PDM_CONFIG_LOG_LEVEL 3 905 #endif 906 907 /** 908 * @brief NRFX_PPIB_ENABLED 909 * 910 * Boolean. Accepted values: 0 and 1. 911 */ 912 #ifndef NRFX_PPIB_ENABLED 913 #define NRFX_PPIB_ENABLED 0 914 #endif 915 916 /** 917 * @brief NRFX_PPIB_CONFIG_LOG_ENABLED 918 * 919 * Boolean. Accepted values: 0 and 1. 920 */ 921 #ifndef NRFX_PPIB_CONFIG_LOG_ENABLED 922 #define NRFX_PPIB_CONFIG_LOG_ENABLED 0 923 #endif 924 925 /** 926 * @brief NRFX_PPIB_CONFIG_LOG_LEVEL 927 * 928 * Integer value. 929 * Supported values: 930 * - Off = 0 931 * - Error = 1 932 * - Warning = 2 933 * - Info = 3 934 * - Debug = 4 935 */ 936 #ifndef NRFX_PPIB_CONFIG_LOG_LEVEL 937 #define NRFX_PPIB_CONFIG_LOG_LEVEL 3 938 #endif 939 940 /** 941 * @brief NRFX_PPIB020_ENABLED 942 * 943 * Boolean. Accepted values: 0 and 1. 944 */ 945 #ifndef NRFX_PPIB020_ENABLED 946 #define NRFX_PPIB020_ENABLED 0 947 #endif 948 949 /** 950 * @brief NRFX_PPIB030_ENABLED 951 * 952 * Boolean. Accepted values: 0 and 1. 953 */ 954 #ifndef NRFX_PPIB030_ENABLED 955 #define NRFX_PPIB030_ENABLED 0 956 #endif 957 958 /** 959 * @brief NRFX_PRS_ENABLED 960 * 961 * Boolean. Accepted values: 0 and 1. 962 */ 963 #ifndef NRFX_PRS_ENABLED 964 #define NRFX_PRS_ENABLED 0 965 #endif 966 967 /** 968 * @brief NRFX_PRS_CONFIG_LOG_ENABLED 969 * 970 * Boolean. Accepted values: 0 and 1. 971 */ 972 #ifndef NRFX_PRS_CONFIG_LOG_ENABLED 973 #define NRFX_PRS_CONFIG_LOG_ENABLED 0 974 #endif 975 976 /** 977 * @brief NRFX_PRS_CONFIG_LOG_LEVEL 978 * 979 * Integer value. 980 * Supported values: 981 * - Off = 0 982 * - Error = 1 983 * - Warning = 2 984 * - Info = 3 985 * - Debug = 4 986 */ 987 #ifndef NRFX_PRS_CONFIG_LOG_LEVEL 988 #define NRFX_PRS_CONFIG_LOG_LEVEL 3 989 #endif 990 991 /** 992 * @brief NRFX_PRS_BOX_0_ENABLED 993 * 994 * Boolean. Accepted values: 0 and 1. 995 */ 996 #ifndef NRFX_PRS_BOX_0_ENABLED 997 #define NRFX_PRS_BOX_0_ENABLED 0 998 #endif 999 1000 /** 1001 * @brief NRFX_PRS_BOX_1_ENABLED 1002 * 1003 * Boolean. Accepted values: 0 and 1. 1004 */ 1005 #ifndef NRFX_PRS_BOX_1_ENABLED 1006 #define NRFX_PRS_BOX_1_ENABLED 0 1007 #endif 1008 1009 /** 1010 * @brief NRFX_PRS_BOX_2_ENABLED 1011 * 1012 * Boolean. Accepted values: 0 and 1. 1013 */ 1014 #ifndef NRFX_PRS_BOX_2_ENABLED 1015 #define NRFX_PRS_BOX_2_ENABLED 0 1016 #endif 1017 1018 /** 1019 * @brief NRFX_PRS_BOX_3_ENABLED 1020 * 1021 * Boolean. Accepted values: 0 and 1. 1022 */ 1023 #ifndef NRFX_PRS_BOX_3_ENABLED 1024 #define NRFX_PRS_BOX_3_ENABLED 0 1025 #endif 1026 1027 /** 1028 * @brief NRFX_PRS_BOX_4_ENABLED 1029 * 1030 * Boolean. Accepted values: 0 and 1. 1031 */ 1032 #ifndef NRFX_PRS_BOX_4_ENABLED 1033 #define NRFX_PRS_BOX_4_ENABLED 0 1034 #endif 1035 1036 /** 1037 * @brief NRFX_PRS_BOX_5_ENABLED 1038 * 1039 * Boolean. Accepted values: 0 and 1. 1040 */ 1041 #ifndef NRFX_PRS_BOX_5_ENABLED 1042 #define NRFX_PRS_BOX_5_ENABLED 0 1043 #endif 1044 1045 /** 1046 * @brief NRFX_PRS_BOX_6_ENABLED 1047 * 1048 * Boolean. Accepted values: 0 and 1. 1049 */ 1050 #ifndef NRFX_PRS_BOX_6_ENABLED 1051 #define NRFX_PRS_BOX_6_ENABLED 0 1052 #endif 1053 1054 /** 1055 * @brief NRFX_PRS_BOX_7_ENABLED 1056 * 1057 * Boolean. Accepted values: 0 and 1. 1058 */ 1059 #ifndef NRFX_PRS_BOX_7_ENABLED 1060 #define NRFX_PRS_BOX_7_ENABLED 0 1061 #endif 1062 1063 /** 1064 * @brief NRFX_PRS_BOX_8_ENABLED 1065 * 1066 * Boolean. Accepted values: 0 and 1. 1067 */ 1068 #ifndef NRFX_PRS_BOX_8_ENABLED 1069 #define NRFX_PRS_BOX_8_ENABLED 0 1070 #endif 1071 1072 /** 1073 * @brief NRFX_PRS_BOX_9_ENABLED 1074 * 1075 * Boolean. Accepted values: 0 and 1. 1076 */ 1077 #ifndef NRFX_PRS_BOX_9_ENABLED 1078 #define NRFX_PRS_BOX_9_ENABLED 0 1079 #endif 1080 1081 /** 1082 * @brief NRFX_PWM_ENABLED 1083 * 1084 * Boolean. Accepted values: 0 and 1. 1085 */ 1086 #ifndef NRFX_PWM_ENABLED 1087 #define NRFX_PWM_ENABLED 0 1088 #endif 1089 1090 /** 1091 * @brief NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY 1092 * 1093 * Integer value. Minimum: 0. Maximum: 7. 1094 */ 1095 #ifndef NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY 1096 #define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY 1097 #endif 1098 1099 /** 1100 * @brief NRFX_PWM_CONFIG_LOG_ENABLED 1101 * 1102 * Boolean. Accepted values: 0 and 1. 1103 */ 1104 #ifndef NRFX_PWM_CONFIG_LOG_ENABLED 1105 #define NRFX_PWM_CONFIG_LOG_ENABLED 0 1106 #endif 1107 1108 /** 1109 * @brief NRFX_PWM_CONFIG_LOG_LEVEL 1110 * 1111 * Integer value. 1112 * Supported values: 1113 * - Off = 0 1114 * - Error = 1 1115 * - Warning = 2 1116 * - Info = 3 1117 * - Debug = 4 1118 */ 1119 #ifndef NRFX_PWM_CONFIG_LOG_LEVEL 1120 #define NRFX_PWM_CONFIG_LOG_LEVEL 3 1121 #endif 1122 1123 /** 1124 * @brief NRFX_PWM120_ENABLED 1125 * 1126 * Boolean. Accepted values: 0 and 1. 1127 */ 1128 #ifndef NRFX_PWM120_ENABLED 1129 #define NRFX_PWM120_ENABLED 0 1130 #endif 1131 1132 /** 1133 * @brief NRFX_PWM130_ENABLED 1134 * 1135 * Boolean. Accepted values: 0 and 1. 1136 */ 1137 #ifndef NRFX_PWM130_ENABLED 1138 #define NRFX_PWM130_ENABLED 0 1139 #endif 1140 1141 /** 1142 * @brief NRFX_PWM131_ENABLED 1143 * 1144 * Boolean. Accepted values: 0 and 1. 1145 */ 1146 #ifndef NRFX_PWM131_ENABLED 1147 #define NRFX_PWM131_ENABLED 0 1148 #endif 1149 1150 /** 1151 * @brief NRFX_PWM132_ENABLED 1152 * 1153 * Boolean. Accepted values: 0 and 1. 1154 */ 1155 #ifndef NRFX_PWM132_ENABLED 1156 #define NRFX_PWM132_ENABLED 0 1157 #endif 1158 1159 /** 1160 * @brief NRFX_PWM133_ENABLED 1161 * 1162 * Boolean. Accepted values: 0 and 1. 1163 */ 1164 #ifndef NRFX_PWM133_ENABLED 1165 #define NRFX_PWM133_ENABLED 0 1166 #endif 1167 1168 /** 1169 * @brief NRFX_QDEC_ENABLED 1170 * 1171 * Boolean. Accepted values: 0 and 1. 1172 */ 1173 #ifndef NRFX_QDEC_ENABLED 1174 #define NRFX_QDEC_ENABLED 0 1175 #endif 1176 1177 /** 1178 * @brief NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY 1179 * 1180 * Integer value. Minimum: 0. Maximum: 7. 1181 */ 1182 #ifndef NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY 1183 #define NRFX_QDEC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY 1184 #endif 1185 1186 /** 1187 * @brief NRFX_QDEC_CONFIG_LOG_ENABLED 1188 * 1189 * Boolean. Accepted values: 0 and 1. 1190 */ 1191 #ifndef NRFX_QDEC_CONFIG_LOG_ENABLED 1192 #define NRFX_QDEC_CONFIG_LOG_ENABLED 0 1193 #endif 1194 1195 /** 1196 * @brief NRFX_QDEC_CONFIG_LOG_LEVEL 1197 * 1198 * Integer value. 1199 * Supported values: 1200 * - Off = 0 1201 * - Error = 1 1202 * - Warning = 2 1203 * - Info = 3 1204 * - Debug = 4 1205 */ 1206 #ifndef NRFX_QDEC_CONFIG_LOG_LEVEL 1207 #define NRFX_QDEC_CONFIG_LOG_LEVEL 3 1208 #endif 1209 1210 /** 1211 * @brief NRFX_QDEC130_ENABLED 1212 * 1213 * Boolean. Accepted values: 0 and 1. 1214 */ 1215 #ifndef NRFX_QDEC130_ENABLED 1216 #define NRFX_QDEC130_ENABLED 0 1217 #endif 1218 1219 /** 1220 * @brief NRFX_QDEC131_ENABLED 1221 * 1222 * Boolean. Accepted values: 0 and 1. 1223 */ 1224 #ifndef NRFX_QDEC131_ENABLED 1225 #define NRFX_QDEC131_ENABLED 0 1226 #endif 1227 1228 /** 1229 * @brief NRFX_RTC_ENABLED 1230 * 1231 * Boolean. Accepted values: 0 and 1. 1232 */ 1233 #ifndef NRFX_RTC_ENABLED 1234 #define NRFX_RTC_ENABLED 0 1235 #endif 1236 1237 /** 1238 * @brief NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY 1239 * 1240 * Integer value. Minimum: 0. Maximum: 7. 1241 */ 1242 #ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY 1243 #define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY 1244 #endif 1245 1246 /** 1247 * @brief NRFX_RTC_CONFIG_LOG_ENABLED 1248 * 1249 * Boolean. Accepted values: 0 and 1. 1250 */ 1251 #ifndef NRFX_RTC_CONFIG_LOG_ENABLED 1252 #define NRFX_RTC_CONFIG_LOG_ENABLED 0 1253 #endif 1254 1255 /** 1256 * @brief NRFX_RTC_CONFIG_LOG_LEVEL 1257 * 1258 * Integer value. 1259 * Supported values: 1260 * - Off = 0 1261 * - Error = 1 1262 * - Warning = 2 1263 * - Info = 3 1264 * - Debug = 4 1265 */ 1266 #ifndef NRFX_RTC_CONFIG_LOG_LEVEL 1267 #define NRFX_RTC_CONFIG_LOG_LEVEL 3 1268 #endif 1269 1270 /** 1271 * @brief NRFX_RTC130_ENABLED 1272 * 1273 * Boolean. Accepted values: 0 and 1. 1274 */ 1275 #ifndef NRFX_RTC130_ENABLED 1276 #define NRFX_RTC130_ENABLED 0 1277 #endif 1278 1279 /** 1280 * @brief NRFX_RTC131_ENABLED 1281 * 1282 * Boolean. Accepted values: 0 and 1. 1283 */ 1284 #ifndef NRFX_RTC131_ENABLED 1285 #define NRFX_RTC131_ENABLED 0 1286 #endif 1287 1288 /** 1289 * @brief NRFX_SAADC_ENABLED 1290 * 1291 * Boolean. Accepted values: 0 and 1. 1292 */ 1293 #ifndef NRFX_SAADC_ENABLED 1294 #define NRFX_SAADC_ENABLED 0 1295 #endif 1296 1297 /** 1298 * @brief NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY 1299 * 1300 * Integer value. Minimum: 0. Maximum: 7. 1301 */ 1302 #ifndef NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY 1303 #define NRFX_SAADC_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY 1304 #endif 1305 1306 /** 1307 * @brief NRFX_SAADC_CONFIG_LOG_ENABLED 1308 * 1309 * Boolean. Accepted values: 0 and 1. 1310 */ 1311 #ifndef NRFX_SAADC_CONFIG_LOG_ENABLED 1312 #define NRFX_SAADC_CONFIG_LOG_ENABLED 0 1313 #endif 1314 1315 /** 1316 * @brief NRFX_SAADC_CONFIG_LOG_LEVEL 1317 * 1318 * Integer value. 1319 * Supported values: 1320 * - Off = 0 1321 * - Error = 1 1322 * - Warning = 2 1323 * - Info = 3 1324 * - Debug = 4 1325 */ 1326 #ifndef NRFX_SAADC_CONFIG_LOG_LEVEL 1327 #define NRFX_SAADC_CONFIG_LOG_LEVEL 3 1328 #endif 1329 1330 /** 1331 * @brief NRFX_SPIM_ENABLED 1332 * 1333 * Boolean. Accepted values: 0 and 1. 1334 */ 1335 #ifndef NRFX_SPIM_ENABLED 1336 #define NRFX_SPIM_ENABLED 0 1337 #endif 1338 1339 /** 1340 * @brief NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY 1341 * 1342 * Integer value. Minimum: 0. Maximum: 7. 1343 */ 1344 #ifndef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY 1345 #define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY 1346 #endif 1347 1348 /** 1349 * @brief NRFX_SPIM_CONFIG_LOG_ENABLED 1350 * 1351 * Boolean. Accepted values: 0 and 1. 1352 */ 1353 #ifndef NRFX_SPIM_CONFIG_LOG_ENABLED 1354 #define NRFX_SPIM_CONFIG_LOG_ENABLED 0 1355 #endif 1356 1357 /** 1358 * @brief NRFX_SPIM_CONFIG_LOG_LEVEL 1359 * 1360 * Integer value. 1361 * Supported values: 1362 * - Off = 0 1363 * - Error = 1 1364 * - Warning = 2 1365 * - Info = 3 1366 * - Debug = 4 1367 */ 1368 #ifndef NRFX_SPIM_CONFIG_LOG_LEVEL 1369 #define NRFX_SPIM_CONFIG_LOG_LEVEL 3 1370 #endif 1371 1372 /** 1373 * @brief NRFX_SPIM120_ENABLED 1374 * 1375 * Boolean. Accepted values: 0 and 1. 1376 */ 1377 #ifndef NRFX_SPIM120_ENABLED 1378 #define NRFX_SPIM120_ENABLED 0 1379 #endif 1380 1381 /** 1382 * @brief NRFX_SPIM121_ENABLED 1383 * 1384 * Boolean. Accepted values: 0 and 1. 1385 */ 1386 #ifndef NRFX_SPIM121_ENABLED 1387 #define NRFX_SPIM121_ENABLED 0 1388 #endif 1389 1390 /** 1391 * @brief NRFX_SPIM130_ENABLED 1392 * 1393 * Boolean. Accepted values: 0 and 1. 1394 */ 1395 #ifndef NRFX_SPIM130_ENABLED 1396 #define NRFX_SPIM130_ENABLED 0 1397 #endif 1398 1399 /** 1400 * @brief NRFX_SPIM131_ENABLED 1401 * 1402 * Boolean. Accepted values: 0 and 1. 1403 */ 1404 #ifndef NRFX_SPIM131_ENABLED 1405 #define NRFX_SPIM131_ENABLED 0 1406 #endif 1407 1408 /** 1409 * @brief NRFX_SPIM132_ENABLED 1410 * 1411 * Boolean. Accepted values: 0 and 1. 1412 */ 1413 #ifndef NRFX_SPIM132_ENABLED 1414 #define NRFX_SPIM132_ENABLED 0 1415 #endif 1416 1417 /** 1418 * @brief NRFX_SPIM133_ENABLED 1419 * 1420 * Boolean. Accepted values: 0 and 1. 1421 */ 1422 #ifndef NRFX_SPIM133_ENABLED 1423 #define NRFX_SPIM133_ENABLED 0 1424 #endif 1425 1426 /** 1427 * @brief NRFX_SPIM134_ENABLED 1428 * 1429 * Boolean. Accepted values: 0 and 1. 1430 */ 1431 #ifndef NRFX_SPIM134_ENABLED 1432 #define NRFX_SPIM134_ENABLED 0 1433 #endif 1434 1435 /** 1436 * @brief NRFX_SPIM135_ENABLED 1437 * 1438 * Boolean. Accepted values: 0 and 1. 1439 */ 1440 #ifndef NRFX_SPIM135_ENABLED 1441 #define NRFX_SPIM135_ENABLED 0 1442 #endif 1443 1444 /** 1445 * @brief NRFX_SPIM136_ENABLED 1446 * 1447 * Boolean. Accepted values: 0 and 1. 1448 */ 1449 #ifndef NRFX_SPIM136_ENABLED 1450 #define NRFX_SPIM136_ENABLED 0 1451 #endif 1452 1453 /** 1454 * @brief NRFX_SPIM137_ENABLED 1455 * 1456 * Boolean. Accepted values: 0 and 1. 1457 */ 1458 #ifndef NRFX_SPIM137_ENABLED 1459 #define NRFX_SPIM137_ENABLED 0 1460 #endif 1461 1462 /** 1463 * @brief NRFX_SPIS_ENABLED 1464 * 1465 * Boolean. Accepted values: 0 and 1. 1466 */ 1467 #ifndef NRFX_SPIS_ENABLED 1468 #define NRFX_SPIS_ENABLED 0 1469 #endif 1470 1471 /** 1472 * @brief NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 1473 * 1474 * Integer value. Minimum: 0. Maximum: 7. 1475 */ 1476 #ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 1477 #define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY 1478 #endif 1479 1480 /** 1481 * @brief NRFX_SPIS_CONFIG_LOG_ENABLED 1482 * 1483 * Boolean. Accepted values: 0 and 1. 1484 */ 1485 #ifndef NRFX_SPIS_CONFIG_LOG_ENABLED 1486 #define NRFX_SPIS_CONFIG_LOG_ENABLED 0 1487 #endif 1488 1489 /** 1490 * @brief NRFX_SPIS_CONFIG_LOG_LEVEL 1491 * 1492 * Integer value. 1493 * Supported values: 1494 * - Off = 0 1495 * - Error = 1 1496 * - Warning = 2 1497 * - Info = 3 1498 * - Debug = 4 1499 */ 1500 #ifndef NRFX_SPIS_CONFIG_LOG_LEVEL 1501 #define NRFX_SPIS_CONFIG_LOG_LEVEL 3 1502 #endif 1503 1504 /** 1505 * @brief NRFX_SPIS120_ENABLED 1506 * 1507 * Boolean. Accepted values: 0 and 1. 1508 */ 1509 #ifndef NRFX_SPIS120_ENABLED 1510 #define NRFX_SPIS120_ENABLED 0 1511 #endif 1512 1513 /** 1514 * @brief NRFX_SPIS130_ENABLED 1515 * 1516 * Boolean. Accepted values: 0 and 1. 1517 */ 1518 #ifndef NRFX_SPIS130_ENABLED 1519 #define NRFX_SPIS130_ENABLED 0 1520 #endif 1521 1522 /** 1523 * @brief NRFX_SPIS131_ENABLED 1524 * 1525 * Boolean. Accepted values: 0 and 1. 1526 */ 1527 #ifndef NRFX_SPIS131_ENABLED 1528 #define NRFX_SPIS131_ENABLED 0 1529 #endif 1530 1531 /** 1532 * @brief NRFX_SPIS132_ENABLED 1533 * 1534 * Boolean. Accepted values: 0 and 1. 1535 */ 1536 #ifndef NRFX_SPIS132_ENABLED 1537 #define NRFX_SPIS132_ENABLED 0 1538 #endif 1539 1540 /** 1541 * @brief NRFX_SPIS133_ENABLED 1542 * 1543 * Boolean. Accepted values: 0 and 1. 1544 */ 1545 #ifndef NRFX_SPIS133_ENABLED 1546 #define NRFX_SPIS133_ENABLED 0 1547 #endif 1548 1549 /** 1550 * @brief NRFX_SPIS134_ENABLED 1551 * 1552 * Boolean. Accepted values: 0 and 1. 1553 */ 1554 #ifndef NRFX_SPIS134_ENABLED 1555 #define NRFX_SPIS134_ENABLED 0 1556 #endif 1557 1558 /** 1559 * @brief NRFX_SPIS135_ENABLED 1560 * 1561 * Boolean. Accepted values: 0 and 1. 1562 */ 1563 #ifndef NRFX_SPIS135_ENABLED 1564 #define NRFX_SPIS135_ENABLED 0 1565 #endif 1566 1567 /** 1568 * @brief NRFX_SPIS136_ENABLED 1569 * 1570 * Boolean. Accepted values: 0 and 1. 1571 */ 1572 #ifndef NRFX_SPIS136_ENABLED 1573 #define NRFX_SPIS136_ENABLED 0 1574 #endif 1575 1576 /** 1577 * @brief NRFX_SPIS137_ENABLED 1578 * 1579 * Boolean. Accepted values: 0 and 1. 1580 */ 1581 #ifndef NRFX_SPIS137_ENABLED 1582 #define NRFX_SPIS137_ENABLED 0 1583 #endif 1584 1585 /** 1586 * @brief NRFX_SYSTICK_ENABLED 1587 * 1588 * Boolean. Accepted values: 0 and 1. 1589 */ 1590 #ifndef NRFX_SYSTICK_ENABLED 1591 #define NRFX_SYSTICK_ENABLED 0 1592 #endif 1593 1594 /** 1595 * @brief NRFX_TEMP_ENABLED 1596 * 1597 * Boolean. Accepted values: 0 and 1. 1598 */ 1599 #ifndef NRFX_TEMP_ENABLED 1600 #define NRFX_TEMP_ENABLED 0 1601 #endif 1602 1603 /** 1604 * @brief NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY 1605 * 1606 * Integer value. Minimum: 0. Maximum: 7. 1607 */ 1608 #ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY 1609 #define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY 1610 #endif 1611 1612 /** 1613 * @brief NRFX_TEMP_CONFIG_LOG_ENABLED 1614 * 1615 * Boolean. Accepted values: 0 and 1. 1616 */ 1617 #ifndef NRFX_TEMP_CONFIG_LOG_ENABLED 1618 #define NRFX_TEMP_CONFIG_LOG_ENABLED 0 1619 #endif 1620 1621 /** 1622 * @brief NRFX_TEMP_CONFIG_LOG_LEVEL 1623 * 1624 * Integer value. 1625 * Supported values: 1626 * - Off = 0 1627 * - Error = 1 1628 * - Warning = 2 1629 * - Info = 3 1630 * - Debug = 4 1631 */ 1632 #ifndef NRFX_TEMP_CONFIG_LOG_LEVEL 1633 #define NRFX_TEMP_CONFIG_LOG_LEVEL 3 1634 #endif 1635 1636 /** 1637 * @brief NRFX_TIMER_ENABLED 1638 * 1639 * Boolean. Accepted values: 0 and 1. 1640 */ 1641 #ifndef NRFX_TIMER_ENABLED 1642 #define NRFX_TIMER_ENABLED 0 1643 #endif 1644 1645 /** 1646 * @brief NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 1647 * 1648 * Integer value. Minimum: 0. Maximum: 7. 1649 */ 1650 #ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 1651 #define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY 1652 #endif 1653 1654 /** 1655 * @brief NRFX_TIMER_CONFIG_LOG_ENABLED 1656 * 1657 * Boolean. Accepted values: 0 and 1. 1658 */ 1659 #ifndef NRFX_TIMER_CONFIG_LOG_ENABLED 1660 #define NRFX_TIMER_CONFIG_LOG_ENABLED 0 1661 #endif 1662 1663 /** 1664 * @brief NRFX_TIMER_CONFIG_LOG_LEVEL 1665 * 1666 * Integer value. 1667 * Supported values: 1668 * - Off = 0 1669 * - Error = 1 1670 * - Warning = 2 1671 * - Info = 3 1672 * - Debug = 4 1673 */ 1674 #ifndef NRFX_TIMER_CONFIG_LOG_LEVEL 1675 #define NRFX_TIMER_CONFIG_LOG_LEVEL 3 1676 #endif 1677 1678 /** 1679 * @brief NRFX_TIMER020_ENABLED 1680 * 1681 * Boolean. Accepted values: 0 and 1. 1682 */ 1683 #ifndef NRFX_TIMER020_ENABLED 1684 #define NRFX_TIMER020_ENABLED 0 1685 #endif 1686 1687 /** 1688 * @brief NRFX_TIMER021_ENABLED 1689 * 1690 * Boolean. Accepted values: 0 and 1. 1691 */ 1692 #ifndef NRFX_TIMER021_ENABLED 1693 #define NRFX_TIMER021_ENABLED 0 1694 #endif 1695 1696 /** 1697 * @brief NRFX_TIMER022_ENABLED 1698 * 1699 * Boolean. Accepted values: 0 and 1. 1700 */ 1701 #ifndef NRFX_TIMER022_ENABLED 1702 #define NRFX_TIMER022_ENABLED 0 1703 #endif 1704 1705 /** 1706 * @brief NRFX_TIMER120_ENABLED 1707 * 1708 * Boolean. Accepted values: 0 and 1. 1709 */ 1710 #ifndef NRFX_TIMER120_ENABLED 1711 #define NRFX_TIMER120_ENABLED 0 1712 #endif 1713 1714 /** 1715 * @brief NRFX_TIMER121_ENABLED 1716 * 1717 * Boolean. Accepted values: 0 and 1. 1718 */ 1719 #ifndef NRFX_TIMER121_ENABLED 1720 #define NRFX_TIMER121_ENABLED 0 1721 #endif 1722 1723 /** 1724 * @brief NRFX_TIMER130_ENABLED 1725 * 1726 * Boolean. Accepted values: 0 and 1. 1727 */ 1728 #ifndef NRFX_TIMER130_ENABLED 1729 #define NRFX_TIMER130_ENABLED 0 1730 #endif 1731 1732 /** 1733 * @brief NRFX_TIMER131_ENABLED 1734 * 1735 * Boolean. Accepted values: 0 and 1. 1736 */ 1737 #ifndef NRFX_TIMER131_ENABLED 1738 #define NRFX_TIMER131_ENABLED 0 1739 #endif 1740 1741 /** 1742 * @brief NRFX_TIMER132_ENABLED 1743 * 1744 * Boolean. Accepted values: 0 and 1. 1745 */ 1746 #ifndef NRFX_TIMER132_ENABLED 1747 #define NRFX_TIMER132_ENABLED 0 1748 #endif 1749 1750 /** 1751 * @brief NRFX_TIMER133_ENABLED 1752 * 1753 * Boolean. Accepted values: 0 and 1. 1754 */ 1755 #ifndef NRFX_TIMER133_ENABLED 1756 #define NRFX_TIMER133_ENABLED 0 1757 #endif 1758 1759 /** 1760 * @brief NRFX_TIMER134_ENABLED 1761 * 1762 * Boolean. Accepted values: 0 and 1. 1763 */ 1764 #ifndef NRFX_TIMER134_ENABLED 1765 #define NRFX_TIMER134_ENABLED 0 1766 #endif 1767 1768 /** 1769 * @brief NRFX_TIMER135_ENABLED 1770 * 1771 * Boolean. Accepted values: 0 and 1. 1772 */ 1773 #ifndef NRFX_TIMER135_ENABLED 1774 #define NRFX_TIMER135_ENABLED 0 1775 #endif 1776 1777 /** 1778 * @brief NRFX_TIMER136_ENABLED 1779 * 1780 * Boolean. Accepted values: 0 and 1. 1781 */ 1782 #ifndef NRFX_TIMER136_ENABLED 1783 #define NRFX_TIMER136_ENABLED 0 1784 #endif 1785 1786 /** 1787 * @brief NRFX_TIMER137_ENABLED 1788 * 1789 * Boolean. Accepted values: 0 and 1. 1790 */ 1791 #ifndef NRFX_TIMER137_ENABLED 1792 #define NRFX_TIMER137_ENABLED 0 1793 #endif 1794 1795 /** 1796 * @brief NRFX_TWIM_ENABLED 1797 * 1798 * Boolean. Accepted values: 0 and 1. 1799 */ 1800 #ifndef NRFX_TWIM_ENABLED 1801 #define NRFX_TWIM_ENABLED 0 1802 #endif 1803 1804 /** 1805 * @brief NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY 1806 * 1807 * Integer value. Minimum: 0. Maximum: 7. 1808 */ 1809 #ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY 1810 #define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY 1811 #endif 1812 1813 /** 1814 * @brief NRFX_TWIM_CONFIG_LOG_ENABLED 1815 * 1816 * Boolean. Accepted values: 0 and 1. 1817 */ 1818 #ifndef NRFX_TWIM_CONFIG_LOG_ENABLED 1819 #define NRFX_TWIM_CONFIG_LOG_ENABLED 0 1820 #endif 1821 1822 /** 1823 * @brief NRFX_TWIM_CONFIG_LOG_LEVEL 1824 * 1825 * Integer value. 1826 * Supported values: 1827 * - Off = 0 1828 * - Error = 1 1829 * - Warning = 2 1830 * - Info = 3 1831 * - Debug = 4 1832 */ 1833 #ifndef NRFX_TWIM_CONFIG_LOG_LEVEL 1834 #define NRFX_TWIM_CONFIG_LOG_LEVEL 3 1835 #endif 1836 1837 /** 1838 * @brief NRFX_TWIM130_ENABLED 1839 * 1840 * Boolean. Accepted values: 0 and 1. 1841 */ 1842 #ifndef NRFX_TWIM130_ENABLED 1843 #define NRFX_TWIM130_ENABLED 0 1844 #endif 1845 1846 /** 1847 * @brief NRFX_TWIM131_ENABLED 1848 * 1849 * Boolean. Accepted values: 0 and 1. 1850 */ 1851 #ifndef NRFX_TWIM131_ENABLED 1852 #define NRFX_TWIM131_ENABLED 0 1853 #endif 1854 1855 /** 1856 * @brief NRFX_TWIM132_ENABLED 1857 * 1858 * Boolean. Accepted values: 0 and 1. 1859 */ 1860 #ifndef NRFX_TWIM132_ENABLED 1861 #define NRFX_TWIM132_ENABLED 0 1862 #endif 1863 1864 /** 1865 * @brief NRFX_TWIM133_ENABLED 1866 * 1867 * Boolean. Accepted values: 0 and 1. 1868 */ 1869 #ifndef NRFX_TWIM133_ENABLED 1870 #define NRFX_TWIM133_ENABLED 0 1871 #endif 1872 1873 /** 1874 * @brief NRFX_TWIM134_ENABLED 1875 * 1876 * Boolean. Accepted values: 0 and 1. 1877 */ 1878 #ifndef NRFX_TWIM134_ENABLED 1879 #define NRFX_TWIM134_ENABLED 0 1880 #endif 1881 1882 /** 1883 * @brief NRFX_TWIM135_ENABLED 1884 * 1885 * Boolean. Accepted values: 0 and 1. 1886 */ 1887 #ifndef NRFX_TWIM135_ENABLED 1888 #define NRFX_TWIM135_ENABLED 0 1889 #endif 1890 1891 /** 1892 * @brief NRFX_TWIM136_ENABLED 1893 * 1894 * Boolean. Accepted values: 0 and 1. 1895 */ 1896 #ifndef NRFX_TWIM136_ENABLED 1897 #define NRFX_TWIM136_ENABLED 0 1898 #endif 1899 1900 /** 1901 * @brief NRFX_TWIM137_ENABLED 1902 * 1903 * Boolean. Accepted values: 0 and 1. 1904 */ 1905 #ifndef NRFX_TWIM137_ENABLED 1906 #define NRFX_TWIM137_ENABLED 0 1907 #endif 1908 1909 /** 1910 * @brief NRFX_TWIS_ENABLED 1911 * 1912 * Boolean. Accepted values: 0 and 1. 1913 */ 1914 #ifndef NRFX_TWIS_ENABLED 1915 #define NRFX_TWIS_ENABLED 0 1916 #endif 1917 1918 /** 1919 * @brief NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 1920 * 1921 * Integer value. Minimum: 0. Maximum: 7. 1922 */ 1923 #ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 1924 #define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY 1925 #endif 1926 1927 /** 1928 * @brief NRFX_TWIS_CONFIG_LOG_ENABLED 1929 * 1930 * Boolean. Accepted values: 0 and 1. 1931 */ 1932 #ifndef NRFX_TWIS_CONFIG_LOG_ENABLED 1933 #define NRFX_TWIS_CONFIG_LOG_ENABLED 0 1934 #endif 1935 1936 /** 1937 * @brief NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once. 1938 * 1939 * Boolean. Accepted values: 0 and 1. 1940 */ 1941 #ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 1942 #define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 1943 #endif 1944 1945 /** 1946 * @brief NRFX_TWIS_NO_SYNC_MODE - Remove support for synchronous mode. 1947 * 1948 * Boolean. Accepted values: 0 and 1. 1949 */ 1950 #ifndef NRFX_TWIS_NO_SYNC_MODE 1951 #define NRFX_TWIS_NO_SYNC_MODE 0 1952 #endif 1953 1954 /** 1955 * @brief NRFX_TWIS_CONFIG_LOG_LEVEL 1956 * 1957 * Integer value. 1958 * Supported values: 1959 * - Off = 0 1960 * - Error = 1 1961 * - Warning = 2 1962 * - Info = 3 1963 * - Debug = 4 1964 */ 1965 #ifndef NRFX_TWIS_CONFIG_LOG_LEVEL 1966 #define NRFX_TWIS_CONFIG_LOG_LEVEL 3 1967 #endif 1968 1969 /** 1970 * @brief NRFX_TWIS130_ENABLED 1971 * 1972 * Boolean. Accepted values: 0 and 1. 1973 */ 1974 #ifndef NRFX_TWIS130_ENABLED 1975 #define NRFX_TWIS130_ENABLED 0 1976 #endif 1977 1978 /** 1979 * @brief NRFX_TWIS131_ENABLED 1980 * 1981 * Boolean. Accepted values: 0 and 1. 1982 */ 1983 #ifndef NRFX_TWIS131_ENABLED 1984 #define NRFX_TWIS131_ENABLED 0 1985 #endif 1986 1987 /** 1988 * @brief NRFX_TWIS132_ENABLED 1989 * 1990 * Boolean. Accepted values: 0 and 1. 1991 */ 1992 #ifndef NRFX_TWIS132_ENABLED 1993 #define NRFX_TWIS132_ENABLED 0 1994 #endif 1995 1996 /** 1997 * @brief NRFX_TWIS133_ENABLED 1998 * 1999 * Boolean. Accepted values: 0 and 1. 2000 */ 2001 #ifndef NRFX_TWIS133_ENABLED 2002 #define NRFX_TWIS133_ENABLED 0 2003 #endif 2004 2005 /** 2006 * @brief NRFX_TWIS134_ENABLED 2007 * 2008 * Boolean. Accepted values: 0 and 1. 2009 */ 2010 #ifndef NRFX_TWIS134_ENABLED 2011 #define NRFX_TWIS134_ENABLED 0 2012 #endif 2013 2014 /** 2015 * @brief NRFX_TWIS135_ENABLED 2016 * 2017 * Boolean. Accepted values: 0 and 1. 2018 */ 2019 #ifndef NRFX_TWIS135_ENABLED 2020 #define NRFX_TWIS135_ENABLED 0 2021 #endif 2022 2023 /** 2024 * @brief NRFX_TWIS136_ENABLED 2025 * 2026 * Boolean. Accepted values: 0 and 1. 2027 */ 2028 #ifndef NRFX_TWIS136_ENABLED 2029 #define NRFX_TWIS136_ENABLED 0 2030 #endif 2031 2032 /** 2033 * @brief NRFX_TWIS137_ENABLED 2034 * 2035 * Boolean. Accepted values: 0 and 1. 2036 */ 2037 #ifndef NRFX_TWIS137_ENABLED 2038 #define NRFX_TWIS137_ENABLED 0 2039 #endif 2040 2041 /** 2042 * @brief NRFX_UARTE_ENABLED 2043 * 2044 * Boolean. Accepted values: 0 and 1. 2045 */ 2046 #ifndef NRFX_UARTE_ENABLED 2047 #define NRFX_UARTE_ENABLED 0 2048 #endif 2049 2050 /** 2051 * @brief NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG - If enabled, support for configuring GPIO pins is removed from the driver 2052 * 2053 * Boolean. Accepted values: 0 and 1. 2054 */ 2055 #ifndef NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG 2056 #define NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG 0 2057 #endif 2058 2059 /** 2060 * @brief NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG - If enabled, support for configuring PSEL registers is removed from the driver 2061 * 2062 * Boolean. Accepted values: 0 and 1. 2063 */ 2064 #ifndef NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG 2065 #define NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG 0 2066 #endif 2067 2068 /** 2069 * @brief NRFX_UARTE_CONFIG_TX_LINK - If enabled, driver supports linking of TX transfers. 2070 * 2071 * Boolean. Accepted values: 0 and 1. 2072 */ 2073 #ifndef NRFX_UARTE_CONFIG_TX_LINK 2074 #define NRFX_UARTE_CONFIG_TX_LINK 1 2075 #endif 2076 2077 /** 2078 * @brief NRFX_UARTE_CONFIG_RX_CACHE_ENABLED 2079 * 2080 * Boolean. Accepted values: 0 and 1. 2081 */ 2082 #ifndef NRFX_UARTE_CONFIG_RX_CACHE_ENABLED 2083 #define NRFX_UARTE_CONFIG_RX_CACHE_ENABLED 1 2084 #endif 2085 2086 /** 2087 * @brief NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY 2088 * 2089 * Integer value. Minimum: 0. Maximum: 7. 2090 */ 2091 #ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY 2092 #define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY 2093 #endif 2094 2095 /** 2096 * @brief NRFX_UARTE_CONFIG_LOG_ENABLED 2097 * 2098 * Boolean. Accepted values: 0 and 1. 2099 */ 2100 #ifndef NRFX_UARTE_CONFIG_LOG_ENABLED 2101 #define NRFX_UARTE_CONFIG_LOG_ENABLED 0 2102 #endif 2103 2104 /** 2105 * @brief NRFX_UARTE_CONFIG_LOG_LEVEL 2106 * 2107 * Integer value. 2108 * Supported values: 2109 * - Off = 0 2110 * - Error = 1 2111 * - Warning = 2 2112 * - Info = 3 2113 * - Debug = 4 2114 */ 2115 #ifndef NRFX_UARTE_CONFIG_LOG_LEVEL 2116 #define NRFX_UARTE_CONFIG_LOG_LEVEL 3 2117 #endif 2118 2119 /** 2120 * @brief NRFX_UARTE120_ENABLED 2121 * 2122 * Boolean. Accepted values: 0 and 1. 2123 */ 2124 #ifndef NRFX_UARTE120_ENABLED 2125 #define NRFX_UARTE120_ENABLED 0 2126 #endif 2127 2128 /** 2129 * @brief NRFX_UARTE130_ENABLED 2130 * 2131 * Boolean. Accepted values: 0 and 1. 2132 */ 2133 #ifndef NRFX_UARTE130_ENABLED 2134 #define NRFX_UARTE130_ENABLED 0 2135 #endif 2136 2137 /** 2138 * @brief NRFX_UARTE131_ENABLED 2139 * 2140 * Boolean. Accepted values: 0 and 1. 2141 */ 2142 #ifndef NRFX_UARTE131_ENABLED 2143 #define NRFX_UARTE131_ENABLED 0 2144 #endif 2145 2146 /** 2147 * @brief NRFX_UARTE132_ENABLED 2148 * 2149 * Boolean. Accepted values: 0 and 1. 2150 */ 2151 #ifndef NRFX_UARTE132_ENABLED 2152 #define NRFX_UARTE132_ENABLED 0 2153 #endif 2154 2155 /** 2156 * @brief NRFX_UARTE133_ENABLED 2157 * 2158 * Boolean. Accepted values: 0 and 1. 2159 */ 2160 #ifndef NRFX_UARTE133_ENABLED 2161 #define NRFX_UARTE133_ENABLED 0 2162 #endif 2163 2164 /** 2165 * @brief NRFX_UARTE134_ENABLED 2166 * 2167 * Boolean. Accepted values: 0 and 1. 2168 */ 2169 #ifndef NRFX_UARTE134_ENABLED 2170 #define NRFX_UARTE134_ENABLED 0 2171 #endif 2172 2173 /** 2174 * @brief NRFX_UARTE135_ENABLED 2175 * 2176 * Boolean. Accepted values: 0 and 1. 2177 */ 2178 #ifndef NRFX_UARTE135_ENABLED 2179 #define NRFX_UARTE135_ENABLED 0 2180 #endif 2181 2182 /** 2183 * @brief NRFX_UARTE136_ENABLED 2184 * 2185 * Boolean. Accepted values: 0 and 1. 2186 */ 2187 #ifndef NRFX_UARTE136_ENABLED 2188 #define NRFX_UARTE136_ENABLED 0 2189 #endif 2190 2191 /** 2192 * @brief NRFX_UARTE137_ENABLED 2193 * 2194 * Boolean. Accepted values: 0 and 1. 2195 */ 2196 #ifndef NRFX_UARTE137_ENABLED 2197 #define NRFX_UARTE137_ENABLED 0 2198 #endif 2199 2200 /** 2201 * @brief NRFX_WDT_ENABLED 2202 * 2203 * Boolean. Accepted values: 0 and 1. 2204 */ 2205 #ifndef NRFX_WDT_ENABLED 2206 #define NRFX_WDT_ENABLED 0 2207 #endif 2208 2209 /** 2210 * @brief NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY 2211 * 2212 * Integer value. Minimum: 0. Maximum: 7. 2213 */ 2214 #ifndef NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY 2215 #define NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY NRFX_DEFAULT_IRQ_PRIORITY 2216 #endif 2217 2218 /** 2219 * @brief NRFX_WDT_CONFIG_NO_IRQ - Remove WDT IRQ handling from WDT driver 2220 * 2221 * Boolean. Accepted values: 0 and 1. 2222 */ 2223 #ifndef NRFX_WDT_CONFIG_NO_IRQ 2224 #define NRFX_WDT_CONFIG_NO_IRQ 0 2225 #endif 2226 2227 /** 2228 * @brief NRFX_WDT_CONFIG_LOG_ENABLED 2229 * 2230 * Boolean. Accepted values: 0 and 1. 2231 */ 2232 #ifndef NRFX_WDT_CONFIG_LOG_ENABLED 2233 #define NRFX_WDT_CONFIG_LOG_ENABLED 0 2234 #endif 2235 2236 /** 2237 * @brief NRFX_WDT_CONFIG_LOG_LEVEL 2238 * 2239 * Integer value. 2240 * Supported values: 2241 * - Off = 0 2242 * - Error = 1 2243 * - Warning = 2 2244 * - Info = 3 2245 * - Debug = 4 2246 */ 2247 #ifndef NRFX_WDT_CONFIG_LOG_LEVEL 2248 #define NRFX_WDT_CONFIG_LOG_LEVEL 3 2249 #endif 2250 2251 /** 2252 * @brief NRFX_WDT010_ENABLED 2253 * 2254 * Boolean. Accepted values: 0 and 1. 2255 */ 2256 #ifndef NRFX_WDT010_ENABLED 2257 #define NRFX_WDT010_ENABLED 0 2258 #endif 2259 2260 /** 2261 * @brief NRFX_WDT011_ENABLED 2262 * 2263 * Boolean. Accepted values: 0 and 1. 2264 */ 2265 #ifndef NRFX_WDT011_ENABLED 2266 #define NRFX_WDT011_ENABLED 0 2267 #endif 2268 2269 /** 2270 * @brief NRFX_WDT131_ENABLED 2271 * 2272 * Boolean. Accepted values: 0 and 1. 2273 */ 2274 #ifndef NRFX_WDT131_ENABLED 2275 #define NRFX_WDT131_ENABLED 0 2276 #endif 2277 2278 /** 2279 * @brief NRFX_WDT132_ENABLED 2280 * 2281 * Boolean. Accepted values: 0 and 1. 2282 */ 2283 #ifndef NRFX_WDT132_ENABLED 2284 #define NRFX_WDT132_ENABLED 0 2285 #endif 2286 2287 #endif // NRFX_CONFIG_NRF9230_ENGB_RADIOCORE_H__ 2288
