1 /*
2 * Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice, this
11 * list of conditions and the following disclaimer.
12 *
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * 3. Neither the name of the copyright holder nor the names of its
18 * contributors may be used to endorse or promote products derived from this
19 * software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #ifndef NRF_SAADC_H_
35 #define NRF_SAADC_H_
36
37 #include <nrfx.h>
38
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42
43 /**
44 * @defgroup nrf_saadc_hal SAADC HAL
45 * @{
46 * @ingroup nrf_saadc
47 * @brief Hardware access layer for managing the SAADC peripheral.
48 */
49
50 /** @brief Symbol specifying the offset of interrupt bitmask for limits of all channels. */
51 #define NRF_SAADC_LIMITS_INT_OFFSET \
52 NRFX_MIN(SAADC_INTENSET_CH0LIMITH_Pos, SAADC_INTENSET_CH0LIMITL_Pos)
53
54 /** @brief Symbol specifying the interrupt bitmask for limits of all channels. */
55 #define NRF_SAADC_ALL_CHANNELS_LIMITS_INT_MASK \
56 ((uint32_t)(((1 << SAADC_CH_NUM) - 1) << NRF_SAADC_LIMITS_INT_OFFSET))
57
58 #if defined(SAADC_CH_CONFIG_TACQ_3us) || defined(__NRFX_DOXYGEN__)
59 /** @brief Symbol indicating whether the configuration of acquisition time using predefined values is present. */
60 #define NRF_SAADC_HAS_ACQTIME_ENUM 1
61 #else
62 #define NRF_SAADC_HAS_ACQTIME_ENUM 0
63 #endif
64
65 #if defined(SAADC_CH_CONFIG_TCONV_Msk) || defined(__NRFX_DOXYGEN__)
66 /** @brief Symbol indicating whether the configuration of conversion time is present. */
67 #define NRF_SAADC_HAS_CONVTIME 1
68 #else
69 #define NRF_SAADC_HAS_CONVTIME 0
70 #endif
71
72 #if defined(SAADC_TRIM_LINCALCOEFF_VAL_Msk) || defined(__NRFX_DOXYGEN__)
73 /** @brief Symbol indicating whether the configuration of linearity calibration coefficients is present. */
74 #define NRF_SAADC_HAS_LIN_CAL 1
75 #else
76 #define NRF_SAADC_HAS_LIN_CAL 0
77 #endif
78
79 #if defined(SAADC_CH_PSELP_PIN_Msk) || defined(__NRFX_DOXYGEN__)
80 /** @brief Symbol indicating whether configuration of analog input using pin number is present. */
81 #define NRF_SAADC_HAS_AIN_AS_PIN 1
82 #else
83 #define NRF_SAADC_HAS_AIN_AS_PIN 0
84 #endif
85
86 #if defined(SAADC_DMA_PTR_PTR_Msk) || defined(__NRFX_DOXYGEN__)
87 /** @brief Symbol indicating whether dedicated DMA register is present. */
88 #define NRF_SAADC_HAS_DMA_REG 1
89 #else
90 #define NRF_SAADC_HAS_DMA_REG 0
91 #endif
92
93 #if defined(SAADC_EVENTS_DMA_END_END_Msk) || defined(__NRFX_DOXYGEN__)
94 /** @brief Symbol indicating whether SAADC DMA events are present. */
95 #define NRF_SAADC_HAS_DMA_EVENTS 1
96 #else
97 #define NRF_SAADC_HAS_DMA_EVENTS 0
98 #endif
99
100 #if defined(SAADC_CH_CONFIG_RESP_Msk) || defined(__NRFX_DOXYGEN__)
101 /** @brief Symbol indicating whether SAADC channel resistor control is present. */
102 #define NRF_SAADC_HAS_CH_CONFIG_RES 1
103 #else
104 #define NRF_SAADC_HAS_CH_CONFIG_RES 0
105 #endif
106
107 #if !NRF_SAADC_HAS_ACQTIME_ENUM
108 /** @brief Maximum value of acquire time. */
109 #define NRF_SAADC_ACQTIME_MAX SAADC_CH_CONFIG_TACQ_Max
110 #endif
111
112 #if NRF_SAADC_HAS_CONVTIME
113 /** @brief Symbol specifying maximum value of conversion time. */
114 #define NRF_SAADC_CONVTIME_MAX SAADC_CH_CONFIG_TCONV_Max
115 #endif
116
117 #if NRF_SAADC_HAS_LIN_CAL
118 /** @brief Symbol specifying maximum count of linearity calibration coefficients. */
119 #define NRF_SAADC_LIN_CAL_MAX_COUNT SAADC_TRIM_LINCALCOEFF_MaxCount
120
121 /** @brief Symbol specifying maximum value of linearity calibration coefficient. */
122 #define NRF_SAADC_LIN_CAL_MAX SAADC_TRIM_LINCALCOEFF_VAL_Max
123 #endif
124
125 #if defined(NRF54H_SERIES) || defined(NRF54L_SERIES) || defined(__NRFX_DOXYGEN__)
126 /** @brief Symbol specifying width of the 8-bit sample in bits. */
127 #define NRF_SAADC_8BIT_SAMPLE_WIDTH 8
128 #else
129 #define NRF_SAADC_8BIT_SAMPLE_WIDTH 16
130 #endif
131
132 /** @brief Resolution of the analog-to-digital converter. */
133 typedef enum
134 {
135 NRF_SAADC_RESOLUTION_8BIT = SAADC_RESOLUTION_VAL_8bit, ///< 8 bit resolution.
136 NRF_SAADC_RESOLUTION_10BIT = SAADC_RESOLUTION_VAL_10bit, ///< 10 bit resolution.
137 NRF_SAADC_RESOLUTION_12BIT = SAADC_RESOLUTION_VAL_12bit, ///< 12 bit resolution.
138 NRF_SAADC_RESOLUTION_14BIT = SAADC_RESOLUTION_VAL_14bit ///< 14 bit resolution.
139 } nrf_saadc_resolution_t;
140
141 #if NRF_SAADC_HAS_AIN_AS_PIN
142 /** @brief Analog input type. */
143 typedef uint32_t nrf_saadc_input_t;
144
145 /** @brief Symbol specifying disconnected analog input. */
146 #define NRF_SAADC_INPUT_DISABLED ((nrf_saadc_input_t)UINT32_MAX)
147 #else
148 /** @brief Input selection for the analog-to-digital converter. */
149 typedef enum
150 {
151 NRF_SAADC_INPUT_DISABLED = SAADC_CH_PSELP_PSELP_NC, ///< Not connected.
152 NRF_SAADC_INPUT_AIN0 = SAADC_CH_PSELP_PSELP_AnalogInput0, ///< Analog input 0 (AIN0).
153 NRF_SAADC_INPUT_AIN1 = SAADC_CH_PSELP_PSELP_AnalogInput1, ///< Analog input 1 (AIN1).
154 NRF_SAADC_INPUT_AIN2 = SAADC_CH_PSELP_PSELP_AnalogInput2, ///< Analog input 2 (AIN2).
155 NRF_SAADC_INPUT_AIN3 = SAADC_CH_PSELP_PSELP_AnalogInput3, ///< Analog input 3 (AIN3).
156 NRF_SAADC_INPUT_AIN4 = SAADC_CH_PSELP_PSELP_AnalogInput4, ///< Analog input 4 (AIN4).
157 NRF_SAADC_INPUT_AIN5 = SAADC_CH_PSELP_PSELP_AnalogInput5, ///< Analog input 5 (AIN5).
158 NRF_SAADC_INPUT_AIN6 = SAADC_CH_PSELP_PSELP_AnalogInput6, ///< Analog input 6 (AIN6).
159 NRF_SAADC_INPUT_AIN7 = SAADC_CH_PSELP_PSELP_AnalogInput7, ///< Analog input 7 (AIN7).
160 #if defined(SAADC_CH_PSELP_PSELP_VDD) || defined(__NRFX_DOXYGEN__)
161 NRF_SAADC_INPUT_VDD = SAADC_CH_PSELP_PSELP_VDD, ///< VDD as input.
162 #endif
163 #if defined(SAADC_CH_PSELP_PSELP_VDDHDIV5) || defined(__NRFX_DOXYGEN__)
164 NRF_SAADC_INPUT_VDDHDIV5 = SAADC_CH_PSELP_PSELP_VDDHDIV5 ///< VDDH/5 as input.
165 #endif
166 #if defined(SAADC_CH_PSELP_PSELP_AnalogInput8) || defined(__NRFX_DOXYGEN__)
167 NRF_SAADC_INPUT_AIN8 = SAADC_CH_PSELP_PSELP_AnalogInput8, ///< Analog input 8 (AIN8).
168 #endif
169 #if defined(SAADC_CH_PSELP_PSELP_AnalogInput9) || defined(__NRFX_DOXYGEN__)
170 NRF_SAADC_INPUT_AIN9 = SAADC_CH_PSELP_PSELP_AnalogInput9, ///< Analog input 9 (AIN9).
171 #endif
172 #if defined(SAADC_CH_PSELP_PSELP_AnalogInput10) || defined(__NRFX_DOXYGEN__)
173 NRF_SAADC_INPUT_AIN10 = SAADC_CH_PSELP_PSELP_AnalogInput10, ///< Analog input 10 (AIN10).
174 #endif
175 #if defined(SAADC_CH_PSELP_PSELP_AnalogInput11) || defined(__NRFX_DOXYGEN__)
176 NRF_SAADC_INPUT_AIN11 = SAADC_CH_PSELP_PSELP_AnalogInput11, ///< Analog input 11 (AIN11).
177 #endif
178 #if defined(SAADC_CH_PSELP_PSELP_AnalogInput12) || defined(__NRFX_DOXYGEN__)
179 NRF_SAADC_INPUT_AIN12 = SAADC_CH_PSELP_PSELP_AnalogInput12, ///< Analog input 12 (AIN12).
180 #endif
181 #if defined(SAADC_CH_PSELP_PSELP_AnalogInput13) || defined(__NRFX_DOXYGEN__)
182 NRF_SAADC_INPUT_AIN13 = SAADC_CH_PSELP_PSELP_AnalogInput13, ///< Analog input 13 (AIN13).
183 #endif
184 } nrf_saadc_input_t;
185 #endif
186
187 /** @brief Analog-to-digital converter oversampling mode. */
188 typedef enum
189 {
190 NRF_SAADC_OVERSAMPLE_DISABLED = SAADC_OVERSAMPLE_OVERSAMPLE_Bypass, ///< No oversampling.
191 NRF_SAADC_OVERSAMPLE_2X = SAADC_OVERSAMPLE_OVERSAMPLE_Over2x, ///< Oversample 2x.
192 NRF_SAADC_OVERSAMPLE_4X = SAADC_OVERSAMPLE_OVERSAMPLE_Over4x, ///< Oversample 4x.
193 NRF_SAADC_OVERSAMPLE_8X = SAADC_OVERSAMPLE_OVERSAMPLE_Over8x, ///< Oversample 8x.
194 NRF_SAADC_OVERSAMPLE_16X = SAADC_OVERSAMPLE_OVERSAMPLE_Over16x, ///< Oversample 16x.
195 NRF_SAADC_OVERSAMPLE_32X = SAADC_OVERSAMPLE_OVERSAMPLE_Over32x, ///< Oversample 32x.
196 NRF_SAADC_OVERSAMPLE_64X = SAADC_OVERSAMPLE_OVERSAMPLE_Over64x, ///< Oversample 64x.
197 NRF_SAADC_OVERSAMPLE_128X = SAADC_OVERSAMPLE_OVERSAMPLE_Over128x, ///< Oversample 128x.
198 NRF_SAADC_OVERSAMPLE_256X = SAADC_OVERSAMPLE_OVERSAMPLE_Over256x ///< Oversample 256x.
199 } nrf_saadc_oversample_t;
200
201 #if NRF_SAADC_HAS_CH_CONFIG_RES
202 /** @brief Analog-to-digital converter channel resistor control. */
203 typedef enum
204 {
205 NRF_SAADC_RESISTOR_DISABLED = SAADC_CH_CONFIG_RESP_Bypass, ///< Bypass resistor ladder.
206 NRF_SAADC_RESISTOR_PULLDOWN = SAADC_CH_CONFIG_RESP_Pulldown, ///< Pull-down to GND.
207 NRF_SAADC_RESISTOR_PULLUP = SAADC_CH_CONFIG_RESP_Pullup, ///< Pull-up to VDD.
208 #if defined(SAADC_CH_CONFIG_RESP_VDD1_2) || defined(__NRFX_DOXYGEN__)
209 NRF_SAADC_RESISTOR_VDD1_2 = SAADC_CH_CONFIG_RESP_VDD1_2, ///< Set input at VDD/2.
210 #endif
211 #if defined(SAADC_CH_CONFIG_RESP_VDDAO1V8div2)
212 NRF_SAADC_RESISTOR_VDD1_2 = SAADC_CH_CONFIG_RESP_VDDAO1V8div2, ///< Set input at VDD/2.
213 #endif
214 } nrf_saadc_resistor_t;
215 #endif
216
217 /** @brief Gain factor of the analog-to-digital converter input. */
218 typedef enum
219 {
220 #if defined(SAADC_CH_CONFIG_GAIN_Gain1_6) || defined(__NRFX_DOXYGEN__)
221 NRF_SAADC_GAIN1_6 = SAADC_CH_CONFIG_GAIN_Gain1_6, ///< Gain factor 1/6.
222 #endif
223 #if defined(SAADC_CH_CONFIG_GAIN_Gain1_5) || defined(__NRFX_DOXYGEN__)
224 NRF_SAADC_GAIN1_5 = SAADC_CH_CONFIG_GAIN_Gain1_5, ///< Gain factor 1/5.
225 #endif
226 #if defined(SAADC_CH_CONFIG_GAIN_Gain1_4) || defined(__NRFX_DOXYGEN__)
227 NRF_SAADC_GAIN1_4 = SAADC_CH_CONFIG_GAIN_Gain1_4, ///< Gain factor 1/4.
228 #elif defined(SAADC_CH_CONFIG_GAIN_Gain2_8) || defined(__NRFX_DOXYGEN__)
229 NRF_SAADC_GAIN1_4 = SAADC_CH_CONFIG_GAIN_Gain2_8, ///< Gain factor 1/4.
230 #endif
231 #if defined(SAADC_CH_CONFIG_GAIN_Gain2_7) || defined(__NRFX_DOXYGEN__)
232 NRF_SAADC_GAIN2_7 = SAADC_CH_CONFIG_GAIN_Gain2_7, ///< Gain factor 2/7.
233 #endif
234 #if defined(SAADC_CH_CONFIG_GAIN_Gain1_3) || defined(__NRFX_DOXYGEN__)
235 NRF_SAADC_GAIN1_3 = SAADC_CH_CONFIG_GAIN_Gain1_3, ///< Gain factor 1/3.
236 #elif defined(SAADC_CH_CONFIG_GAIN_Gain2_6) || defined(__NRFX_DOXYGEN__)
237 NRF_SAADC_GAIN1_3 = SAADC_CH_CONFIG_GAIN_Gain2_6, ///< Gain factor 1/3.
238 #endif
239 #if defined(SAADC_CH_CONFIG_GAIN_Gain2_5) || defined(__NRFX_DOXYGEN__)
240 NRF_SAADC_GAIN2_5 = SAADC_CH_CONFIG_GAIN_Gain2_5, ///< Gain factor 2/5.
241 #endif
242 #if defined(SAADC_CH_CONFIG_GAIN_Gain1_2) || defined(__NRFX_DOXYGEN__)
243 NRF_SAADC_GAIN1_2 = SAADC_CH_CONFIG_GAIN_Gain1_2, ///< Gain factor 1/2.
244 #elif defined(SAADC_CH_CONFIG_GAIN_Gain2_4) || defined(__NRFX_DOXYGEN__)
245 NRF_SAADC_GAIN1_2 = SAADC_CH_CONFIG_GAIN_Gain2_4, ///< Gain factor 1/2.
246 #endif
247 #if defined(SAADC_CH_CONFIG_GAIN_Gain2_3) || defined(__NRFX_DOXYGEN__)
248 NRF_SAADC_GAIN2_3 = SAADC_CH_CONFIG_GAIN_Gain2_3, ///< Gain factor 2/3.
249 #endif
250 NRF_SAADC_GAIN1 = SAADC_CH_CONFIG_GAIN_Gain1, ///< Gain factor 1.
251 NRF_SAADC_GAIN2 = SAADC_CH_CONFIG_GAIN_Gain2, ///< Gain factor 2.
252 #if defined(SAADC_CH_CONFIG_GAIN_Gain4) || defined(__NRFX_DOXYGEN__)
253 NRF_SAADC_GAIN4 = SAADC_CH_CONFIG_GAIN_Gain4, ///< Gain factor 4.
254 #endif
255 } nrf_saadc_gain_t;
256
257 /** @brief Reference selection for the analog-to-digital converter. */
258 typedef enum
259 {
260 #if defined(SAADC_CH_CONFIG_REFSEL_Internal) || defined(__NRFX_DOXYGEN__)
261 NRF_SAADC_REFERENCE_INTERNAL = SAADC_CH_CONFIG_REFSEL_Internal, ///< Internal reference.
262 #endif
263 #if defined(SAADC_CH_CONFIG_REFSEL_VDD1_4) || defined(__NRFX_DOXYGEN__)
264 NRF_SAADC_REFERENCE_VDD4 = SAADC_CH_CONFIG_REFSEL_VDD1_4 ///< VDD/4 as reference.
265 #endif
266 #if defined(SAADC_CH_CONFIG_REFSEL_External) || defined(__NRFX_DOXYGEN__)
267 NRF_SAADC_REFERENCE_EXTERNAL = SAADC_CH_CONFIG_REFSEL_External, ///< External reference.
268 #endif
269 } nrf_saadc_reference_t;
270
271 #if NRF_SAADC_HAS_ACQTIME_ENUM
272 /** @brief Analog-to-digital converter acquisition time. */
273 typedef enum
274 {
275 NRF_SAADC_ACQTIME_3US = SAADC_CH_CONFIG_TACQ_3us, ///< 3 us.
276 NRF_SAADC_ACQTIME_5US = SAADC_CH_CONFIG_TACQ_5us, ///< 5 us.
277 NRF_SAADC_ACQTIME_10US = SAADC_CH_CONFIG_TACQ_10us, ///< 10 us.
278 NRF_SAADC_ACQTIME_15US = SAADC_CH_CONFIG_TACQ_15us, ///< 15 us.
279 NRF_SAADC_ACQTIME_20US = SAADC_CH_CONFIG_TACQ_20us, ///< 20 us.
280 NRF_SAADC_ACQTIME_40US = SAADC_CH_CONFIG_TACQ_40us ///< 40 us.
281 } nrf_saadc_acqtime_t;
282 #else
283 typedef uint16_t nrf_saadc_acqtime_t;
284 #endif
285
286 /** @brief Analog-to-digital converter channel mode. */
287 typedef enum
288 {
289 NRF_SAADC_MODE_SINGLE_ENDED = SAADC_CH_CONFIG_MODE_SE, ///< Single-ended mode. PSELN will be ignored, negative input to ADC shorted to GND.
290 NRF_SAADC_MODE_DIFFERENTIAL = SAADC_CH_CONFIG_MODE_Diff ///< Differential mode.
291 } nrf_saadc_mode_t;
292
293 /** @brief Analog-to-digital converter channel burst mode. */
294 typedef enum
295 {
296 NRF_SAADC_BURST_DISABLED = SAADC_CH_CONFIG_BURST_Disabled, ///< Burst mode is disabled (normal operation).
297 NRF_SAADC_BURST_ENABLED = SAADC_CH_CONFIG_BURST_Enabled ///< Burst mode is enabled. SAADC takes 2^OVERSAMPLE number of samples as fast as it can, and sends the average to Data RAM.
298 } nrf_saadc_burst_t;
299
300 /** @brief Analog-to-digital converter tasks. */
301 typedef enum
302 {
303 NRF_SAADC_TASK_START = offsetof(NRF_SAADC_Type, TASKS_START), ///< Start the ADC and prepare the result buffer in RAM.
304 NRF_SAADC_TASK_STOP = offsetof(NRF_SAADC_Type, TASKS_STOP), ///< Stop the ADC and terminate any ongoing conversion.
305 NRF_SAADC_TASK_SAMPLE = offsetof(NRF_SAADC_Type, TASKS_SAMPLE), ///< Take one ADC sample. If scan is enabled, all channels are sampled.
306 NRF_SAADC_TASK_CALIBRATEOFFSET = offsetof(NRF_SAADC_Type, TASKS_CALIBRATEOFFSET), ///< Starts offset auto-calibration.
307 } nrf_saadc_task_t;
308
309 /** @brief Analog-to-digital converter events. */
310 typedef enum
311 {
312 NRF_SAADC_EVENT_STARTED = offsetof(NRF_SAADC_Type, EVENTS_STARTED), ///< The ADC has started.
313 #if NRF_SAADC_HAS_DMA_EVENTS
314 NRF_SAADC_EVENT_END = offsetof(NRF_SAADC_Type, EVENTS_DMA.END), ///< The ADC has filled up the result buffer.
315 #else
316 NRF_SAADC_EVENT_END = offsetof(NRF_SAADC_Type, EVENTS_END), ///< The ADC has filled up the result buffer.
317 #endif
318 NRF_SAADC_EVENT_DONE = offsetof(NRF_SAADC_Type, EVENTS_DONE), ///< A conversion task has been completed.
319 NRF_SAADC_EVENT_RESULTDONE = offsetof(NRF_SAADC_Type, EVENTS_RESULTDONE), ///< A result is ready to get transferred to RAM.
320 NRF_SAADC_EVENT_CALIBRATEDONE = offsetof(NRF_SAADC_Type, EVENTS_CALIBRATEDONE), ///< Calibration is complete.
321 NRF_SAADC_EVENT_STOPPED = offsetof(NRF_SAADC_Type, EVENTS_STOPPED), ///< The ADC has stopped.
322 NRF_SAADC_EVENT_CH0_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[0].LIMITH), ///< Last result is equal or above CH[0].LIMIT.HIGH.
323 NRF_SAADC_EVENT_CH0_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[0].LIMITL), ///< Last result is equal or below CH[0].LIMIT.LOW.
324 NRF_SAADC_EVENT_CH1_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[1].LIMITH), ///< Last result is equal or above CH[1].LIMIT.HIGH.
325 NRF_SAADC_EVENT_CH1_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[1].LIMITL), ///< Last result is equal or below CH[1].LIMIT.LOW.
326 NRF_SAADC_EVENT_CH2_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[2].LIMITH), ///< Last result is equal or above CH[2].LIMIT.HIGH.
327 NRF_SAADC_EVENT_CH2_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[2].LIMITL), ///< Last result is equal or below CH[2].LIMIT.LOW.
328 NRF_SAADC_EVENT_CH3_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[3].LIMITH), ///< Last result is equal or above CH[3].LIMIT.HIGH.
329 NRF_SAADC_EVENT_CH3_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[3].LIMITL), ///< Last result is equal or below CH[3].LIMIT.LOW.
330 NRF_SAADC_EVENT_CH4_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[4].LIMITH), ///< Last result is equal or above CH[4].LIMIT.HIGH.
331 NRF_SAADC_EVENT_CH4_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[4].LIMITL), ///< Last result is equal or below CH[4].LIMIT.LOW.
332 NRF_SAADC_EVENT_CH5_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[5].LIMITH), ///< Last result is equal or above CH[5].LIMIT.HIGH.
333 NRF_SAADC_EVENT_CH5_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[5].LIMITL), ///< Last result is equal or below CH[5].LIMIT.LOW.
334 NRF_SAADC_EVENT_CH6_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[6].LIMITH), ///< Last result is equal or above CH[6].LIMIT.HIGH.
335 NRF_SAADC_EVENT_CH6_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[6].LIMITL), ///< Last result is equal or below CH[6].LIMIT.LOW.
336 NRF_SAADC_EVENT_CH7_LIMITH = offsetof(NRF_SAADC_Type, EVENTS_CH[7].LIMITH), ///< Last result is equal or above CH[7].LIMIT.HIGH.
337 NRF_SAADC_EVENT_CH7_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[7].LIMITL) ///< Last result is equal or below CH[7].LIMIT.LOW.
338 } nrf_saadc_event_t;
339
340 /** @brief Analog-to-digital converter interrupt masks. */
341 typedef enum
342 {
343 NRF_SAADC_INT_STARTED = SAADC_INTENSET_STARTED_Msk, ///< Interrupt on EVENTS_STARTED event.
344 #if NRF_SAADC_HAS_DMA_EVENTS
345 NRF_SAADC_INT_END = SAADC_INTENSET_DMAEND_Msk, ///< Interrupt on EVENTS_END event.
346 #else
347 NRF_SAADC_INT_END = SAADC_INTENSET_END_Msk, ///< Interrupt on EVENTS_END event.
348 #endif
349 NRF_SAADC_INT_DONE = SAADC_INTENSET_DONE_Msk, ///< Interrupt on EVENTS_DONE event.
350 NRF_SAADC_INT_RESULTDONE = SAADC_INTENSET_RESULTDONE_Msk, ///< Interrupt on EVENTS_RESULTDONE event.
351 NRF_SAADC_INT_CALIBRATEDONE = SAADC_INTENSET_CALIBRATEDONE_Msk, ///< Interrupt on EVENTS_CALIBRATEDONE event.
352 NRF_SAADC_INT_STOPPED = SAADC_INTENSET_STOPPED_Msk, ///< Interrupt on EVENTS_STOPPED event.
353 NRF_SAADC_INT_CH0LIMITH = SAADC_INTENSET_CH0LIMITH_Msk, ///< Interrupt on EVENTS_CH[0].LIMITH event.
354 NRF_SAADC_INT_CH0LIMITL = SAADC_INTENSET_CH0LIMITL_Msk, ///< Interrupt on EVENTS_CH[0].LIMITL event.
355 NRF_SAADC_INT_CH1LIMITH = SAADC_INTENSET_CH1LIMITH_Msk, ///< Interrupt on EVENTS_CH[1].LIMITH event.
356 NRF_SAADC_INT_CH1LIMITL = SAADC_INTENSET_CH1LIMITL_Msk, ///< Interrupt on EVENTS_CH[1].LIMITL event.
357 NRF_SAADC_INT_CH2LIMITH = SAADC_INTENSET_CH2LIMITH_Msk, ///< Interrupt on EVENTS_CH[2].LIMITH event.
358 NRF_SAADC_INT_CH2LIMITL = SAADC_INTENSET_CH2LIMITL_Msk, ///< Interrupt on EVENTS_CH[2].LIMITL event.
359 NRF_SAADC_INT_CH3LIMITH = SAADC_INTENSET_CH3LIMITH_Msk, ///< Interrupt on EVENTS_CH[3].LIMITH event.
360 NRF_SAADC_INT_CH3LIMITL = SAADC_INTENSET_CH3LIMITL_Msk, ///< Interrupt on EVENTS_CH[3].LIMITL event.
361 NRF_SAADC_INT_CH4LIMITH = SAADC_INTENSET_CH4LIMITH_Msk, ///< Interrupt on EVENTS_CH[4].LIMITH event.
362 NRF_SAADC_INT_CH4LIMITL = SAADC_INTENSET_CH4LIMITL_Msk, ///< Interrupt on EVENTS_CH[4].LIMITL event.
363 NRF_SAADC_INT_CH5LIMITH = SAADC_INTENSET_CH5LIMITH_Msk, ///< Interrupt on EVENTS_CH[5].LIMITH event.
364 NRF_SAADC_INT_CH5LIMITL = SAADC_INTENSET_CH5LIMITL_Msk, ///< Interrupt on EVENTS_CH[5].LIMITL event.
365 NRF_SAADC_INT_CH6LIMITH = SAADC_INTENSET_CH6LIMITH_Msk, ///< Interrupt on EVENTS_CH[6].LIMITH event.
366 NRF_SAADC_INT_CH6LIMITL = SAADC_INTENSET_CH6LIMITL_Msk, ///< Interrupt on EVENTS_CH[6].LIMITL event.
367 NRF_SAADC_INT_CH7LIMITH = SAADC_INTENSET_CH7LIMITH_Msk, ///< Interrupt on EVENTS_CH[7].LIMITH event.
368 NRF_SAADC_INT_CH7LIMITL = SAADC_INTENSET_CH7LIMITL_Msk, ///< Interrupt on EVENTS_CH[7].LIMITL event.
369 NRF_SAADC_INT_ALL = 0x7FFFFFFFUL ///< Mask of all interrupts.
370 } nrf_saadc_int_mask_t;
371
372 /** @brief Analog-to-digital converter value limit type. */
373 typedef enum
374 {
375 NRF_SAADC_LIMIT_LOW = 0, ///< Low limit type.
376 NRF_SAADC_LIMIT_HIGH = 1 ///< High limit type.
377 } nrf_saadc_limit_t;
378
379 #if NRFX_API_VER_AT_LEAST(3, 2, 0) || defined(__NRFX_DOXYGEN__)
380 /** @brief Type of a single ADC conversion result. */
381 typedef void nrf_saadc_value_t;
382 #else
383 typedef uint16_t nrf_saadc_value_t;
384 #endif
385
386 /** @brief Analog-to-digital converter configuration structure. */
387 typedef struct
388 {
389 nrf_saadc_resolution_t resolution; ///< Resolution of samples.
390 nrf_saadc_oversample_t oversample; ///< Oversampling configuration.
391 nrf_saadc_value_t * buffer; ///< Pointer to sample buffer.
392 uint32_t buffer_size; ///< Size of the sample buffer.
393 } nrf_saadc_config_t;
394
395 /** @brief Analog-to-digital converter channel configuration structure. */
396 typedef struct
397 {
398 #if NRF_SAADC_HAS_CH_CONFIG_RES
399 nrf_saadc_resistor_t resistor_p; ///< Resistor value on positive input.
400 nrf_saadc_resistor_t resistor_n; ///< Resistor value on negative input.
401 #endif
402 nrf_saadc_gain_t gain; ///< Gain control value.
403 nrf_saadc_reference_t reference; ///< Reference control value.
404 nrf_saadc_acqtime_t acq_time; ///< Acquisition time.
405 nrf_saadc_mode_t mode; ///< SAADC mode. Single-ended or differential.
406 nrf_saadc_burst_t burst; ///< Burst mode configuration.
407 #if NRF_SAADC_HAS_CONVTIME
408 uint8_t conv_time; ///< Conversion time.
409 #endif
410 } nrf_saadc_channel_config_t;
411
412
413 /**
414 * @brief Function for triggering the specified SAADC task.
415 *
416 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
417 * @param[in] task SAADC task.
418 */
419 NRF_STATIC_INLINE void nrf_saadc_task_trigger(NRF_SAADC_Type * p_reg,
420 nrf_saadc_task_t task);
421
422 /**
423 * @brief Function for getting the address of the specified SAADC task register.
424 *
425 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
426 * @param[in] task SAADC task.
427 *
428 * @return Address of the specified SAADC task.
429 */
430 NRF_STATIC_INLINE uint32_t nrf_saadc_task_address_get(NRF_SAADC_Type const * p_reg,
431 nrf_saadc_task_t task);
432
433 /**
434 * @brief Function for retrieving the state of the SAADC event.
435 *
436 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
437 * @param[in] event Event to be checked.
438 *
439 * @retval true The event has been generated.
440 * @retval false The event has not been generated.
441 */
442 NRF_STATIC_INLINE bool nrf_saadc_event_check(NRF_SAADC_Type const * p_reg,
443 nrf_saadc_event_t event);
444
445 /**
446 * @brief Function for clearing the specific SAADC event.
447 *
448 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
449 * @param[in] event SAADC event.
450 */
451 NRF_STATIC_INLINE void nrf_saadc_event_clear(NRF_SAADC_Type * p_reg,
452 nrf_saadc_event_t event);
453
454 /**
455 * @brief Function for getting the address of the specified SAADC event register.
456 *
457 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
458 * @param[in] event SAADC event.
459 *
460 * @return Address of the specified SAADC event.
461 */
462 NRF_STATIC_INLINE uint32_t nrf_saadc_event_address_get(NRF_SAADC_Type const * p_reg,
463 nrf_saadc_event_t event);
464
465 #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
466 /**
467 * @brief Function for setting the subscribe configuration for a given
468 * SAADC task.
469 *
470 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
471 * @param[in] task Task for which to set the configuration.
472 * @param[in] channel Channel through which to subscribe events.
473 */
474 NRF_STATIC_INLINE void nrf_saadc_subscribe_set(NRF_SAADC_Type * p_reg,
475 nrf_saadc_task_t task,
476 uint8_t channel);
477
478 /**
479 * @brief Function for clearing the subscribe configuration for a given
480 * SAADC task.
481 *
482 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
483 * @param[in] task Task for which to clear the configuration.
484 */
485 NRF_STATIC_INLINE void nrf_saadc_subscribe_clear(NRF_SAADC_Type * p_reg,
486 nrf_saadc_task_t task);
487
488 /**
489 * @brief Function for setting the publish configuration for a given
490 * SAADC event.
491 *
492 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
493 * @param[in] event Event for which to set the configuration.
494 * @param[in] channel Channel through which to publish the event.
495 */
496 NRF_STATIC_INLINE void nrf_saadc_publish_set(NRF_SAADC_Type * p_reg,
497 nrf_saadc_event_t event,
498 uint8_t channel);
499
500 /**
501 * @brief Function for clearing the publish configuration for a given
502 * SAADC event.
503 *
504 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
505 * @param[in] event Event for which to clear the configuration.
506 */
507 NRF_STATIC_INLINE void nrf_saadc_publish_clear(NRF_SAADC_Type * p_reg,
508 nrf_saadc_event_t event);
509 #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
510
511 /**
512 * @brief Function for getting the SAADC channel monitoring limit events.
513 *
514 * @param[in] channel Channel number.
515 * @param[in] limit_type Low limit or high limit.
516 *
517 * @return The SAADC channel monitoring limit event.
518 */
519 NRF_STATIC_INLINE nrf_saadc_event_t nrf_saadc_limit_event_get(uint8_t channel,
520 nrf_saadc_limit_t limit_type);
521
522 /**
523 * @brief Function for configuring the input pins for the specified SAADC channel.
524 *
525 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
526 * @param[in] channel Channel number.
527 * @param[in] pselp Positive input.
528 * @param[in] pseln Negative input. Set to @ref NRF_SAADC_INPUT_DISABLED in single ended mode.
529 */
530 NRF_STATIC_INLINE void nrf_saadc_channel_input_set(NRF_SAADC_Type * p_reg,
531 uint8_t channel,
532 nrf_saadc_input_t pselp,
533 nrf_saadc_input_t pseln);
534
535 /**
536 * @brief Function for configuring the positive input pin for the specified SAADC channel.
537 *
538 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
539 * @param[in] channel Channel number.
540 * @param[in] pselp Positive input.
541 */
542 NRF_STATIC_INLINE void nrf_saadc_channel_pos_input_set(NRF_SAADC_Type * p_reg,
543 uint8_t channel,
544 nrf_saadc_input_t pselp);
545
546 /**
547 * @brief Function for setting the SAADC channel monitoring limits.
548 *
549 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
550 * @param[in] channel Channel number.
551 * @param[in] low Low limit.
552 * @param[in] high High limit.
553 */
554 NRF_STATIC_INLINE void nrf_saadc_channel_limits_set(NRF_SAADC_Type * p_reg,
555 uint8_t channel,
556 int16_t low,
557 int16_t high);
558
559 /**
560 * @brief Function for setting the configuration of SAADC interrupts.
561 *
562 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
563 * @param[in] mask Interrupts configuration to be set.
564 * Use @ref nrf_saadc_int_mask_t values for bit masking.
565 */
566 NRF_STATIC_INLINE void nrf_saadc_int_set(NRF_SAADC_Type * p_reg, uint32_t mask);
567
568 /**
569 * @brief Function for enabling specified SAADC interrupts.
570 *
571 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
572 * @param[in] mask Mask of interrupts to be enabled.
573 * Use @ref nrf_saadc_int_mask_t values for bit masking.
574 */
575 NRF_STATIC_INLINE void nrf_saadc_int_enable(NRF_SAADC_Type * p_reg, uint32_t mask);
576
577 /**
578 * @brief Function for checking if the specified interrupts are enabled.
579 *
580 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
581 * @param[in] mask Mask of interrupts to be checked.
582 * Use @ref nrf_saadc_int_mask_t values for bit masking.
583 *
584 * @return Mask of enabled interrupts.
585 */
586 NRF_STATIC_INLINE uint32_t nrf_saadc_int_enable_check(NRF_SAADC_Type const * p_reg, uint32_t mask);
587
588 /**
589 * @brief Function for disabling specified interrupts.
590 *
591 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
592 * @param[in] mask Mask of interrupts to be disabled.
593 * Use @ref nrf_saadc_int_mask_t values for bit masking.
594 */
595 NRF_STATIC_INLINE void nrf_saadc_int_disable(NRF_SAADC_Type * p_reg, uint32_t mask);
596
597 /**
598 * @brief Function for generating masks for SAADC channel limit interrupts.
599 *
600 * @param[in] channel SAADC channel number.
601 * @param[in] limit_type Limit type.
602 *
603 * @return Interrupt mask.
604 */
605 NRF_STATIC_INLINE uint32_t nrf_saadc_limit_int_get(uint8_t channel,
606 nrf_saadc_limit_t limit_type);
607
608 /**
609 * @brief Function for checking whether the SAADC is busy.
610 *
611 * This function checks whether the analog-to-digital converter is busy with a conversion.
612 *
613 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
614 *
615 * @retval true The SAADC is busy.
616 * @retval false The SAADC is not busy.
617 */
618 NRF_STATIC_INLINE bool nrf_saadc_busy_check(NRF_SAADC_Type const * p_reg);
619
620 /**
621 * @brief Function for enabling the SAADC.
622 *
623 * The analog-to-digital converter must be enabled before use.
624 *
625 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
626 */
627 NRF_STATIC_INLINE void nrf_saadc_enable(NRF_SAADC_Type * p_reg);
628
629 /**
630 * @brief Function for disabling the SAADC.
631 *
632 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
633 */
634 NRF_STATIC_INLINE void nrf_saadc_disable(NRF_SAADC_Type * p_reg);
635
636 /**
637 * @brief Function for checking if the SAADC is enabled.
638 *
639 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
640 *
641 * @retval true The SAADC is enabled.
642 * @retval false The SAADC is not enabled.
643 */
644 NRF_STATIC_INLINE bool nrf_saadc_enable_check(NRF_SAADC_Type const * p_reg);
645
646 /**
647 * @brief Function for initializing the SAADC result buffer.
648 *
649 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
650 * @param[in] p_buffer Pointer to the result buffer.
651 * @param[in] size Size of the buffer (in 8-bit or 16-bit samples).
652 */
653 NRF_STATIC_INLINE void nrf_saadc_buffer_init(NRF_SAADC_Type * p_reg,
654 nrf_saadc_value_t * p_buffer,
655 uint32_t size);
656
657 /**
658 * @brief Function for setting the SAADC result buffer pointer.
659 *
660 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
661 * @param[in] p_buffer Pointer to the result buffer.
662 */
663 NRF_STATIC_INLINE void nrf_saadc_buffer_pointer_set(NRF_SAADC_Type * p_reg,
664 nrf_saadc_value_t * p_buffer);
665
666 /**
667 * @brief Function for getting the SAADC result buffer pointer.
668 *
669 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
670 *
671 * @return Pointer to the result buffer.
672 */
673 NRF_STATIC_INLINE nrf_saadc_value_t * nrf_saadc_buffer_pointer_get(NRF_SAADC_Type const * p_reg);
674
675 /**
676 * @brief Function for getting the number of samples written to the result
677 * buffer since the previous START task.
678 *
679 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
680 *
681 * @return Number of 8-bit or 16-bit samples written to the buffer.
682 */
683 NRF_STATIC_INLINE uint16_t nrf_saadc_amount_get(NRF_SAADC_Type const * p_reg);
684
685 /**
686 * @brief Function for setting the SAADC sample resolution.
687 *
688 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
689 * @param[in] resolution Bit resolution.
690 */
691 NRF_STATIC_INLINE void nrf_saadc_resolution_set(NRF_SAADC_Type * p_reg,
692 nrf_saadc_resolution_t resolution);
693
694 /**
695 * @brief Function for getting the SAADC sample resolution.
696 *
697 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
698 *
699 * @return Sample resolution.
700 */
701 NRF_STATIC_INLINE nrf_saadc_resolution_t nrf_saadc_resolution_get(NRF_SAADC_Type const * p_reg);
702
703 /**
704 * @brief Function for configuring the oversampling feature.
705 *
706 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
707 * @param[in] oversample Oversampling mode.
708 */
709 NRF_STATIC_INLINE void nrf_saadc_oversample_set(NRF_SAADC_Type * p_reg,
710 nrf_saadc_oversample_t oversample);
711
712 /**
713 * @brief Function for getting the oversampling feature configuration.
714 *
715 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
716 *
717 * @return Oversampling configuration.
718 */
719 NRF_STATIC_INLINE nrf_saadc_oversample_t nrf_saadc_oversample_get(NRF_SAADC_Type const * p_reg);
720
721 /**
722 * @brief Function for getting the sample count needed for one averaged result for a given
723 * oversampling configuration.
724 *
725 * @param[in] oversample Oversampling configuration.
726 *
727 * @return Sample count.
728 */
729 NRF_STATIC_INLINE uint32_t nrf_saadc_oversample_sample_count_get(nrf_saadc_oversample_t oversample);
730
731 /**
732 * @brief Function for enabling the continuous sampling.
733 *
734 * This function configures the SAADC internal timer to automatically take new samples at a fixed
735 * sample rate. Trigger the START task to begin continuous sampling. To stop the sampling, trigger
736 * the STOP task.
737 *
738 * @note The internal timer can only be used when a single input channel is enabled.
739 *
740 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
741 * @param[in] cc Capture and compare value. Sample rate is 16 MHz/cc.
742 * Valid @c CC range is from 80 to 2047.
743 */
744 NRF_STATIC_INLINE void nrf_saadc_continuous_mode_enable(NRF_SAADC_Type * p_reg,
745 uint16_t cc);
746
747 /**
748 * @brief Function for checking if the continuous sampling is enabled.
749 *
750 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
751 *
752 * @retval true The continuous sampling is enabled.
753 * @retval false The continuous sampling is disabled.
754 */
755 NRF_STATIC_INLINE bool nrf_saadc_continuous_mode_enable_check(NRF_SAADC_Type const * p_reg);
756
757 /**
758 * @brief Function for disabling the continuous sampling.
759 *
760 * New samples can still be acquired by manually triggering the SAMPLE task or by PPI.
761 *
762 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
763 */
764 NRF_STATIC_INLINE void nrf_saadc_continuous_mode_disable(NRF_SAADC_Type * p_reg);
765
766 #if NRF_SAADC_HAS_LIN_CAL
767 /**
768 * @brief Function for setting linearity calibration coefficient.
769 *
770 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
771 * @param[in] index Coefficient number.
772 * @param[in] coeff Value of the coefficient.
773 */
774 NRF_STATIC_INLINE void nrf_saadc_linearity_calibration_coeff_set(NRF_SAADC_Type * p_reg,
775 uint8_t index,
776 uint32_t coeff);
777
778 /**
779 * @brief Function for getting linearity calibration coefficient.
780 *
781 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
782 * @param[in] index Coefficient number.
783 *
784 * @return Value of the coefficient.
785 */
786 NRF_STATIC_INLINE uint32_t nrf_saadc_linearity_calibration_coeff_get(NRF_SAADC_Type const * p_reg,
787 uint8_t index);
788 #endif
789
790 /**
791 * @brief Function for initializing the SAADC channel.
792 *
793 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
794 * @param[in] channel Channel number.
795 * @param[in] config Pointer to the channel configuration structure.
796 */
797 NRF_STATIC_INLINE void nrf_saadc_channel_init(NRF_SAADC_Type * p_reg,
798 uint8_t channel,
799 nrf_saadc_channel_config_t const * config);
800
801 /**
802 * @brief Function for configuring the burst mode for the specified channel.
803 *
804 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
805 * @param[in] channel Channel number.
806 * @param[in] burst Burst mode setting.
807 */
808 NRF_STATIC_INLINE void nrf_saadc_burst_set(NRF_SAADC_Type * p_reg,
809 uint8_t channel,
810 nrf_saadc_burst_t burst);
811
812 /**
813 * @brief Function for getting the minimum value of the conversion result.
814 *
815 * The minimum value of the conversion result depends on the configured resolution.
816 *
817 * @param[in] resolution Bit resolution.
818 *
819 * @return Minimum value of the conversion result.
820 */
821 NRF_STATIC_INLINE int16_t nrf_saadc_value_min_get(nrf_saadc_resolution_t resolution);
822
823 /**
824 * @brief Function for getting the maximum value of the conversion result.
825 *
826 * The maximum value of the conversion result depends on the configured resolution.
827 *
828 * @param[in] resolution Bit resolution.
829 *
830 * @return Maximum value of the conversion result.
831 */
832 NRF_STATIC_INLINE int16_t nrf_saadc_value_max_get(nrf_saadc_resolution_t resolution);
833
834 #ifndef NRF_DECLARE_ONLY
835
nrf_saadc_task_trigger(NRF_SAADC_Type * p_reg,nrf_saadc_task_t task)836 NRF_STATIC_INLINE void nrf_saadc_task_trigger(NRF_SAADC_Type * p_reg, nrf_saadc_task_t task)
837 {
838 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
839 }
840
nrf_saadc_task_address_get(NRF_SAADC_Type const * p_reg,nrf_saadc_task_t task)841 NRF_STATIC_INLINE uint32_t nrf_saadc_task_address_get(NRF_SAADC_Type const * p_reg,
842 nrf_saadc_task_t task)
843 {
844 return nrf_task_event_address_get(p_reg, task);
845 }
846
nrf_saadc_event_check(NRF_SAADC_Type const * p_reg,nrf_saadc_event_t event)847 NRF_STATIC_INLINE bool nrf_saadc_event_check(NRF_SAADC_Type const * p_reg, nrf_saadc_event_t event)
848 {
849 return nrf_event_check(p_reg, event);
850 }
851
nrf_saadc_event_clear(NRF_SAADC_Type * p_reg,nrf_saadc_event_t event)852 NRF_STATIC_INLINE void nrf_saadc_event_clear(NRF_SAADC_Type * p_reg, nrf_saadc_event_t event)
853 {
854 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
855 nrf_event_readback((uint8_t *)p_reg + (uint32_t)event);
856 }
857
nrf_saadc_event_address_get(NRF_SAADC_Type const * p_reg,nrf_saadc_event_t event)858 NRF_STATIC_INLINE uint32_t nrf_saadc_event_address_get(NRF_SAADC_Type const * p_reg,
859 nrf_saadc_event_t event)
860 {
861 return nrf_task_event_address_get(p_reg, event);
862 }
863
864 #if defined(DPPI_PRESENT)
nrf_saadc_subscribe_set(NRF_SAADC_Type * p_reg,nrf_saadc_task_t task,uint8_t channel)865 NRF_STATIC_INLINE void nrf_saadc_subscribe_set(NRF_SAADC_Type * p_reg,
866 nrf_saadc_task_t task,
867 uint8_t channel)
868 {
869 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) =
870 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE);
871 }
872
nrf_saadc_subscribe_clear(NRF_SAADC_Type * p_reg,nrf_saadc_task_t task)873 NRF_STATIC_INLINE void nrf_saadc_subscribe_clear(NRF_SAADC_Type * p_reg, nrf_saadc_task_t task)
874 {
875 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0;
876 }
877
nrf_saadc_publish_set(NRF_SAADC_Type * p_reg,nrf_saadc_event_t event,uint8_t channel)878 NRF_STATIC_INLINE void nrf_saadc_publish_set(NRF_SAADC_Type * p_reg,
879 nrf_saadc_event_t event,
880 uint8_t channel)
881 {
882 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) =
883 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE);
884 }
885
nrf_saadc_publish_clear(NRF_SAADC_Type * p_reg,nrf_saadc_event_t event)886 NRF_STATIC_INLINE void nrf_saadc_publish_clear(NRF_SAADC_Type * p_reg, nrf_saadc_event_t event)
887 {
888 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = 0;
889 }
890 #endif // defined(DPPI_PRESENT)
891
nrf_saadc_limit_event_get(uint8_t channel,nrf_saadc_limit_t limit_type)892 NRF_STATIC_INLINE nrf_saadc_event_t nrf_saadc_limit_event_get(uint8_t channel,
893 nrf_saadc_limit_t limit_type)
894 {
895 if (limit_type == NRF_SAADC_LIMIT_HIGH)
896 {
897 return (nrf_saadc_event_t)NRFX_OFFSETOF(NRF_SAADC_Type, EVENTS_CH[channel].LIMITH);
898 }
899 else
900 {
901 return (nrf_saadc_event_t)NRFX_OFFSETOF(NRF_SAADC_Type, EVENTS_CH[channel].LIMITL);
902 }
903 }
904
nrf_saadc_channel_input_set(NRF_SAADC_Type * p_reg,uint8_t channel,nrf_saadc_input_t pselp,nrf_saadc_input_t pseln)905 NRF_STATIC_INLINE void nrf_saadc_channel_input_set(NRF_SAADC_Type * p_reg,
906 uint8_t channel,
907 nrf_saadc_input_t pselp,
908 nrf_saadc_input_t pseln)
909 {
910 #if NRF_SAADC_HAS_AIN_AS_PIN
911 p_reg->CH[channel].PSELN = (pseln != NRF_SAADC_INPUT_DISABLED) ?
912 ((NRF_PIN_NUMBER_TO_PIN(pseln) << SAADC_CH_PSELN_PIN_Pos)
913 | (NRF_PIN_NUMBER_TO_PORT(pseln) << SAADC_CH_PSELN_PORT_Pos)
914 | (SAADC_CH_PSELN_CONNECT_AnalogInput << SAADC_CH_PSELN_CONNECT_Pos)
915 ) : 0;
916 p_reg->CH[channel].PSELP = (pselp != NRF_SAADC_INPUT_DISABLED) ?
917 ((NRF_PIN_NUMBER_TO_PIN(pselp) << SAADC_CH_PSELP_PIN_Pos)
918 | (NRF_PIN_NUMBER_TO_PORT(pselp) << SAADC_CH_PSELP_PORT_Pos)
919 | (SAADC_CH_PSELP_CONNECT_AnalogInput << SAADC_CH_PSELP_CONNECT_Pos)
920 ) : 0;
921 #else
922 p_reg->CH[channel].PSELN = pseln;
923 p_reg->CH[channel].PSELP = pselp;
924 #endif
925 }
926
nrf_saadc_channel_pos_input_set(NRF_SAADC_Type * p_reg,uint8_t channel,nrf_saadc_input_t pselp)927 NRF_STATIC_INLINE void nrf_saadc_channel_pos_input_set(NRF_SAADC_Type * p_reg,
928 uint8_t channel,
929 nrf_saadc_input_t pselp)
930 {
931 #if NRF_SAADC_HAS_AIN_AS_PIN
932 p_reg->CH[channel].PSELP = (pselp != NRF_SAADC_INPUT_DISABLED) ?
933 ((NRF_PIN_NUMBER_TO_PIN(pselp) << SAADC_CH_PSELP_PIN_Pos)
934 | (NRF_PIN_NUMBER_TO_PORT(pselp) << SAADC_CH_PSELP_PORT_Pos)
935 | (SAADC_CH_PSELP_CONNECT_AnalogInput << SAADC_CH_PSELP_CONNECT_Pos)
936 ) : 0;
937 #else
938 p_reg->CH[channel].PSELP = pselp;
939 #endif
940 }
941
nrf_saadc_channel_limits_set(NRF_SAADC_Type * p_reg,uint8_t channel,int16_t low,int16_t high)942 NRF_STATIC_INLINE void nrf_saadc_channel_limits_set(NRF_SAADC_Type * p_reg,
943 uint8_t channel,
944 int16_t low,
945 int16_t high)
946 {
947 p_reg->CH[channel].LIMIT = (
948 (((uint32_t) low << SAADC_CH_LIMIT_LOW_Pos) & SAADC_CH_LIMIT_LOW_Msk)
949 | (((uint32_t) high << SAADC_CH_LIMIT_HIGH_Pos) & SAADC_CH_LIMIT_HIGH_Msk));
950 }
951
nrf_saadc_int_set(NRF_SAADC_Type * p_reg,uint32_t mask)952 NRF_STATIC_INLINE void nrf_saadc_int_set(NRF_SAADC_Type * p_reg, uint32_t mask)
953 {
954 p_reg->INTEN = mask;
955 }
956
nrf_saadc_int_enable(NRF_SAADC_Type * p_reg,uint32_t mask)957 NRF_STATIC_INLINE void nrf_saadc_int_enable(NRF_SAADC_Type * p_reg, uint32_t mask)
958 {
959 p_reg->INTENSET = mask;
960 }
961
nrf_saadc_int_enable_check(NRF_SAADC_Type const * p_reg,uint32_t mask)962 NRF_STATIC_INLINE uint32_t nrf_saadc_int_enable_check(NRF_SAADC_Type const * p_reg, uint32_t mask)
963 {
964 return p_reg->INTENSET & mask;
965 }
966
nrf_saadc_int_disable(NRF_SAADC_Type * p_reg,uint32_t mask)967 NRF_STATIC_INLINE void nrf_saadc_int_disable(NRF_SAADC_Type * p_reg, uint32_t mask)
968 {
969 p_reg->INTENCLR = mask;
970 }
971
nrf_saadc_limit_int_get(uint8_t channel,nrf_saadc_limit_t limit_type)972 NRF_STATIC_INLINE uint32_t nrf_saadc_limit_int_get(uint8_t channel,
973 nrf_saadc_limit_t limit_type)
974 {
975 NRFX_ASSERT(channel < SAADC_CH_NUM);
976 uint32_t mask = (limit_type == NRF_SAADC_LIMIT_LOW) ?
977 NRF_SAADC_INT_CH0LIMITL : NRF_SAADC_INT_CH0LIMITH;
978 return mask << (channel * 2);
979 }
980
nrf_saadc_busy_check(NRF_SAADC_Type const * p_reg)981 NRF_STATIC_INLINE bool nrf_saadc_busy_check(NRF_SAADC_Type const * p_reg)
982 {
983 return (p_reg->STATUS == (SAADC_STATUS_STATUS_Busy << SAADC_STATUS_STATUS_Pos));
984 }
985
nrf_saadc_enable(NRF_SAADC_Type * p_reg)986 NRF_STATIC_INLINE void nrf_saadc_enable(NRF_SAADC_Type * p_reg)
987 {
988 p_reg->ENABLE = (SAADC_ENABLE_ENABLE_Enabled << SAADC_ENABLE_ENABLE_Pos);
989 }
990
nrf_saadc_disable(NRF_SAADC_Type * p_reg)991 NRF_STATIC_INLINE void nrf_saadc_disable(NRF_SAADC_Type * p_reg)
992 {
993 p_reg->ENABLE = (SAADC_ENABLE_ENABLE_Disabled << SAADC_ENABLE_ENABLE_Pos);
994 }
995
nrf_saadc_enable_check(NRF_SAADC_Type const * p_reg)996 NRF_STATIC_INLINE bool nrf_saadc_enable_check(NRF_SAADC_Type const * p_reg)
997 {
998 return (p_reg->ENABLE == (SAADC_ENABLE_ENABLE_Enabled << SAADC_ENABLE_ENABLE_Pos));
999 }
1000
nrf_saadc_buffer_init(NRF_SAADC_Type * p_reg,nrf_saadc_value_t * p_buffer,uint32_t size)1001 NRF_STATIC_INLINE void nrf_saadc_buffer_init(NRF_SAADC_Type * p_reg,
1002 nrf_saadc_value_t * p_buffer,
1003 uint32_t size)
1004 {
1005 #if (NRF_SAADC_8BIT_SAMPLE_WIDTH == 8)
1006 if (nrf_saadc_resolution_get(p_reg) != NRF_SAADC_RESOLUTION_8BIT)
1007 {
1008 size = size * 2;
1009 }
1010 #endif
1011
1012 #if NRF_SAADC_HAS_DMA_REG
1013 p_reg->DMA.PTR = (uint32_t)p_buffer;
1014 p_reg->DMA.MAXCNT = size;
1015 #else
1016 p_reg->RESULT.PTR = (uint32_t)p_buffer;
1017 p_reg->RESULT.MAXCNT = size;
1018 #endif
1019 }
1020
nrf_saadc_buffer_pointer_set(NRF_SAADC_Type * p_reg,nrf_saadc_value_t * p_buffer)1021 NRF_STATIC_INLINE void nrf_saadc_buffer_pointer_set(NRF_SAADC_Type * p_reg,
1022 nrf_saadc_value_t * p_buffer)
1023 {
1024 #if NRF_SAADC_HAS_DMA_REG
1025 p_reg->DMA.PTR = (uint32_t)p_buffer;
1026 #else
1027 p_reg->RESULT.PTR = (uint32_t)p_buffer;
1028 #endif
1029 }
1030
nrf_saadc_buffer_pointer_get(NRF_SAADC_Type const * p_reg)1031 NRF_STATIC_INLINE nrf_saadc_value_t * nrf_saadc_buffer_pointer_get(NRF_SAADC_Type const * p_reg)
1032 {
1033 #if NRF_SAADC_HAS_DMA_REG
1034 return (nrf_saadc_value_t *)p_reg->DMA.PTR;
1035 #else
1036 return (nrf_saadc_value_t *)p_reg->RESULT.PTR;
1037 #endif
1038 }
1039
nrf_saadc_amount_get(NRF_SAADC_Type const * p_reg)1040 NRF_STATIC_INLINE uint16_t nrf_saadc_amount_get(NRF_SAADC_Type const * p_reg)
1041 {
1042 #if NRF_SAADC_HAS_DMA_REG
1043 uint16_t result = (uint16_t)p_reg->DMA.AMOUNT;
1044 #else
1045 uint16_t result = (uint16_t)p_reg->RESULT.AMOUNT;
1046 #endif
1047
1048 #if (NRF_SAADC_8BIT_SAMPLE_WIDTH == 8)
1049 if (nrf_saadc_resolution_get(p_reg) != NRF_SAADC_RESOLUTION_8BIT)
1050 {
1051 result = result / 2;
1052 }
1053 #endif
1054
1055 return result;
1056 }
1057
nrf_saadc_resolution_set(NRF_SAADC_Type * p_reg,nrf_saadc_resolution_t resolution)1058 NRF_STATIC_INLINE void nrf_saadc_resolution_set(NRF_SAADC_Type * p_reg,
1059 nrf_saadc_resolution_t resolution)
1060 {
1061 p_reg->RESOLUTION = resolution;
1062 }
1063
nrf_saadc_resolution_get(NRF_SAADC_Type const * p_reg)1064 NRF_STATIC_INLINE nrf_saadc_resolution_t nrf_saadc_resolution_get(NRF_SAADC_Type const * p_reg)
1065 {
1066 return (nrf_saadc_resolution_t)p_reg->RESOLUTION;
1067 }
1068
nrf_saadc_oversample_set(NRF_SAADC_Type * p_reg,nrf_saadc_oversample_t oversample)1069 NRF_STATIC_INLINE void nrf_saadc_oversample_set(NRF_SAADC_Type * p_reg,
1070 nrf_saadc_oversample_t oversample)
1071 {
1072 p_reg->OVERSAMPLE = oversample;
1073 }
1074
nrf_saadc_oversample_get(NRF_SAADC_Type const * p_reg)1075 NRF_STATIC_INLINE nrf_saadc_oversample_t nrf_saadc_oversample_get(NRF_SAADC_Type const * p_reg)
1076 {
1077 return (nrf_saadc_oversample_t)p_reg->OVERSAMPLE;
1078 }
1079
nrf_saadc_oversample_sample_count_get(nrf_saadc_oversample_t oversample)1080 NRF_STATIC_INLINE uint32_t nrf_saadc_oversample_sample_count_get(nrf_saadc_oversample_t oversample)
1081 {
1082 return (1 << (uint32_t)oversample);
1083 }
1084
nrf_saadc_continuous_mode_enable(NRF_SAADC_Type * p_reg,uint16_t cc)1085 NRF_STATIC_INLINE void nrf_saadc_continuous_mode_enable(NRF_SAADC_Type * p_reg, uint16_t cc)
1086 {
1087 NRFX_ASSERT((cc >= 80) && (cc <= 2047));
1088 p_reg->SAMPLERATE = (SAADC_SAMPLERATE_MODE_Timers << SAADC_SAMPLERATE_MODE_Pos)
1089 | ((uint32_t)cc << SAADC_SAMPLERATE_CC_Pos);
1090 }
1091
nrf_saadc_continuous_mode_enable_check(NRF_SAADC_Type const * p_reg)1092 NRF_STATIC_INLINE bool nrf_saadc_continuous_mode_enable_check(NRF_SAADC_Type const * p_reg)
1093 {
1094 return (bool)((p_reg->SAMPLERATE & SAADC_SAMPLERATE_MODE_Msk)
1095 == (SAADC_SAMPLERATE_MODE_Timers << SAADC_SAMPLERATE_MODE_Pos));
1096 }
1097
nrf_saadc_continuous_mode_disable(NRF_SAADC_Type * p_reg)1098 NRF_STATIC_INLINE void nrf_saadc_continuous_mode_disable(NRF_SAADC_Type * p_reg)
1099 {
1100 p_reg->SAMPLERATE = SAADC_SAMPLERATE_MODE_Task << SAADC_SAMPLERATE_MODE_Pos;
1101 }
1102
1103 #if NRF_SAADC_HAS_LIN_CAL
nrf_saadc_linearity_calibration_coeff_set(NRF_SAADC_Type * p_reg,uint8_t index,uint32_t coeff)1104 NRF_STATIC_INLINE void nrf_saadc_linearity_calibration_coeff_set(NRF_SAADC_Type * p_reg,
1105 uint8_t index,
1106 uint32_t coeff)
1107 {
1108 NRFX_ASSERT(index < NRF_SAADC_LIN_CAL_MAX_COUNT);
1109 NRFX_ASSERT(coeff <= NRF_SAADC_LIN_CAL_MAX);
1110 p_reg->TRIM.LINCALCOEFF[index] = coeff;
1111 }
1112
nrf_saadc_linearity_calibration_coeff_get(NRF_SAADC_Type const * p_reg,uint8_t index)1113 NRF_STATIC_INLINE uint32_t nrf_saadc_linearity_calibration_coeff_get(NRF_SAADC_Type const * p_reg,
1114 uint8_t index)
1115 {
1116 NRFX_ASSERT(index < NRF_SAADC_LIN_CAL_MAX_COUNT);
1117 return p_reg->TRIM.LINCALCOEFF[index];
1118 }
1119 #endif
1120
nrf_saadc_channel_init(NRF_SAADC_Type * p_reg,uint8_t channel,nrf_saadc_channel_config_t const * config)1121 NRF_STATIC_INLINE void nrf_saadc_channel_init(NRF_SAADC_Type * p_reg,
1122 uint8_t channel,
1123 nrf_saadc_channel_config_t const * config)
1124 {
1125 #if !NRF_SAADC_HAS_ACQTIME_ENUM
1126 NRFX_ASSERT(config->acq_time <= NRF_SAADC_ACQTIME_MAX);
1127 #endif
1128 #if NRF_SAADC_HAS_CONVTIME
1129 NRFX_ASSERT(config->conv_time <= NRF_SAADC_CONVTIME_MAX);
1130 #endif
1131 p_reg->CH[channel].CONFIG =
1132 ((config->gain << SAADC_CH_CONFIG_GAIN_Pos) & SAADC_CH_CONFIG_GAIN_Msk)
1133 | ((config->reference << SAADC_CH_CONFIG_REFSEL_Pos) & SAADC_CH_CONFIG_REFSEL_Msk)
1134 | ((config->acq_time << SAADC_CH_CONFIG_TACQ_Pos) & SAADC_CH_CONFIG_TACQ_Msk)
1135 #if NRF_SAADC_HAS_CH_CONFIG_RES
1136 | ((config->resistor_p << SAADC_CH_CONFIG_RESP_Pos) & SAADC_CH_CONFIG_RESP_Msk)
1137 | ((config->resistor_n << SAADC_CH_CONFIG_RESN_Pos) & SAADC_CH_CONFIG_RESN_Msk)
1138 #endif
1139 #if NRF_SAADC_HAS_CONVTIME
1140 | ((config->conv_time << SAADC_CH_CONFIG_TCONV_Pos) & SAADC_CH_CONFIG_TCONV_Msk)
1141 #endif
1142 | ((config->mode << SAADC_CH_CONFIG_MODE_Pos) & SAADC_CH_CONFIG_MODE_Msk)
1143 | ((config->burst << SAADC_CH_CONFIG_BURST_Pos) & SAADC_CH_CONFIG_BURST_Msk);
1144 }
1145
nrf_saadc_burst_set(NRF_SAADC_Type * p_reg,uint8_t channel,nrf_saadc_burst_t burst)1146 NRF_STATIC_INLINE void nrf_saadc_burst_set(NRF_SAADC_Type * p_reg,
1147 uint8_t channel,
1148 nrf_saadc_burst_t burst)
1149 {
1150 p_reg->CH[channel].CONFIG = (p_reg->CH[channel].CONFIG & ~SAADC_CH_CONFIG_BURST_Msk) |
1151 (burst << SAADC_CH_CONFIG_BURST_Pos);
1152 }
1153
nrf_saadc_value_min_get(nrf_saadc_resolution_t resolution)1154 NRF_STATIC_INLINE int16_t nrf_saadc_value_min_get(nrf_saadc_resolution_t resolution)
1155 {
1156 uint8_t res_bits = 0;
1157 switch (resolution)
1158 {
1159 case NRF_SAADC_RESOLUTION_8BIT:
1160 res_bits = 8;
1161 break;
1162 case NRF_SAADC_RESOLUTION_10BIT:
1163 res_bits = 10;
1164 break;
1165 case NRF_SAADC_RESOLUTION_12BIT:
1166 res_bits = 12;
1167 break;
1168 case NRF_SAADC_RESOLUTION_14BIT:
1169 res_bits = 14;
1170 break;
1171 default:
1172 NRFX_ASSERT(false);
1173 }
1174 return (int16_t)(-(1 << res_bits));
1175 }
1176
nrf_saadc_value_max_get(nrf_saadc_resolution_t resolution)1177 NRF_STATIC_INLINE int16_t nrf_saadc_value_max_get(nrf_saadc_resolution_t resolution)
1178 {
1179 uint8_t res_bits = 0;
1180 switch (resolution)
1181 {
1182 case NRF_SAADC_RESOLUTION_8BIT:
1183 res_bits = 8;
1184 break;
1185 case NRF_SAADC_RESOLUTION_10BIT:
1186 res_bits = 10;
1187 break;
1188 case NRF_SAADC_RESOLUTION_12BIT:
1189 res_bits = 12;
1190 break;
1191 case NRF_SAADC_RESOLUTION_14BIT:
1192 res_bits = 14;
1193 break;
1194 default:
1195 NRFX_ASSERT(false);
1196 }
1197 return (int16_t)((1 << res_bits) - 1);
1198 }
1199
1200 #endif // NRF_DECLARE_ONLY
1201
1202 /** @} */
1203
1204 #ifdef __cplusplus
1205 }
1206 #endif
1207
1208 #endif // NRF_SAADC_H_
1209
