1 /* 2 3 Copyright (c) 2010 - 2025, Nordic Semiconductor ASA All rights reserved. 4 5 SPDX-License-Identifier: BSD-3-Clause 6 7 Redistribution and use in source and binary forms, with or without 8 modification, are permitted provided that the following conditions are met: 9 10 1. Redistributions of source code must retain the above copyright notice, this 11 list of conditions and the following disclaimer. 12 13 2. Redistributions in binary form must reproduce the above copyright 14 notice, this list of conditions and the following disclaimer in the 15 documentation and/or other materials provided with the distribution. 16 17 3. Neither the name of Nordic Semiconductor ASA nor the names of its 18 contributors may be used to endorse or promote products derived from this 19 software without specific prior written permission. 20 21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE 24 ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE 25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 POSSIBILITY OF SUCH DAMAGE. 32 33 */ 34 35 #ifndef NRF7120_ENGA_LMAC_H 36 #define NRF7120_ENGA_LMAC_H 37 38 #ifdef __cplusplus 39 extern "C" { 40 #endif 41 42 43 #ifdef NRF_LMAC /*!< Processor information is domain local. */ 44 45 46 /* =========================================================================================================================== */ 47 /* ================ Interrupt Number Definition ================ */ 48 /* =========================================================================================================================== */ 49 50 typedef enum { 51 /* ===================================================== Core Interrupts ===================================================== */ 52 /* ============================================== Processor Specific Interrupts ============================================== */ 53 VPRCLIC_16_IRQn = 16, /*!< 16 VPRCLIC_16 */ 54 VPRCLIC_17_IRQn = 17, /*!< 17 VPRCLIC_17 */ 55 VPRCLIC_18_IRQn = 18, /*!< 18 VPRCLIC_18 */ 56 VPRCLIC_19_IRQn = 19, /*!< 19 VPRCLIC_19 */ 57 VPRCLIC_20_IRQn = 20, /*!< 20 VPRCLIC_20 */ 58 VPRCLIC_21_IRQn = 21, /*!< 21 VPRCLIC_21 */ 59 VPRCLIC_22_IRQn = 22, /*!< 22 VPRCLIC_22 */ 60 VPRCLIC_23_IRQn = 23, /*!< 23 VPRCLIC_23 */ 61 UMAC_VPR_IRQn = 40, /*!< 40 UMAC_VPR */ 62 MVDMA_IRQn = 48, /*!< 48 MVDMA */ 63 SERIAL00_IRQn = 77, /*!< 77 SERIAL00 */ 64 SERIAL01_IRQn = 93, /*!< 93 SERIAL01 */ 65 SERIAL20_IRQn = 198, /*!< 198 SERIAL20 */ 66 SERIAL21_IRQn = 199, /*!< 199 SERIAL21 */ 67 SERIAL22_IRQn = 200, /*!< 200 SERIAL22 */ 68 GRTC_4_IRQn = 230, /*!< 230 GRTC_4 */ 69 SERIAL23_IRQn = 237, /*!< 237 SERIAL23 */ 70 SERIAL24_IRQn = 238, /*!< 238 SERIAL24 */ 71 SERIAL30_IRQn = 260, /*!< 260 SERIAL30 */ 72 } IRQn_Type; 73 74 /* ==================================================== Interrupt Aliases ==================================================== */ 75 #define SPIM00_IRQn SERIAL00_IRQn 76 #define SPIM00_IRQHandler SERIAL00_IRQHandler 77 #define SPIS00_IRQn SERIAL00_IRQn 78 #define SPIS00_IRQHandler SERIAL00_IRQHandler 79 #define UARTE00_IRQn SERIAL00_IRQn 80 #define UARTE00_IRQHandler SERIAL00_IRQHandler 81 #define SPIM01_IRQn SERIAL01_IRQn 82 #define SPIM01_IRQHandler SERIAL01_IRQHandler 83 #define SPIS01_IRQn SERIAL01_IRQn 84 #define SPIS01_IRQHandler SERIAL01_IRQHandler 85 #define UARTE01_IRQn SERIAL01_IRQn 86 #define UARTE01_IRQHandler SERIAL01_IRQHandler 87 #define SPIM20_IRQn SERIAL20_IRQn 88 #define SPIM20_IRQHandler SERIAL20_IRQHandler 89 #define SPIS20_IRQn SERIAL20_IRQn 90 #define SPIS20_IRQHandler SERIAL20_IRQHandler 91 #define TWIM20_IRQn SERIAL20_IRQn 92 #define TWIM20_IRQHandler SERIAL20_IRQHandler 93 #define TWIS20_IRQn SERIAL20_IRQn 94 #define TWIS20_IRQHandler SERIAL20_IRQHandler 95 #define UARTE20_IRQn SERIAL20_IRQn 96 #define UARTE20_IRQHandler SERIAL20_IRQHandler 97 #define SPIM21_IRQn SERIAL21_IRQn 98 #define SPIM21_IRQHandler SERIAL21_IRQHandler 99 #define SPIS21_IRQn SERIAL21_IRQn 100 #define SPIS21_IRQHandler SERIAL21_IRQHandler 101 #define TWIM21_IRQn SERIAL21_IRQn 102 #define TWIM21_IRQHandler SERIAL21_IRQHandler 103 #define TWIS21_IRQn SERIAL21_IRQn 104 #define TWIS21_IRQHandler SERIAL21_IRQHandler 105 #define UARTE21_IRQn SERIAL21_IRQn 106 #define UARTE21_IRQHandler SERIAL21_IRQHandler 107 #define SPIM22_IRQn SERIAL22_IRQn 108 #define SPIM22_IRQHandler SERIAL22_IRQHandler 109 #define SPIS22_IRQn SERIAL22_IRQn 110 #define SPIS22_IRQHandler SERIAL22_IRQHandler 111 #define TWIM22_IRQn SERIAL22_IRQn 112 #define TWIM22_IRQHandler SERIAL22_IRQHandler 113 #define TWIS22_IRQn SERIAL22_IRQn 114 #define TWIS22_IRQHandler SERIAL22_IRQHandler 115 #define UARTE22_IRQn SERIAL22_IRQn 116 #define UARTE22_IRQHandler SERIAL22_IRQHandler 117 #define SPIM23_IRQn SERIAL23_IRQn 118 #define SPIM23_IRQHandler SERIAL23_IRQHandler 119 #define SPIS23_IRQn SERIAL23_IRQn 120 #define SPIS23_IRQHandler SERIAL23_IRQHandler 121 #define TWIM23_IRQn SERIAL23_IRQn 122 #define TWIM23_IRQHandler SERIAL23_IRQHandler 123 #define TWIS23_IRQn SERIAL23_IRQn 124 #define TWIS23_IRQHandler SERIAL23_IRQHandler 125 #define UARTE23_IRQn SERIAL23_IRQn 126 #define UARTE23_IRQHandler SERIAL23_IRQHandler 127 #define SPIM24_IRQn SERIAL24_IRQn 128 #define SPIM24_IRQHandler SERIAL24_IRQHandler 129 #define SPIS24_IRQn SERIAL24_IRQn 130 #define SPIS24_IRQHandler SERIAL24_IRQHandler 131 #define TWIM24_IRQn SERIAL24_IRQn 132 #define TWIM24_IRQHandler SERIAL24_IRQHandler 133 #define TWIS24_IRQn SERIAL24_IRQn 134 #define TWIS24_IRQHandler SERIAL24_IRQHandler 135 #define UARTE24_IRQn SERIAL24_IRQn 136 #define UARTE24_IRQHandler SERIAL24_IRQHandler 137 #define SPIM30_IRQn SERIAL30_IRQn 138 #define SPIM30_IRQHandler SERIAL30_IRQHandler 139 #define SPIS30_IRQn SERIAL30_IRQn 140 #define SPIS30_IRQHandler SERIAL30_IRQHandler 141 #define TWIM30_IRQn SERIAL30_IRQn 142 #define TWIM30_IRQHandler SERIAL30_IRQHandler 143 #define TWIS30_IRQn SERIAL30_IRQn 144 #define TWIS30_IRQHandler SERIAL30_IRQHandler 145 #define UARTE30_IRQn SERIAL30_IRQn 146 #define UARTE30_IRQHandler SERIAL30_IRQHandler 147 148 /* =========================================================================================================================== */ 149 /* ================ Processor and Core Peripheral Section ================ */ 150 /* =========================================================================================================================== */ 151 152 /* ====================== Configuration of the Nordic Semiconductor VPR Processor and Core Peripherals ======================= */ 153 #define __VPR_REV 1.4 /*!< VPR Core Revision */ 154 #define __VPR_REV_MAJOR 1 /*!< VPR Core Major Revision */ 155 #define __VPR_REV_MINOR 4 /*!< VPR Core Minor Revision */ 156 #define __VPR_REV_PATCH 0 /*!< VPR Core Patch Revision */ 157 #define __DSP_PRESENT 0 /*!< DSP present or not */ 158 #define __CLIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */ 159 #define __MTVT_PRESENT 1 /*!< CPU supports alternate Vector Table address */ 160 #define __MPU_PRESENT 1 /*!< MPU present */ 161 #define __FPU_PRESENT 0 /*!< FPU present */ 162 #define __FPU_DP 0 /*!< Double Precision FPU */ 163 #define __INTERRUPTS_MAX 480 /*!< Size of interrupt vector table */ 164 165 #define NRF_VPR NRF_WIFICORE_VPRLMAC /*!< VPR instance name */ 166 #include "core_vpr.h" /*!< Nordic Semiconductor VPR processor and core peripherals */ 167 #include "system_nrf.h" /*!< nrf7120_enga_lmac System Library */ 168 169 #endif /*!< NRF_LMAC */ 170 171 172 #ifdef NRF_LMAC 173 174 #define NRF_DOMAIN NRF_DOMAIN_WIFICORE 175 #define NRF_PROCESSOR NRF_PROCESSOR_LMAC 176 #define NRF_OWNER NRF_OWNER_APPLICATION 177 178 #endif /*!< NRF_LMAC */ 179 180 181 /* ========================================= Start of section using anonymous unions ========================================= */ 182 183 #include "compiler_abstraction.h" 184 185 #if defined (__CC_ARM) 186 #pragma push 187 #pragma anon_unions 188 #elif defined (__ICCARM__) 189 #pragma language=extended 190 #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 191 #pragma clang diagnostic push 192 #pragma clang diagnostic ignored "-Wc11-extensions" 193 #pragma clang diagnostic ignored "-Wreserved-id-macro" 194 #pragma clang diagnostic ignored "-Wgnu-anonymous-struct" 195 #pragma clang diagnostic ignored "-Wnested-anon-types" 196 #elif defined (__GNUC__) 197 /* anonymous unions are enabled by default */ 198 #elif defined (__TMS470__) 199 /* anonymous unions are enabled by default */ 200 #elif defined (__TASKING__) 201 #pragma warning 586 202 #elif defined (__CSMC__) 203 /* anonymous unions are enabled by default */ 204 #else 205 #warning Unsupported compiler type 206 #endif 207 208 /* =========================================================================================================================== */ 209 /* ================ Peripheral Address Map ================ */ 210 /* =========================================================================================================================== */ 211 212 #define NRF_LMAC_VPRCLIC_BASE 0xF0000000UL 213 214 /* =========================================================================================================================== */ 215 /* ================ Peripheral Declaration ================ */ 216 /* =========================================================================================================================== */ 217 218 #define NRF_LMAC_VPRCLIC ((NRF_CLIC_Type*) NRF_LMAC_VPRCLIC_BASE) 219 220 /* =========================================================================================================================== */ 221 /* ================ Local Domain Remapping ================ */ 222 /* =========================================================================================================================== */ 223 224 #ifdef NRF_LMAC /*!< Remap NRF_DOMAIN_X instances to NRF_X symbol for ease of use. */ 225 #define NRF_VPRCLIC NRF_LMAC_VPRCLIC 226 #endif /*!< NRF_LMAC */ 227 228 /* ========================================== End of section using anonymous unions ========================================== */ 229 230 #if defined (__CC_ARM) 231 #pragma pop 232 #elif defined (__ICCARM__) 233 /* leave anonymous unions enabled */ 234 #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 235 #pragma clang diagnostic pop 236 #elif defined (__GNUC__) 237 /* anonymous unions are enabled by default */ 238 #elif defined (__TMS470__) 239 /* anonymous unions are enabled by default */ 240 #elif defined (__TASKING__) 241 #pragma warning restore 242 #elif defined (__CSMC__) 243 /* anonymous unions are enabled by default */ 244 #endif 245 246 247 #ifdef __cplusplus 248 } 249 #endif 250 #endif /* NRF7120_ENGA_LMAC_H */ 251 252
