1 /* 2 3 Copyright (c) 2010 - 2025, Nordic Semiconductor ASA All rights reserved. 4 5 SPDX-License-Identifier: BSD-3-Clause 6 7 Redistribution and use in source and binary forms, with or without 8 modification, are permitted provided that the following conditions are met: 9 10 1. Redistributions of source code must retain the above copyright notice, this 11 list of conditions and the following disclaimer. 12 13 2. Redistributions in binary form must reproduce the above copyright 14 notice, this list of conditions and the following disclaimer in the 15 documentation and/or other materials provided with the distribution. 16 17 3. Neither the name of Nordic Semiconductor ASA nor the names of its 18 contributors may be used to endorse or promote products derived from this 19 software without specific prior written permission. 20 21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE 24 ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE 25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 POSSIBILITY OF SUCH DAMAGE. 32 33 */ 34 35 #ifndef NRF7120_ENGA_INTERIM_H__ 36 #define NRF7120_ENGA_INTERIM_H__ 37 38 #if defined(NRF7120_ENGA_XXAA) 39 40 41 #define EASYVDMA_PRESENT 42 43 #define EGU00_CH_NUM EGU00_CH_NUM_SIZE 44 #define EGU10_CH_NUM EGU10_CH_NUM_SIZE 45 #define EGU20_CH_NUM EGU20_CH_NUM_SIZE 46 47 #define TIMER00_CC_NUM TIMER00_CC_NUM_SIZE 48 #define TIMER10_CC_NUM TIMER10_CC_NUM_SIZE 49 #define TIMER20_CC_NUM TIMER20_CC_NUM_SIZE 50 #define TIMER21_CC_NUM TIMER21_CC_NUM_SIZE 51 #define TIMER22_CC_NUM TIMER22_CC_NUM_SIZE 52 #define TIMER23_CC_NUM TIMER23_CC_NUM_SIZE 53 #define TIMER24_CC_NUM TIMER24_CC_NUM_SIZE 54 55 #define TIMER00_MAX_SIZE TIMER00_MAX_SIZE_SIZE 56 #define TIMER10_MAX_SIZE TIMER10_MAX_SIZE_SIZE 57 #define TIMER20_MAX_SIZE TIMER20_MAX_SIZE_SIZE 58 #define TIMER21_MAX_SIZE TIMER21_MAX_SIZE_SIZE 59 #define TIMER22_MAX_SIZE TIMER22_MAX_SIZE_SIZE 60 #define TIMER23_MAX_SIZE TIMER23_MAX_SIZE_SIZE 61 #define TIMER24_MAX_SIZE TIMER24_MAX_SIZE_SIZE 62 63 #define LPCOMP_REFSEL_RESOLUTION 16 64 65 #define MPC_MASTER_PORTS_MaxCount (12UL) /*!< Max number of master ports. */ 66 67 #define NRF_DOMAIN_COUNT (NRF_DOMAIN_SYSTEM + 1) 68 #define SAADC_CH_NUM SAADC_CH_MaxCount 69 70 #define PPIB_CHANNEL_MAX_COUNT 24UL 71 72 #define PPIB00_CH_NUM 8 73 #define PPIB10_CH_NUM 8 74 #define PPIB11_CH_NUM 16 75 #define PPIB21_CH_NUM 16 76 #define PPIB22_CH_NUM 4 77 #define PPIB30_CH_NUM 4 78 #define PPIB20_CH_NUM 8 79 #define PPIB01_CH_NUM 8 80 81 #if defined(NRF_FLPR) 82 #define GRTC_IRQ_GROUP 0 83 #define GPIOTE_IRQ_GROUP 0 84 #elif defined(NRF_APPLICATION) 85 #if defined(NRF_TRUSTZONE_NONSECURE) 86 #define GPIOTE_IRQ_GROUP 0 87 #define GRTC_IRQ_GROUP 1 88 #else 89 #define GPIOTE_IRQ_GROUP 1 90 #define GRTC_IRQ_GROUP 2 91 #endif 92 #endif 93 94 #define GPIOTE20_CH_NUM GPIOTE20_GPIOTE_NCHANNELS_SIZE 95 #define GPIOTE30_CH_NUM GPIOTE30_GPIOTE_NCHANNELS_SIZE 96 97 #define GPIOTE_CH_NUM 8 98 #define GPIOTE20_AVAILABLE_GPIO_PORTS 0x2UL 99 #define GPIOTE30_AVAILABLE_GPIO_PORTS 0x1UL 100 #define GPIOTE_FEATURE_SET_PRESENT 101 #define GPIOTE_FEATURE_CLR_PRESENT 102 #define GPIOTE_PORT_NUM GPIOTE_EVENTS_PORT_MaxCount 103 104 #define DPPI_PRESENT DPPIC_PRESENT 105 106 #define DPPIC00_CH_NUM DPPIC00_CH_NUM_SIZE 107 #define DPPIC10_CH_NUM DPPIC10_CH_NUM_SIZE 108 #define DPPIC20_CH_NUM DPPIC20_CH_NUM_SIZE 109 #define DPPIC30_CH_NUM DPPIC30_CH_NUM_SIZE 110 111 #define DPPIC00_GROUP_NUM DPPIC00_GROUP_NUM_SIZE 112 #define DPPIC10_GROUP_NUM DPPIC10_GROUP_NUM_SIZE 113 #define DPPIC20_GROUP_NUM DPPIC20_GROUP_NUM_SIZE 114 #define DPPIC30_GROUP_NUM DPPIC30_GROUP_NUM_SIZE 115 116 #define P0_PIN_NUM P0_PIN_NUM_SIZE 117 #define P1_PIN_NUM P1_PIN_NUM_SIZE 118 #define P2_PIN_NUM P2_PIN_NUM_SIZE 119 #define P3_PIN_NUM P3_PIN_NUM_SIZE 120 #define P4_PIN_NUM P4_PIN_NUM_SIZE 121 122 typedef enum 123 { 124 NRF_APB_INDEX_MCU = 1, 125 NRF_APB_INDEX_RADIO = 2, 126 NRF_APB_INDEX_PERI = 3, 127 NRF_APB_INDEX_LP = 4 128 } nrf_apb_index_t; 129 130 #endif 131 132 #endif // NRF7120_ENGA_INTERIM_H__ 133
