1/*
2 * Copyright (c) 2024 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/* This file is common to the secure and non-secure domain */
8
9#include <nordic/nrf54l15_cpuapp.dtsi>
10#include "nrf54l15pdk_nrf54l15-common.dtsi"
11
12/ {
13	chosen {
14		zephyr,console = &uart20;
15		zephyr,shell-uart = &uart20;
16		zephyr,uart-mcumgr = &uart20;
17		zephyr,bt-mon-uart = &uart20;
18		zephyr,bt-c2h-uart = &uart20;
19		zephyr,flash-controller = &rram_controller;
20		zephyr,flash = &cpuapp_rram;
21		zephyr,ieee802154 = &ieee802154;
22	};
23};
24
25&cpuapp_sram {
26	status = "okay";
27};
28
29&lfxo {
30	load-capacitors = "internal";
31	load-capacitance-femtofarad = <15500>;
32};
33
34&hfxo {
35	load-capacitors = "internal";
36	load-capacitance-femtofarad = <15000>;
37};
38
39&grtc {
40	owned-channels = <0 1 2 3 4 5 6 7 8 9 10 11>;
41	/* Channels 7-11 reserved for Zero Latency IRQs, 3-4 for FLPR */
42	child-owned-channels = <3 4 7 8 9 10 11>;
43	status = "okay";
44};
45
46&cpuapp_rram {
47	partitions {
48		compatible = "fixed-partitions";
49		#address-cells = <1>;
50		#size-cells = <1>;
51		boot_partition: partition@0 {
52			label = "mcuboot";
53			reg = <0x0 DT_SIZE_K(64)>;
54		};
55		slot0_partition: partition@10000 {
56			label = "image-0";
57			reg = <0x10000 DT_SIZE_K(324)>;
58		};
59		slot0_ns_partition: partition@61000 {
60			label = "image-0-nonsecure";
61			reg = <0x61000 DT_SIZE_K(324)>;
62		};
63		slot1_partition: partition@b2000 {
64			label = "image-1";
65			reg = <0xb2000 DT_SIZE_K(324)>;
66		};
67		slot1_ns_partition: partition@103000 {
68			label = "image-1-nonsecure";
69			reg = <0x103000 DT_SIZE_K(324)>;
70		};
71		/* 32k from 0x154000 to 0x15bfff reserved for TF-M partitions */
72		storage_partition: partition@15c000 {
73			label = "storage";
74			reg = <0x15c000 DT_SIZE_K(36)>;
75		};
76	};
77};
78
79&uart20 {
80	status = "okay";
81	hw-flow-control;
82};
83
84&gpio0 {
85	status = "okay";
86};
87
88&gpio1 {
89	status = "okay";
90};
91
92&gpio2 {
93	status = "okay";
94};
95
96&gpiote20 {
97	status = "okay";
98};
99
100&gpiote30 {
101	status = "okay";
102};
103
104&radio {
105	status = "okay";
106};
107
108&ieee802154 {
109	status = "okay";
110};
111
112&temp {
113	status = "okay";
114};
115
116&clock {
117	status = "okay";
118};
119
120&spi00 {
121	status = "okay";
122	cs-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
123	pinctrl-0 = <&spi00_default>;
124	pinctrl-1 = <&spi00_sleep>;
125	pinctrl-names = "default", "sleep";
126
127	mx25r64: mx25r6435f@0 {
128		compatible = "jedec,spi-nor";
129		status = "disabled";
130		reg = <0>;
131		spi-max-frequency = <8000000>;
132		jedec-id = [c2 28 17];
133		sfdp-bfp = [
134			e5 20 f1 ff  ff ff ff 03  44 eb 08 6b  08 3b 04 bb
135			ee ff ff ff  ff ff 00 ff  ff ff 00 ff  0c 20 0f 52
136			10 d8 00 ff  23 72 f5 00  82 ed 04 cc  44 83 48 44
137			30 b0 30 b0  f7 c4 d5 5c  00 be 29 ff  f0 d0 ff ff
138		];
139		size = <67108864>;
140		has-dpd;
141		t-enter-dpd = <10000>;
142		t-exit-dpd = <35000>;
143	};
144};
145
146&adc {
147	status = "okay";
148};
149