1 /* 2 3 Copyright (c) 2010 - 2025, Nordic Semiconductor ASA All rights reserved. 4 5 SPDX-License-Identifier: BSD-3-Clause 6 7 Redistribution and use in source and binary forms, with or without 8 modification, are permitted provided that the following conditions are met: 9 10 1. Redistributions of source code must retain the above copyright notice, this 11 list of conditions and the following disclaimer. 12 13 2. Redistributions in binary form must reproduce the above copyright 14 notice, this list of conditions and the following disclaimer in the 15 documentation and/or other materials provided with the distribution. 16 17 3. Neither the name of Nordic Semiconductor ASA nor the names of its 18 contributors may be used to endorse or promote products derived from this 19 software without specific prior written permission. 20 21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE 24 ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE 25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 POSSIBILITY OF SUCH DAMAGE. 32 33 */ 34 35 #ifndef NRF54H20_PPR_H 36 #define NRF54H20_PPR_H 37 38 #ifdef __cplusplus 39 extern "C" { 40 #endif 41 42 43 #ifdef NRF_PPR /*!< Processor information is domain local. */ 44 45 46 /* =========================================================================================================================== */ 47 /* ================ Interrupt Number Definition ================ */ 48 /* =========================================================================================================================== */ 49 50 typedef enum { 51 /* ===================================================== Core Interrupts ===================================================== */ 52 /* ============================================== Processor Specific Interrupts ============================================== */ 53 VPRCLIC_0_IRQn = 0, /*!< 0 VPRCLIC_0 */ 54 VPRCLIC_1_IRQn = 1, /*!< 1 VPRCLIC_1 */ 55 VPRCLIC_2_IRQn = 2, /*!< 2 VPRCLIC_2 */ 56 VPRCLIC_3_IRQn = 3, /*!< 3 VPRCLIC_3 */ 57 VPRCLIC_4_IRQn = 4, /*!< 4 VPRCLIC_4 */ 58 VPRCLIC_5_IRQn = 5, /*!< 5 VPRCLIC_5 */ 59 VPRCLIC_6_IRQn = 6, /*!< 6 VPRCLIC_6 */ 60 VPRCLIC_7_IRQn = 7, /*!< 7 VPRCLIC_7 */ 61 VPRCLIC_8_IRQn = 8, /*!< 8 VPRCLIC_8 */ 62 VPRCLIC_9_IRQn = 9, /*!< 9 VPRCLIC_9 */ 63 VPRCLIC_10_IRQn = 10, /*!< 10 VPRCLIC_10 */ 64 VPRCLIC_11_IRQn = 11, /*!< 11 VPRCLIC_11 */ 65 VPRCLIC_12_IRQn = 12, /*!< 12 VPRCLIC_12 */ 66 VPRCLIC_13_IRQn = 13, /*!< 13 VPRCLIC_13 */ 67 VPRCLIC_14_IRQn = 14, /*!< 14 VPRCLIC_14 */ 68 VPRCLIC_15_IRQn = 15, /*!< 15 VPRCLIC_15 */ 69 VPRTIM_IRQn = 16, /*!< 16 VPRTIM */ 70 GPIOTE130_0_IRQn = 104, /*!< 104 GPIOTE130_0 */ 71 GPIOTE130_1_IRQn = 105, /*!< 105 GPIOTE130_1 */ 72 GRTC_0_IRQn = 108, /*!< 108 GRTC_0 */ 73 GRTC_1_IRQn = 109, /*!< 109 GRTC_1 */ 74 GRTC_2_IRQn = 110, /*!< 110 GRTC_2 */ 75 TBM_IRQn = 127, /*!< 127 TBM */ 76 USBHS_IRQn = 134, /*!< 134 USBHS */ 77 EXMIF_IRQn = 149, /*!< 149 EXMIF */ 78 IPCT120_0_IRQn = 209, /*!< 209 IPCT120_0 */ 79 I3C120_IRQn = 211, /*!< 211 I3C120 */ 80 VPR121_IRQn = 212, /*!< 212 VPR121 */ 81 CAN120_IRQn = 216, /*!< 216 CAN120 */ 82 MVDMA120_IRQn = 217, /*!< 217 MVDMA120 */ 83 I3C121_IRQn = 222, /*!< 222 I3C121 */ 84 TIMER120_IRQn = 226, /*!< 226 TIMER120 */ 85 TIMER121_IRQn = 227, /*!< 227 TIMER121 */ 86 PWM120_IRQn = 228, /*!< 228 PWM120 */ 87 SPIS120_IRQn = 229, /*!< 229 SPIS120 */ 88 SPIM120_UARTE120_IRQn = 230, /*!< 230 SPIM120_UARTE120 */ 89 SPIM121_IRQn = 231, /*!< 231 SPIM121 */ 90 VPR130_IRQn = 264, /*!< 264 VPR130 */ 91 IPCT130_0_IRQn = 289, /*!< 289 IPCT130_0 */ 92 RTC130_IRQn = 296, /*!< 296 RTC130 */ 93 RTC131_IRQn = 297, /*!< 297 RTC131 */ 94 WDT131_IRQn = 299, /*!< 299 WDT131 */ 95 WDT132_IRQn = 300, /*!< 300 WDT132 */ 96 EGU130_IRQn = 301, /*!< 301 EGU130 */ 97 SAADC_IRQn = 386, /*!< 386 SAADC */ 98 COMP_LPCOMP_IRQn = 387, /*!< 387 COMP_LPCOMP */ 99 TEMP_IRQn = 388, /*!< 388 TEMP */ 100 NFCT_IRQn = 389, /*!< 389 NFCT */ 101 TDM130_IRQn = 402, /*!< 402 TDM130 */ 102 PDM_IRQn = 403, /*!< 403 PDM */ 103 QDEC130_IRQn = 404, /*!< 404 QDEC130 */ 104 QDEC131_IRQn = 405, /*!< 405 QDEC131 */ 105 TDM131_IRQn = 407, /*!< 407 TDM131 */ 106 TIMER130_IRQn = 418, /*!< 418 TIMER130 */ 107 TIMER131_IRQn = 419, /*!< 419 TIMER131 */ 108 PWM130_IRQn = 420, /*!< 420 PWM130 */ 109 SERIAL0_IRQn = 421, /*!< 421 SERIAL0 */ 110 SERIAL1_IRQn = 422, /*!< 422 SERIAL1 */ 111 TIMER132_IRQn = 434, /*!< 434 TIMER132 */ 112 TIMER133_IRQn = 435, /*!< 435 TIMER133 */ 113 PWM131_IRQn = 436, /*!< 436 PWM131 */ 114 SERIAL2_IRQn = 437, /*!< 437 SERIAL2 */ 115 SERIAL3_IRQn = 438, /*!< 438 SERIAL3 */ 116 TIMER134_IRQn = 450, /*!< 450 TIMER134 */ 117 TIMER135_IRQn = 451, /*!< 451 TIMER135 */ 118 PWM132_IRQn = 452, /*!< 452 PWM132 */ 119 SERIAL4_IRQn = 453, /*!< 453 SERIAL4 */ 120 SERIAL5_IRQn = 454, /*!< 454 SERIAL5 */ 121 TIMER136_IRQn = 466, /*!< 466 TIMER136 */ 122 TIMER137_IRQn = 467, /*!< 467 TIMER137 */ 123 PWM133_IRQn = 468, /*!< 468 PWM133 */ 124 SERIAL6_IRQn = 469, /*!< 469 SERIAL6 */ 125 SERIAL7_IRQn = 470, /*!< 470 SERIAL7 */ 126 } IRQn_Type; 127 128 /* ==================================================== Interrupt Aliases ==================================================== */ 129 #define SPIM120_IRQn SPIM120_UARTE120_IRQn 130 #define SPIM120_IRQHandler SPIM120_UARTE120_IRQHandler 131 #define UARTE120_IRQn SPIM120_UARTE120_IRQn 132 #define UARTE120_IRQHandler SPIM120_UARTE120_IRQHandler 133 #define COMP_IRQn COMP_LPCOMP_IRQn 134 #define COMP_IRQHandler COMP_LPCOMP_IRQHandler 135 #define LPCOMP_IRQn COMP_LPCOMP_IRQn 136 #define LPCOMP_IRQHandler COMP_LPCOMP_IRQHandler 137 #define SPIM130_IRQn SERIAL0_IRQn 138 #define SPIM130_IRQHandler SERIAL0_IRQHandler 139 #define SPIS130_IRQn SERIAL0_IRQn 140 #define SPIS130_IRQHandler SERIAL0_IRQHandler 141 #define TWIM130_IRQn SERIAL0_IRQn 142 #define TWIM130_IRQHandler SERIAL0_IRQHandler 143 #define TWIS130_IRQn SERIAL0_IRQn 144 #define TWIS130_IRQHandler SERIAL0_IRQHandler 145 #define UARTE130_IRQn SERIAL0_IRQn 146 #define UARTE130_IRQHandler SERIAL0_IRQHandler 147 #define SPIM131_IRQn SERIAL1_IRQn 148 #define SPIM131_IRQHandler SERIAL1_IRQHandler 149 #define SPIS131_IRQn SERIAL1_IRQn 150 #define SPIS131_IRQHandler SERIAL1_IRQHandler 151 #define TWIM131_IRQn SERIAL1_IRQn 152 #define TWIM131_IRQHandler SERIAL1_IRQHandler 153 #define TWIS131_IRQn SERIAL1_IRQn 154 #define TWIS131_IRQHandler SERIAL1_IRQHandler 155 #define UARTE131_IRQn SERIAL1_IRQn 156 #define UARTE131_IRQHandler SERIAL1_IRQHandler 157 #define SPIM132_IRQn SERIAL2_IRQn 158 #define SPIM132_IRQHandler SERIAL2_IRQHandler 159 #define SPIS132_IRQn SERIAL2_IRQn 160 #define SPIS132_IRQHandler SERIAL2_IRQHandler 161 #define TWIM132_IRQn SERIAL2_IRQn 162 #define TWIM132_IRQHandler SERIAL2_IRQHandler 163 #define TWIS132_IRQn SERIAL2_IRQn 164 #define TWIS132_IRQHandler SERIAL2_IRQHandler 165 #define UARTE132_IRQn SERIAL2_IRQn 166 #define UARTE132_IRQHandler SERIAL2_IRQHandler 167 #define SPIM133_IRQn SERIAL3_IRQn 168 #define SPIM133_IRQHandler SERIAL3_IRQHandler 169 #define SPIS133_IRQn SERIAL3_IRQn 170 #define SPIS133_IRQHandler SERIAL3_IRQHandler 171 #define TWIM133_IRQn SERIAL3_IRQn 172 #define TWIM133_IRQHandler SERIAL3_IRQHandler 173 #define TWIS133_IRQn SERIAL3_IRQn 174 #define TWIS133_IRQHandler SERIAL3_IRQHandler 175 #define UARTE133_IRQn SERIAL3_IRQn 176 #define UARTE133_IRQHandler SERIAL3_IRQHandler 177 #define SPIM134_IRQn SERIAL4_IRQn 178 #define SPIM134_IRQHandler SERIAL4_IRQHandler 179 #define SPIS134_IRQn SERIAL4_IRQn 180 #define SPIS134_IRQHandler SERIAL4_IRQHandler 181 #define TWIM134_IRQn SERIAL4_IRQn 182 #define TWIM134_IRQHandler SERIAL4_IRQHandler 183 #define TWIS134_IRQn SERIAL4_IRQn 184 #define TWIS134_IRQHandler SERIAL4_IRQHandler 185 #define UARTE134_IRQn SERIAL4_IRQn 186 #define UARTE134_IRQHandler SERIAL4_IRQHandler 187 #define SPIM135_IRQn SERIAL5_IRQn 188 #define SPIM135_IRQHandler SERIAL5_IRQHandler 189 #define SPIS135_IRQn SERIAL5_IRQn 190 #define SPIS135_IRQHandler SERIAL5_IRQHandler 191 #define TWIM135_IRQn SERIAL5_IRQn 192 #define TWIM135_IRQHandler SERIAL5_IRQHandler 193 #define TWIS135_IRQn SERIAL5_IRQn 194 #define TWIS135_IRQHandler SERIAL5_IRQHandler 195 #define UARTE135_IRQn SERIAL5_IRQn 196 #define UARTE135_IRQHandler SERIAL5_IRQHandler 197 #define SPIM136_IRQn SERIAL6_IRQn 198 #define SPIM136_IRQHandler SERIAL6_IRQHandler 199 #define SPIS136_IRQn SERIAL6_IRQn 200 #define SPIS136_IRQHandler SERIAL6_IRQHandler 201 #define TWIM136_IRQn SERIAL6_IRQn 202 #define TWIM136_IRQHandler SERIAL6_IRQHandler 203 #define TWIS136_IRQn SERIAL6_IRQn 204 #define TWIS136_IRQHandler SERIAL6_IRQHandler 205 #define UARTE136_IRQn SERIAL6_IRQn 206 #define UARTE136_IRQHandler SERIAL6_IRQHandler 207 #define SPIM137_IRQn SERIAL7_IRQn 208 #define SPIM137_IRQHandler SERIAL7_IRQHandler 209 #define SPIS137_IRQn SERIAL7_IRQn 210 #define SPIS137_IRQHandler SERIAL7_IRQHandler 211 #define TWIM137_IRQn SERIAL7_IRQn 212 #define TWIM137_IRQHandler SERIAL7_IRQHandler 213 #define TWIS137_IRQn SERIAL7_IRQn 214 #define TWIS137_IRQHandler SERIAL7_IRQHandler 215 #define UARTE137_IRQn SERIAL7_IRQn 216 #define UARTE137_IRQHandler SERIAL7_IRQHandler 217 218 /* =========================================================================================================================== */ 219 /* ================ Processor and Core Peripheral Section ================ */ 220 /* =========================================================================================================================== */ 221 222 /* ====================== Configuration of the Nordic Semiconductor VPR Processor and Core Peripherals ======================= */ 223 #define __VPR_REV 1.1 /*!< VPR Core Revision */ 224 #define __VPR_REV_MAJOR 1 /*!< VPR Core Major Revision */ 225 #define __VPR_REV_MINOR 1 /*!< VPR Core Minor Revision */ 226 #define __VPR_REV_PATCH 0 /*!< VPR Core Patch Revision */ 227 #define __DSP_PRESENT 0 /*!< DSP present or not */ 228 #define __CLIC_PRIO_BITS 3 /*!< Number of Bits used for Priority Levels */ 229 #define __MTVT_PRESENT 1 /*!< CPU supports alternate Vector Table address */ 230 #define __MPU_PRESENT 1 /*!< MPU present */ 231 #define __FPU_PRESENT 0 /*!< FPU present */ 232 #define __FPU_DP 0 /*!< Double Precision FPU */ 233 #define __INTERRUPTS_MAX 480 /*!< Size of interrupt vector table */ 234 235 #define NRF_VPR NRF_VPR130 /*!< VPR instance name */ 236 #include "core_vpr.h" /*!< Nordic Semiconductor VPR processor and core peripherals */ 237 #include "system_nrf.h" /*!< nrf54h20_ppr System Library */ 238 239 #endif /*!< NRF_PPR */ 240 241 242 #ifdef NRF_PPR 243 244 #define NRF_DOMAIN NRF_DOMAIN_GLOBALSLOW 245 #define NRF_PROCESSOR NRF_PROCESSOR_PPR 246 #ifndef NRF_OWNER 247 #define NRF_OWNER NRF_OWNER_APPLICATION 248 #endif 249 250 #endif /*!< NRF_PPR */ 251 252 253 /* ========================================= Start of section using anonymous unions ========================================= */ 254 255 #include "compiler_abstraction.h" 256 257 #if defined (__CC_ARM) 258 #pragma push 259 #pragma anon_unions 260 #elif defined (__ICCARM__) 261 #pragma language=extended 262 #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 263 #pragma clang diagnostic push 264 #pragma clang diagnostic ignored "-Wc11-extensions" 265 #pragma clang diagnostic ignored "-Wreserved-id-macro" 266 #pragma clang diagnostic ignored "-Wgnu-anonymous-struct" 267 #pragma clang diagnostic ignored "-Wnested-anon-types" 268 #elif defined (__GNUC__) 269 /* anonymous unions are enabled by default */ 270 #elif defined (__TMS470__) 271 /* anonymous unions are enabled by default */ 272 #elif defined (__TASKING__) 273 #pragma warning 586 274 #elif defined (__CSMC__) 275 /* anonymous unions are enabled by default */ 276 #else 277 #warning Unsupported compiler type 278 #endif 279 280 /* =========================================================================================================================== */ 281 /* ================ Peripheral Address Map ================ */ 282 /* =========================================================================================================================== */ 283 284 #define NRF_PPR_VPRCLIC_BASE 0xF0000000UL 285 286 /* =========================================================================================================================== */ 287 /* ================ Peripheral Declaration ================ */ 288 /* =========================================================================================================================== */ 289 290 #define NRF_PPR_VPRCLIC ((NRF_CLIC_Type*) NRF_PPR_VPRCLIC_BASE) 291 292 /* =========================================================================================================================== */ 293 /* ================ Local Domain Remapping ================ */ 294 /* =========================================================================================================================== */ 295 296 #ifdef NRF_PPR /*!< Remap NRF_DOMAIN_X instances to NRF_X symbol for ease of use. */ 297 #define NRF_VPRCLIC NRF_PPR_VPRCLIC 298 #endif /*!< NRF_PPR */ 299 300 /* ========================================== End of section using anonymous unions ========================================== */ 301 302 #if defined (__CC_ARM) 303 #pragma pop 304 #elif defined (__ICCARM__) 305 /* leave anonymous unions enabled */ 306 #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 307 #pragma clang diagnostic pop 308 #elif defined (__GNUC__) 309 /* anonymous unions are enabled by default */ 310 #elif defined (__TMS470__) 311 /* anonymous unions are enabled by default */ 312 #elif defined (__TASKING__) 313 #pragma warning restore 314 #elif defined (__CSMC__) 315 /* anonymous unions are enabled by default */ 316 #endif 317 318 319 #ifdef __cplusplus 320 } 321 #endif 322 #endif /* NRF54H20_PPR_H */ 323 324
