1/*
2 * Copyright (c) 2022 Nordic Semiconductor
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6&pinctrl {
7	uart0_default: uart0_default {
8		group1 {
9			psels = <NRF_PSEL(UART_TX, 1, 1)>,
10				<NRF_PSEL(UART_RTS, 0, 11)>;
11		};
12		group2 {
13			psels = <NRF_PSEL(UART_RX, 1, 0)>,
14				<NRF_PSEL(UART_CTS, 0, 10)>;
15			bias-pull-up;
16		};
17	};
18
19	uart0_sleep: uart0_sleep {
20		group1 {
21			psels = <NRF_PSEL(UART_TX, 1, 1)>,
22				<NRF_PSEL(UART_RX, 1, 0)>,
23				<NRF_PSEL(UART_RTS, 0, 11)>,
24				<NRF_PSEL(UART_CTS, 0, 10)>;
25			low-power-enable;
26		};
27	};
28
29	i2c0_default: i2c0_default {
30		group1 {
31			psels = <NRF_PSEL(TWIM_SDA, 1, 2)>,
32				<NRF_PSEL(TWIM_SCL, 1, 3)>;
33		};
34	};
35
36	i2c0_sleep: i2c0_sleep {
37		group1 {
38			psels = <NRF_PSEL(TWIM_SDA, 1, 2)>,
39				<NRF_PSEL(TWIM_SCL, 1, 3)>;
40			low-power-enable;
41		};
42	};
43
44	spi0_default: spi0_default {
45		group1 {
46			psels = <NRF_PSEL(SPIM_SCK, 1, 15)>,
47				<NRF_PSEL(SPIM_MISO, 1, 14)>,
48				<NRF_PSEL(SPIM_MOSI, 1, 13)>;
49		};
50	};
51
52	spi0_sleep: spi0_sleep {
53		group1 {
54			psels = <NRF_PSEL(SPIM_SCK, 1, 15)>,
55				<NRF_PSEL(SPIM_MISO, 1, 14)>,
56				<NRF_PSEL(SPIM_MOSI, 1, 13)>;
57			low-power-enable;
58		};
59	};
60
61};
62