1/* 2 * Copyright (c) 2022 Nordic Semiconductor 3 * SPDX-License-Identifier: Apache-2.0 4 */ 5 6&pinctrl { 7 i2c1_default: i2c1_default { 8 group1 { 9 psels = <NRF_PSEL(TWIM_SDA, 1, 2)>, 10 <NRF_PSEL(TWIM_SCL, 1, 3)>; 11 }; 12 }; 13 14 i2c1_sleep: i2c1_sleep { 15 group1 { 16 psels = <NRF_PSEL(TWIM_SDA, 1, 2)>, 17 <NRF_PSEL(TWIM_SCL, 1, 3)>; 18 low-power-enable; 19 }; 20 }; 21 22 uart0_default: uart0_default { 23 group1 { 24 psels = <NRF_PSEL(UART_TX, 0, 20)>, 25 <NRF_PSEL(UART_RTS, 0, 19)>; 26 }; 27 group2 { 28 psels = <NRF_PSEL(UART_RX, 0, 22)>, 29 <NRF_PSEL(UART_CTS, 0, 21)>; 30 bias-pull-up; 31 }; 32 }; 33 34 uart0_sleep: uart0_sleep { 35 group1 { 36 psels = <NRF_PSEL(UART_TX, 0, 20)>, 37 <NRF_PSEL(UART_RX, 0, 22)>, 38 <NRF_PSEL(UART_RTS, 0, 19)>, 39 <NRF_PSEL(UART_CTS, 0, 21)>; 40 low-power-enable; 41 }; 42 }; 43 44 pwm0_default: pwm0_default { 45 group1 { 46 psels = <NRF_PSEL(PWM_OUT0, 0, 28)>; 47 }; 48 }; 49 50 pwm0_sleep: pwm0_sleep { 51 group1 { 52 psels = <NRF_PSEL(PWM_OUT0, 0, 28)>; 53 low-power-enable; 54 }; 55 }; 56 57 qspi_default: qspi_default { 58 group1 { 59 psels = <NRF_PSEL(QSPI_SCK, 0, 17)>, 60 <NRF_PSEL(QSPI_IO0, 0, 13)>, 61 <NRF_PSEL(QSPI_IO1, 0, 14)>, 62 <NRF_PSEL(QSPI_IO2, 0, 15)>, 63 <NRF_PSEL(QSPI_IO3, 0, 16)>, 64 <NRF_PSEL(QSPI_CSN, 0, 18)>; 65 nordic,drive-mode = <NRF_DRIVE_H0H1>; 66 }; 67 }; 68 69 qspi_sleep: qspi_sleep { 70 group1 { 71 psels = <NRF_PSEL(QSPI_SCK, 0, 17)>, 72 <NRF_PSEL(QSPI_IO0, 0, 13)>, 73 <NRF_PSEL(QSPI_IO1, 0, 14)>, 74 <NRF_PSEL(QSPI_IO2, 0, 15)>, 75 <NRF_PSEL(QSPI_IO3, 0, 16)>; 76 low-power-enable; 77 }; 78 group2 { 79 psels = <NRF_PSEL(QSPI_CSN, 0, 18)>; 80 low-power-enable; 81 bias-pull-up; 82 }; 83 }; 84 85 uart1_default: uart1_default { 86 group1 { 87 psels = <NRF_PSEL(UART_TX, 1, 1)>, 88 <NRF_PSEL(UART_RTS, 0, 11)>; 89 }; 90 group2 { 91 psels = <NRF_PSEL(UART_RX, 1, 0)>, 92 <NRF_PSEL(UART_CTS, 0, 10)>; 93 bias-pull-up; 94 }; 95 }; 96 97 uart1_sleep: uart1_sleep { 98 group1 { 99 psels = <NRF_PSEL(UART_TX, 1, 1)>, 100 <NRF_PSEL(UART_RX, 1, 0)>, 101 <NRF_PSEL(UART_RTS, 0, 11)>, 102 <NRF_PSEL(UART_CTS, 0, 10)>; 103 low-power-enable; 104 }; 105 }; 106 107 spi4_default: spi4_default { 108 group1 { 109 psels = <NRF_PSEL(SPIM_SCK, 1, 15)>, 110 <NRF_PSEL(SPIM_MISO, 1, 14)>, 111 <NRF_PSEL(SPIM_MOSI, 1, 13)>; 112 }; 113 }; 114 115 spi4_sleep: spi4_sleep { 116 group1 { 117 psels = <NRF_PSEL(SPIM_SCK, 1, 15)>, 118 <NRF_PSEL(SPIM_MISO, 1, 14)>, 119 <NRF_PSEL(SPIM_MOSI, 1, 13)>; 120 low-power-enable; 121 }; 122 }; 123 124}; 125