1/*
2 * Copyright (c) 2022 Nordic Semiconductor
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6&pinctrl {
7	uart0_default: uart0_default {
8		group1 {
9			psels = <NRF_PSEL(UART_TX, 0, 6)>,
10				<NRF_PSEL(UART_RTS, 0, 5)>;
11		};
12		group2 {
13			psels = <NRF_PSEL(UART_RX, 0, 8)>,
14				<NRF_PSEL(UART_CTS, 0, 7)>;
15			bias-pull-up;
16		};
17	};
18
19	uart0_sleep: uart0_sleep {
20		group1 {
21			psels = <NRF_PSEL(UART_TX, 0, 6)>,
22				<NRF_PSEL(UART_RX, 0, 8)>,
23				<NRF_PSEL(UART_RTS, 0, 5)>,
24				<NRF_PSEL(UART_CTS, 0, 7)>;
25			low-power-enable;
26		};
27	};
28
29	i2c0_default: i2c0_default {
30		group1 {
31			psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
32				<NRF_PSEL(TWIM_SCL, 0, 27)>;
33		};
34	};
35
36	i2c0_sleep: i2c0_sleep {
37		group1 {
38			psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
39				<NRF_PSEL(TWIM_SCL, 0, 27)>;
40			low-power-enable;
41		};
42	};
43
44	pwm0_default: pwm0_default {
45		group1 {
46			psels = <NRF_PSEL(PWM_OUT0, 0, 13)>;
47			nordic,invert;
48		};
49	};
50
51	pwm0_sleep: pwm0_sleep {
52		group1 {
53			psels = <NRF_PSEL(PWM_OUT0, 0, 13)>;
54			low-power-enable;
55		};
56	};
57
58	spi0_default: spi0_default {
59		group1 {
60			psels = <NRF_PSEL(SPIM_SCK, 0, 0)>,
61				<NRF_PSEL(SPIM_MOSI, 0, 1)>,
62				<NRF_PSEL(SPIM_MISO, 0, 9)>;
63		};
64	};
65
66	spi0_sleep: spi0_sleep {
67		group1 {
68			psels = <NRF_PSEL(SPIM_SCK, 0, 0)>,
69				<NRF_PSEL(SPIM_MOSI, 0, 1)>,
70				<NRF_PSEL(SPIM_MISO, 0, 9)>;
71			low-power-enable;
72		};
73	};
74
75	spi1_default: spi1_default {
76		group1 {
77			psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
78				<NRF_PSEL(SPIM_MOSI, 0, 20)>,
79				<NRF_PSEL(SPIM_MISO, 0, 22)>;
80		};
81	};
82
83	spi1_sleep: spi1_sleep {
84		group1 {
85			psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
86				<NRF_PSEL(SPIM_MOSI, 0, 20)>,
87				<NRF_PSEL(SPIM_MISO, 0, 22)>;
88			low-power-enable;
89		};
90	};
91
92};
93