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39 /* -------------------------------------------------------------- */
40 /* PROLOG END TAG zYx */
41 #ifdef __SPU__
42 #ifndef _FLOORF4_H_
43 #define _FLOORF4_H_ 1
44
45 #include <spu_intrinsics.h>
46
47
48 /*
49 * FUNCTION
50 * vector float _floorf4(vector float value)
51 *
52 * DESCRIPTION
53 * The _floorf4 routine rounds a vector of input values "value" downwards
54 * to their nearest integer returning the result as a vector of floats.
55 *
56 * The full range form (default) provides floor computation on
57 * all IEEE floating point values. The floor of NANs remain NANs.
58 * The floor of denorms results in zero.
59 *
60 */
_floorf4(vector float value)61 static __inline vector float _floorf4(vector float value)
62 {
63
64 /* FULL FLOATING-POINT RANGE
65 */
66 vec_int4 exp, shift;
67 vec_uint4 mask, frac_mask, addend, insert, pos;
68 vec_float4 out;
69
70 /* This function generates the following component
71 * based upon the inputs.
72 *
73 * mask = bits of the input that need to be replaced.
74 * insert = value of the bits that need to be replaced
75 * addend = value to be added to perform function.
76 *
77 * These are applied as follows:.
78 *
79 * out = ((in & mask) | insert) + addend
80 */
81 pos = spu_cmpgt((vec_int4)value, -1);
82 exp = spu_and(spu_rlmask((vec_int4)value, -23), 0xFF);
83
84 shift = spu_sub(127, exp);
85
86 frac_mask = spu_and(spu_rlmask(spu_splats((unsigned int)0x7FFFFF), shift),
87 spu_cmpgt((vec_int4)shift, -31));
88
89 mask = spu_orc(frac_mask, spu_cmpgt(exp, 126));
90
91 addend = spu_andc(spu_andc(spu_add(mask, 1), pos), spu_cmpeq(spu_and((vec_uint4)value, mask), 0));
92
93 insert = spu_andc(spu_andc(spu_splats((unsigned int)0xBF800000), pos),
94 spu_cmpgt((vec_uint4)spu_add(exp, -1), 126));
95
96 out = (vec_float4)spu_add(spu_sel((vec_uint4)value, insert, mask), addend);
97
98 /* Preserve orignal sign bit (for -0 case)
99 */
100 out = spu_sel(out, value, spu_splats((unsigned int)0x80000000));
101
102 return (out);
103 }
104 #endif /* _FLOORF4_H_ */
105 #endif /* __SPU__ */
106
