1 /*
2 (C) Copyright 2001,2006,
3 International Business Machines Corporation,
4 Sony Computer Entertainment, Incorporated,
5 Toshiba Corporation,
6
7 All rights reserved.
8
9 Redistribution and use in source and binary forms, with or without
10 modification, are permitted provided that the following conditions are met:
11
12 * Redistributions of source code must retain the above copyright notice,
13 this list of conditions and the following disclaimer.
14 * Redistributions in binary form must reproduce the above copyright
15 notice, this list of conditions and the following disclaimer in the
16 documentation and/or other materials provided with the distribution.
17 * Neither the names of the copyright holders nor the names of their
18 contributors may be used to endorse or promote products derived from this
19 software without specific prior written permission.
20
21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
22 IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
24 PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
25 OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
26 EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
27 PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
28 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
29 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
30 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
31 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 /*
35 * Functions to pack/unpack the 128 bit fpscr to/from the 32 bit fenv_t.
36 * The fpscr currently has 32 of 128 bits defined.
37 */
38
39 #ifndef _FEFPSCR_H_
40 #define _FEFPSCR_H_ 1
41
42 #include <spu_intrinsics.h>
43 #include <fenv.h>
44
__unpack_fpscr(fenv_t word)45 static __inline vec_uint4 __unpack_fpscr(fenv_t word)
46 {
47 vec_uint4 fpscr;
48 vec_uchar16 splat = { 0, 1, 0, 1, 0, 1, 0, 1, 2, 3, 2, 3, 2, 3, 2, 3 };
49 vec_short8 rotm = { -12, -9, -3, 0, -10, -7, -3, 0 };
50 vec_uint4 mask = { 0x00000f07, 0x00003f07, 0x00003f07, 0x00000f07 };
51
52 fpscr = spu_promote (word, 0);
53 fpscr = spu_shuffle (fpscr, fpscr, splat);
54 /*
55 * The casts here are important, so we generate different code.
56 */
57 fpscr = (vec_uint4) spu_rlmask ((vec_short8) fpscr, rotm);
58 fpscr = (vec_uint4) spu_and ((vec_short8) fpscr, 0xff);
59 fpscr = spu_or (spu_rlmask(fpscr, -8), fpscr);
60 fpscr = spu_and (fpscr, mask);
61 return fpscr;
62 }
63
__pack_fpscr(vec_uint4 fpscr)64 static __inline fenv_t __pack_fpscr(vec_uint4 fpscr)
65 {
66 vec_uchar16 pat = { 0x80, 2, 0x80, 10, 0x80, 3, 0x80, 11,
67 0x80, 6, 0x80, 14, 0x80, 7, 0x80, 15 };
68 vec_ushort8 shl = { 12, 10, 9, 7, 3, 3, 0, 0 };
69 vec_uint4 mask = { 0x00000f07, 0x00003f07, 0x00003f07, 0x00000f07 };
70 vec_uint4 word;
71
72 word = spu_and (fpscr, mask);
73 word = spu_shuffle (word, word, pat);
74 word = (vec_uint4) spu_sl ((vec_short8) word, shl);
75 word = spu_orx (word);
76 return spu_extract (word, 0);
77 }
78
79 #endif
80
