1 /* Copyright (c) 2011 Tensilica Inc.  ALL RIGHTS RESERVED.
2 
3    Redistribution and use in source and binary forms, with or without
4    modification, are permitted provided that the following conditions
5    are met:
6 
7    1. Redistributions of source code must retain the above copyright
8       notice, this list of conditions and the following disclaimer.
9 
10    2. Redistributions in binary form must reproduce the above
11       copyright notice, this list of conditions and the following
12       disclaimer in the documentation and/or other materials provided
13       with the distribution.
14 
15    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16    "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
18    FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
19    TENSILICA INCORPORATED BE LIABLE FOR ANY DIRECT, INDIRECT,
20    INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21    (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22    SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23    HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24    STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25    ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
26    OF THE POSSIBILITY OF SUCH DAMAGE.  */
27 
28 
29 #ifndef _SYS_FENV_H
30 #define _SYS_FENV_H
31 
32 #include <sys/cdefs.h>
33 
34 #ifdef __cplusplus
35 extern "C" {
36 #endif
37 
38 typedef unsigned long fenv_t;
39 typedef unsigned long fexcept_t;
40 
41 #include <machine/core-isa.h>
42 
43 #if XCHAL_HAVE_FP || XCHAL_HAVE_DFP
44 
45 #define FE_DIVBYZERO   0x08
46 #define FE_INEXACT     0x01
47 #define FE_INVALID     0x10
48 #define FE_OVERFLOW    0x04
49 #define FE_UNDERFLOW   0x02
50 
51 #define FE_ALL_EXCEPT \
52   (FE_DIVBYZERO  |		      \
53    FE_INEXACT    |		      \
54    FE_INVALID    |		      \
55    FE_OVERFLOW   |		      \
56    FE_UNDERFLOW)
57 
58 #define FE_DOWNWARD   0x3
59 #define FE_TONEAREST  0x0
60 #define FE_TOWARDZERO 0x1
61 #define FE_UPWARD     0x2
62 
63 #define _FE_EXCEPTION_FLAGS_OFFSET 7
64 #define _FE_EXCEPTION_FLAG_MASK (FE_ALL_EXCEPT << _FE_EXCEPTION_FLAGS_OFFSET)
65 #define _FE_EXCEPTION_ENABLE_OFFSET 2
66 #define _FE_EXCEPTION_ENABLE_MASK (FE_ALL_EXCEPT << _FE_EXCEPTION_ENABLE_OFFSET)
67 #define _FE_ROUND_MODE_OFFSET 0
68 #define _FE_ROUND_MODE_MASK (0x3 << _FE_ROUND_MODE_OFFSET)
69 #define _FE_FLOATING_ENV_MASK (_FE_EXCEPTION_FLAG_MASK | _FE_EXCEPTION_ENABLE_MASK | _FE_ROUND_MODE_MASK)
70 
71 #endif
72 
73 #if !defined(__declare_fenv_inline) && defined(__declare_extern_inline)
74 #define	__declare_fenv_inline(type) __declare_extern_inline(type)
75 #endif
76 
77 #ifdef __declare_fenv_inline
78 #if XCHAL_HAVE_FP || XCHAL_HAVE_DFP
79 #include <machine/fenv-fp.h>
80 #else
81 #include <machine/fenv-softfloat.h>
82 #endif
83 #endif
84 
85 #ifdef __cplusplus
86 }
87 #endif
88 
89 #endif
90