1 /* Copyright (c) 2011 Tensilica Inc. ALL RIGHTS RESERVED.
2
3 Redistribution and use in source and binary forms, with or without
4 modification, are permitted provided that the following conditions
5 are met:
6
7 1. Redistributions of source code must retain the above copyright
8 notice, this list of conditions and the following disclaimer.
9
10 2. Redistributions in binary form must reproduce the above
11 copyright notice, this list of conditions and the following
12 disclaimer in the documentation and/or other materials provided
13 with the distribution.
14
15 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16 "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
18 FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
19 TENSILICA INCORPORATED BE LIABLE FOR ANY DIRECT, INDIRECT,
20 INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
26 OF THE POSSIBILITY OF SUCH DAMAGE. */
27
feclearexcept(int except)28 __declare_fenv_inline(int) feclearexcept(int except)
29 {
30 unsigned int fsr;
31
32 except <<= _FE_EXCEPTION_FLAGS_OFFSET;
33 __asm__ volatile ("rur.fsr %0" : "=a"(fsr));
34 fsr = fsr & ~except;
35 __asm__ volatile ("wur.fsr %0" : : "a"(fsr));
36 return 0;
37 }
38
fedisableexcept(int excepts)39 __declare_fenv_inline(int) fedisableexcept(int excepts)
40 {
41 fexcept_t current;
42 __asm__ volatile ("rur.fcr %0" : "=a"(current));
43 current &= ~(excepts << _FE_EXCEPTION_ENABLE_OFFSET);
44 __asm__ volatile ("wur.fcr %0" : "=a"(current));
45 return 0;
46 }
47
feenableexcept(int excepts)48 __declare_fenv_inline(int) feenableexcept(int excepts)
49 {
50 fexcept_t current;
51 __asm__ volatile ("rur.fcr %0" : "=a"(current));
52 current |= excepts << _FE_EXCEPTION_ENABLE_OFFSET;
53 __asm__ volatile ("wur.fcr %0" : "=a"(current));
54 return 0;
55 }
56
fegetenv(fenv_t * env_ptr)57 __declare_fenv_inline(int) fegetenv(fenv_t * env_ptr)
58 {
59 unsigned int fsr;
60 unsigned int fcr;
61 __asm__ volatile ("rur.fsr %0" : "=a"(fsr));
62 __asm__ volatile ("rur.fcr %0" : "=a"(fcr));
63 *env_ptr = fsr | fcr;
64 return 0;
65 }
66
fegetexcept(void)67 __declare_fenv_inline(int) fegetexcept(void)
68 {
69 fexcept_t current;
70 __asm__ volatile ("rur.fsr %0" : "=a"(current));
71 return (current >> _FE_EXCEPTION_ENABLE_OFFSET) & FE_ALL_EXCEPT;
72 }
73
fegetexceptflag(fexcept_t * flagp,int excepts)74 __declare_fenv_inline(int) fegetexceptflag(fexcept_t *flagp, int excepts)
75 {
76 unsigned int fsr;
77 __asm__ volatile ("rur.fsr %0" : "=a"(fsr));
78 fsr >>= _FE_EXCEPTION_FLAGS_OFFSET;
79 excepts &= fsr;
80 *flagp = excepts;
81
82 return 0;
83 }
84
fegetround(void)85 __declare_fenv_inline(int) fegetround(void)
86 {
87 fexcept_t current;
88 __asm__ volatile ("rur.fcr %0" : "=a"(current));
89 return (current & _FE_ROUND_MODE_MASK) >> _FE_ROUND_MODE_OFFSET;
90 }
91
feholdexcept(fenv_t * envp)92 __declare_fenv_inline(int) feholdexcept(fenv_t * envp)
93 {
94 fexcept_t fsr;
95 fenv_t fcr;
96 /* Get the environment. */
97 __asm__ volatile ("rur.fcr %0" : "=a"(fcr));
98 __asm__ volatile ("rur.fsr %0" : "=a"(fsr));
99 *envp = fsr | fcr;
100
101 /* Clear the exception enable flags. */
102 fcr &= _FE_ROUND_MODE_MASK;
103 __asm__ volatile ("wur.fcr %0" : :"a"(fcr));
104
105 /* Clear the exception happened flags. */
106 fsr = 0;
107 __asm__ volatile ("wur.fsr %0" : :"a"(fsr));
108
109 return 0;
110 }
111
feraiseexcept(int excepts)112 __declare_fenv_inline(int) feraiseexcept(int excepts)
113 {
114 fexcept_t current;
115
116 __asm__ volatile ("rur.fsr %0" : "=a"(current));
117 current |= excepts << _FE_EXCEPTION_FLAGS_OFFSET;
118 __asm__ volatile ("wur.fsr %0" : : "a"(current));
119 return 0;
120 }
121
fesetexcept(int excepts)122 __declare_fenv_inline(int) fesetexcept(int excepts)
123 {
124 return feraiseexcept(excepts);
125 }
126
fesetenv(const fenv_t * env_ptr)127 __declare_fenv_inline(int) fesetenv(const fenv_t * env_ptr)
128 {
129 __asm__ volatile ("wur.fsr %0" : : "a"(*env_ptr));
130 __asm__ volatile ("wur.fcr %0" : : "a"(*env_ptr));
131 return 0;
132 }
133
fesetexceptflag(const fexcept_t * flagp,int excepts)134 __declare_fenv_inline(int) fesetexceptflag(const fexcept_t *flagp, int excepts)
135 {
136 unsigned int fsr;
137
138 __asm__ volatile ("rur.fsr %0" : "=a"(fsr));
139 fsr &= ~(excepts << _FE_EXCEPTION_FLAGS_OFFSET);
140 fsr |= ((*flagp & excepts) << _FE_EXCEPTION_FLAGS_OFFSET);
141 __asm__ volatile ("wur.fsr %0" : : "a"(fsr));
142 return 0;
143 }
144
fesetround(int round)145 __declare_fenv_inline(int) fesetround(int round)
146 {
147 __asm__ volatile ("wur.fcr %0" : : "a"(round));
148 return 0;
149 }
150
fetestexcept(int excepts)151 __declare_fenv_inline(int) fetestexcept(int excepts)
152 {
153 fexcept_t current;
154 __asm__ volatile ("rur.fsr %0" : "=a"(current));
155 return (current >> _FE_EXCEPTION_FLAGS_OFFSET) & excepts;
156 }
157
feupdateenv(const fenv_t * envp)158 __declare_fenv_inline(int) feupdateenv(const fenv_t * envp)
159 {
160 fenv_t current;
161 fegetenv (¤t);
162 fesetenv (envp);
163 return feraiseexcept (current);
164 }
165
