1/* 2Copyright (c) 2014, Hesham ALMatary 3All rights reserved. 4 5Redistribution and use in source and binary forms, with or without modification, 6are permitted provided that the following conditions are met: 7 81. Redistributions of source code must retain the above copyright notice, this 9list of conditions and the following disclaimer. 10 112. Redistributions in binary form must reproduce the above copyright notice, 12this list of conditions and the following disclaimer in the documentation and/or 13other materials provided with the distribution. 14 15THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 16ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 17WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 18DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 19ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 20(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 22ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 24SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25*/ 26 27.align 4 28.global setjmp 29.type setjmp,@function 30setjmp: 31 32 l.sw 0(r3), r1 33 l.sw 4(r3), r2 34 /* Skip r3-r8 as they are not preserved across function calls */ 35 l.sw 8(r3), r9 36 /* Skip r10 as it's preserved to be used by TLS */ 37 /* Skip r11, setjmp always set it to 0 */ 38 /* The following set if registers are preserved across function calls */ 39 l.sw 12(r3), r14 40 l.sw 16(r3), r16 41 l.sw 20(r3), r18 42 l.sw 24(r3), r20 43 l.sw 28(r3), r22 44 l.sw 32(r3), r24 45 l.sw 36(r3), r26 46 l.sw 40(r3), r28 47 l.sw 44(r3), r30 48 /* Save Status Register */ 49 l.mfspr r13, r0, 17 50 l.sw 48(r3), r13 51/* Set result register to 0 and jump */ 52// Different cases for optional delay slot 53#if defined(__OR1K_NODELAY__) 54 l.addi r11, r0, 0 55 l.jr r9 56#elif defined(__OR1K_DELAY__) 57 l.jr r9 58 l.addi r11, r0, 0 59#else 60 l.addi r11, r0, 0 61 l.jr r9 62 l.nop 63#endif 64 65.align 4 66.global longjmp 67.type longjmp,@function 68longjmp: 69 70 /* If the second argument to longjmp is zero, set return address to 1, 71 otherwise set it to the value of the second argument */ 72 l.addi r11, r0, 1 73 l.sfeq r4, r0 74 l.bf 1f 75 l.nop 76 l.addi r11, r4, 0 77 78 /* Load status register */ 791: 80 l.lwz r15, 48(r3) 81 l.mtspr r0, r15, 17 82 83 l.lwz r1, 0(r3) 84 l.lwz r2, 4(r3) 85 /* Skip r3-r8 as they are not preserved across function calls */ 86 l.lwz r9, 8(r3) 87 /* Skip r11 as it's always set by longjmp */ 88 l.lwz r14, 12(r3) 89 l.lwz r16, 16(r3) 90 l.lwz r18, 20(r3) 91 l.lwz r20, 24(r3) 92 l.lwz r22, 28(r3) 93 l.lwz r24, 32(r3) 94 l.lwz r26, 36(r3) 95 l.lwz r28, 40(r3) 96 97// Different cases for optional delay slot 98#if defined(__OR1K_NODELAY__) 99 l.lwz r30, 44(r3) 100 l.jr r9 101#elif defined(__OR1K_DELAY__) 102 l.jr r9 103 l.lwz r30, 44(r3) 104#else 105 l.lwz r30, 44(r3) 106 l.jr r9 107 l.nop 108#endif 109