1 /* A setjmp.c for CRIS
2    Copyright (C) 1993-2005 Axis Communications.
3    All rights reserved.
4 
5    Redistribution and use in source and binary forms, with or without
6    modification, are permitted provided that the following conditions
7    are met:
8 
9    1. Redistributions of source code must retain the above copyright
10       notice, this list of conditions and the following disclaimer.
11 
12    2. Neither the name of Axis Communications nor the names of its
13       contributors may be used to endorse or promote products derived
14       from this software without specific prior written permission.
15 
16    THIS SOFTWARE IS PROVIDED BY AXIS COMMUNICATIONS AND ITS CONTRIBUTORS
17    ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19    A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL AXIS
20    COMMUNICATIONS OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
21    INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
22    (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
23    SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24    HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
25    STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
26    IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27    POSSIBILITY OF SUCH DAMAGE.  */
28 
29 /* For benefit of CRIS v0..v3, we save and restore CCR to be able to
30    correctly handle DI/EI; otherwise there would be no reason to save it.
31    Note also that the "move x,ccr" does NOT affect
32    the DMA enable bits (E and D) of v0..v3.
33 
34    We do not save mof; it is call-clobbered.  It also does not exist in
35    v0..v8; it should be safe to read or write to it there, but better not.
36 
37    jmp_buf[0] - PC
38    jmp_buf[1] - SP (R14)
39    jmp_buf[2] - R13
40    jmp_buf[3] - R12
41    jmp_buf[4] - R11
42    jmp_buf[5] - R10
43    jmp_buf[6] - R9
44    jmp_buf[7] - R8
45    jmp_buf[8] - R7
46    jmp_buf[9] - R6
47    jmp_buf[10] - R5
48    jmp_buf[11] - R4
49    jmp_buf[12] - R3
50    jmp_buf[13] - R2
51    jmp_buf[14] - R1
52    jmp_buf[15] - R0
53    jmp_buf[16] - SRP
54    jmp_buf[17] - CCR
55    */
56 
57 #include <setjmp.h>
58 
59 int
setjmp(jmp_buf buf)60 setjmp (jmp_buf buf)
61 {
62   int ret;
63 #if defined (__arch_common_v10_v32) || defined (__arch_v32)
64   /* No offsets in the compatibility mode.  Also, movem saves in
65      different order on v10 than on v32, so we use single move
66      instructions instead, this not being a speed-prioritized operation.
67      And we don't save CCR or CCS; since long unuseful.  */
68   __asm__ __volatile__
69     ("move.d %1,$r13							\n\
70       move 0f,$mof							\n\
71       move $mof,[$r13+]							\n\
72       move.d $sp,[$r13+]						\n\
73       clear.d [$r13+]							\n\
74       move.d $r12,[$r13+]						\n\
75       move.d $r11,[$r13+]						\n\
76       move.d $r10,[$r13+]						\n\
77       moveq 1,$r9							\n\
78       move.d $r9,[$r13+]						\n\
79       move.d $r8,[$r13+]						\n\
80       move.d $r7,[$r13+]						\n\
81       move.d $r6,[$r13+]						\n\
82       move.d $r5,[$r13+]						\n\
83       move.d $r4,[$r13+]						\n\
84       move.d $r3,[$r13+]						\n\
85       move.d $r2,[$r13+]						\n\
86       move.d $r1,[$r13+]						\n\
87       move.d $r0,[$r13+]						\n\
88       move $srp,[$r13+]							\n\
89       clear.d [$r13+]							\n\
90       clear.d $r9							\n\
91 0:									\n\
92       move.d $r9,%0"
93 
94      /* Output.  */
95      : "=&r" (ret)
96 
97      /* Input.  */
98      : "r" (buf)
99 
100      /* Clobber.  */
101      : "r9", "r13", "memory");
102 #else /* not __arch_common_v10_v32 or __arch_v32 */
103 #ifdef __PIC__
104   __asm__ __volatile__
105     ("moveq 1,$r9							\n\
106       movem $sp,[%1+1*4]						\n\
107       move.d $pc,$r9							\n\
108       addq 0f-.,$r9							\n\
109       move.d $r9,[%1]							\n\
110       move $srp,[%1+16*4]						\n\
111       move $ccr,[%1+17*4]						\n\
112       clear.d $r9							\n\
113 0:									\n\
114       move.d $r9,%0"
115 
116      /* Output.  */
117      : "=&r" (ret)
118 
119      /* Input.  */
120      : "r" (buf)
121 
122      /* Clobber.  */
123      : "r9", "memory");
124 #else  /* not PIC */
125   __asm__ __volatile__
126     ("moveq 1,$r9							\n\
127       movem $sp,[%1+1*4]						\n\
128       move.d 0f,$r9							\n\
129       move.d $r9,[%1]							\n\
130       move $srp,[%1+16*4]						\n\
131       move $ccr,[%1+17*4]						\n\
132       clear.d $r9							\n\
133 0:									\n\
134       move.d $r9,%0"
135 
136      /* Output.  */
137      : "=&r" (ret)
138 
139      /* Input.  */
140      : "r" (buf)
141 
142      /* Clobber.  */
143      : "r9");
144 #endif /* not PIC */
145 #endif /* not __arch_common_v10_v32 or __arch_v32 */
146   return ret;
147 }
148 
149 void
longjmp(jmp_buf buf,int val)150 longjmp(jmp_buf buf, int val)
151 {
152 #if defined (__arch_common_v10_v32) || defined (__arch_v32)
153   __asm__ __volatile__
154     ("cmpq 0,%1								\n\
155       beq 0f								\n\
156       move.d %0,$r13	; In delay-slot.				\n\
157       addq 6*4,$r13							\n\
158       move.d %1,[$r13]							\n\
159       subq 6*4,$r13							\n\
160 0:\n"
161 #ifdef __arch_common_v10_v32
162      /* Cater to branch offset difference between v32 and v10.  We
163 	assume the branch above is 8-bit.  */
164 "     setf\n"
165 #endif
166 "     move [$r13+],$mof							\n\
167       move.d [$r13+],$sp						\n\
168       addq 4,$r13							\n\
169       move.d [$r13+],$r12						\n\
170       move.d [$r13+],$r11						\n\
171       move.d [$r13+],$r10						\n\
172       move.d [$r13+],$r9						\n\
173       move.d [$r13+],$r8						\n\
174       move.d [$r13+],$r7						\n\
175       move.d [$r13+],$r6						\n\
176       move.d [$r13+],$r5						\n\
177       move.d [$r13+],$r4						\n\
178       move.d [$r13+],$r3						\n\
179       move.d [$r13+],$r2						\n\
180       move.d [$r13+],$r1						\n\
181       move.d [$r13+],$r0						\n\
182       move [$r13+],$srp							\n\
183       move $mof,$r13							\n\
184       jump $r13								\n\
185       setf"
186 
187      /* No outputs.  */
188      :
189 
190      /* Inputs.  */
191      : "r" (buf), "r" (val)
192      : "r13", "memory");
193 
194 #else /* not __arch_common_v10_v32 or __arch_v32 */
195   __asm__ __volatile__
196     ("move [%0+17*4],$ccr						\n\
197       move [%0+16*4],$srp						\n\
198       test.d %1								\n\
199       beq 0f								\n\
200       nop								\n\
201       move.d %1,[%0+6*4]	; Offset for r9.			\n\
202 0:									\n\
203       movem [%0],$pc"
204 
205      /* No outputs.  */
206      :
207 
208      /* Inputs.  */
209      : "r" (buf), "r" (val)
210      : "memory");
211 #endif /* not __arch_common_v10_v32 or __arch_v32 */
212 }
213