1 /* A memcpy for CRIS.
2    Copyright (C) 1994-2005 Axis Communications.
3    All rights reserved.
4 
5    Redistribution and use in source and binary forms, with or without
6    modification, are permitted provided that the following conditions
7    are met:
8 
9    1. Redistributions of source code must retain the above copyright
10       notice, this list of conditions and the following disclaimer.
11 
12    2. Neither the name of Axis Communications nor the names of its
13       contributors may be used to endorse or promote products derived
14       from this software without specific prior written permission.
15 
16    THIS SOFTWARE IS PROVIDED BY AXIS COMMUNICATIONS AND ITS CONTRIBUTORS
17    ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19    A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL AXIS
20    COMMUNICATIONS OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
21    INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
22    (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
23    SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24    HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
25    STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
26    IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27    POSSIBILITY OF SUCH DAMAGE.  */
28 
29 /* FIXME: This file should really only be used for reference, as the
30    result is somewhat depending on gcc generating what we expect rather
31    than what we describe.  An assembly file should be used instead.  */
32 
33 #include <stddef.h>
34 #include "../../string/local.h"
35 
36 /* Break even between movem and move16 is really at 38.7 * 2, but
37    modulo 44, so up to the next multiple of 44, we use ordinary code.  */
38 #define MEMCPY_BY_BLOCK_THRESHOLD (44 * 2)
39 
40 /* No name ambiguities in this file.  */
41 __asm__ (".syntax no_register_prefix");
42 
43 void *
44 __inhibit_loop_to_libcall
memcpy(void * __restrict pdst,const void * __restrict psrc,size_t pn)45 memcpy(void *__restrict pdst, const void *__restrict psrc, size_t pn)
46 {
47   /* Now we want the parameters put in special registers.
48      Make sure the compiler is able to make something useful of this.
49      As it is now: r10 -> r13; r11 -> r11 (nop); r12 -> r12 (nop).
50 
51      If gcc was allright, it really would need no temporaries, and no
52      stack space to save stuff on.  */
53 
54   register void *return_dst __asm__ ("r10") = pdst;
55   register unsigned char *dst __asm__ ("r13") = pdst;
56   register unsigned const char *src __asm__ ("r11") = psrc;
57   register int n __asm__ ("r12") = pn;
58 
59   /* When src is aligned but not dst, this makes a few extra needless
60      cycles.  I believe it would take as many to check that the
61      re-alignment was unnecessary.  */
62   if (((unsigned long) dst & 3) != 0
63       /* Don't align if we wouldn't copy more than a few bytes; so we
64 	 don't have to check further for overflows.  */
65       && n >= 3)
66   {
67     if ((unsigned long) dst & 1)
68       {
69 	n--;
70 	*dst = *src;
71 	src++;
72 	dst++;
73       }
74 
75     if ((unsigned long) dst & 2)
76       {
77 	n -= 2;
78 	*(short *) dst = *(short *) src;
79 	src += 2;
80 	dst += 2;
81       }
82   }
83 
84   /* Decide which copying method to use.  */
85   if (n >= MEMCPY_BY_BLOCK_THRESHOLD)
86     {
87       /* It is not optimal to tell the compiler about clobbering any
88 	 registers; that will move the saving/restoring of those registers
89 	 to the function prologue/epilogue, and make non-movem sizes
90 	 suboptimal.  */
91       __asm__ volatile
92 	("\
93 	 ;; GCC does promise correct register allocations, but let's	\n\
94 	 ;; make sure it keeps its promises.				\n\
95 	 .ifnc %0-%1-%2,$r13-$r11-$r12					\n\
96 	 .error \"GCC reg alloc bug: %0-%1-%4 != $r13-$r12-$r11\"	\n\
97 	 .endif								\n\
98 									\n\
99 	 ;; Save the registers we'll use in the movem process		\n\
100 	 ;; on the stack.						\n\
101 	 subq	11*4,sp							\n\
102 	 movem	r10,[sp]						\n\
103 									\n\
104 	 ;; Now we've got this:						\n\
105 	 ;; r11 - src							\n\
106 	 ;; r13 - dst							\n\
107 	 ;; r12 - n							\n\
108 									\n\
109 	 ;; Update n for the first loop.				\n\
110 	 subq	 44,r12							\n\
111 0:									\n\
112 "
113 #ifdef __arch_common_v10_v32
114 	 /* Cater to branch offset difference between v32 and v10.  We
115 	    assume the branch below has an 8-bit offset.  */
116 "	 setf\n"
117 #endif
118 "	 movem	[r11+],r10						\n\
119 	 subq	44,r12							\n\
120 	 bge	 0b							\n\
121 	 movem	r10,[r13+]						\n\
122 									\n\
123 	 ;; Compensate for last loop underflowing n.			\n\
124 	 addq	44,r12							\n\
125 									\n\
126 	 ;; Restore registers from stack.				\n\
127 	 movem [sp+],r10"
128 
129 	 /* Outputs.  */
130 	 : "=r" (dst), "=r" (src), "=r" (n)
131 
132 	 /* Inputs.  */
133 	 : "0" (dst), "1" (src), "2" (n));
134     }
135 
136   while (n >= 16)
137     {
138       *(long *) dst = *(long *) src; dst += 4; src += 4;
139       *(long *) dst = *(long *) src; dst += 4; src += 4;
140       *(long *) dst = *(long *) src; dst += 4; src += 4;
141       *(long *) dst = *(long *) src; dst += 4; src += 4;
142 
143       n -= 16;
144     }
145 
146   switch (n)
147     {
148     case 0:
149       break;
150 
151     case 1:
152       *dst = *src;
153       break;
154 
155     case 2:
156       *(short *) dst = *(short *) src;
157       break;
158 
159     case 3:
160       *(short *) dst = *(short *) src; dst += 2; src += 2;
161       *dst = *src;
162       break;
163 
164     case 4:
165       *(long *) dst = *(long *) src;
166       break;
167 
168     case 5:
169       *(long *) dst = *(long *) src; dst += 4; src += 4;
170       *dst = *src;
171       break;
172 
173     case 6:
174       *(long *) dst = *(long *) src; dst += 4; src += 4;
175       *(short *) dst = *(short *) src;
176       break;
177 
178     case 7:
179       *(long *) dst = *(long *) src; dst += 4; src += 4;
180       *(short *) dst = *(short *) src; dst += 2; src += 2;
181       *dst = *src;
182       break;
183 
184     case 8:
185       *(long *) dst = *(long *) src; dst += 4; src += 4;
186       *(long *) dst = *(long *) src;
187       break;
188 
189     case 9:
190       *(long *) dst = *(long *) src; dst += 4; src += 4;
191       *(long *) dst = *(long *) src; dst += 4; src += 4;
192       *dst = *src;
193       break;
194 
195     case 10:
196       *(long *) dst = *(long *) src; dst += 4; src += 4;
197       *(long *) dst = *(long *) src; dst += 4; src += 4;
198       *(short *) dst = *(short *) src;
199       break;
200 
201     case 11:
202       *(long *) dst = *(long *) src; dst += 4; src += 4;
203       *(long *) dst = *(long *) src; dst += 4; src += 4;
204       *(short *) dst = *(short *) src; dst += 2; src += 2;
205       *dst = *src;
206       break;
207 
208     case 12:
209       *(long *) dst = *(long *) src; dst += 4; src += 4;
210       *(long *) dst = *(long *) src; dst += 4; src += 4;
211       *(long *) dst = *(long *) src;
212       break;
213 
214     case 13:
215       *(long *) dst = *(long *) src; dst += 4; src += 4;
216       *(long *) dst = *(long *) src; dst += 4; src += 4;
217       *(long *) dst = *(long *) src; dst += 4; src += 4;
218       *dst = *src;
219       break;
220 
221     case 14:
222       *(long *) dst = *(long *) src; dst += 4; src += 4;
223       *(long *) dst = *(long *) src; dst += 4; src += 4;
224       *(long *) dst = *(long *) src; dst += 4; src += 4;
225       *(short *) dst = *(short *) src;
226       break;
227 
228     case 15:
229       *(long *) dst = *(long *) src; dst += 4; src += 4;
230       *(long *) dst = *(long *) src; dst += 4; src += 4;
231       *(long *) dst = *(long *) src; dst += 4; src += 4;
232       *(short *) dst = *(short *) src; dst += 2; src += 2;
233       *dst = *src;
234       break;
235     }
236 
237   return return_dst;
238 }
239