1/* 2 * setjmp for the Blackfin processor 3 * 4 * Copyright (C) 2006 Analog Devices, Inc. 5 * 6 * The authors hereby grant permission to use, copy, modify, distribute, 7 * and license this software and its documentation for any purpose, provided 8 * that existing copyright notices are retained in all copies and that this 9 * notice is included verbatim in any distributions. No written agreement, 10 * license, or royalty fee is required for any of the authorized uses. 11 * Modifications to this software may be copyrighted by their authors 12 * and need not follow the licensing terms described here, provided that 13 * the new terms are clearly indicated on the first page of each file where 14 * they apply. 15 */ 16 17 18#define _ASM 19#define _SETJMP_H 20 21.text; 22.align 4; 23.globl _setjmp; 24.type _setjmp, STT_FUNC; 25 26_setjmp: 27 [--SP] = P0; /* Save P0 */ 28 P0 = R0; 29 R0 = [SP++]; 30 [P0 + 0x00] = R0; /* Save saved P0 */ 31 [P0 + 0x04] = P1; 32 [P0 + 0x08] = P2; 33 [P0 + 0x0C] = P3; 34 [P0 + 0x10] = P4; 35 [P0 + 0x14] = P5; 36 37 [P0 + 0x18] = FP; /* Frame Pointer */ 38 [P0 + 0x1C] = SP; /* Stack Pointer */ 39 40 [P0 + 0x20] = P0; /* Data Registers */ 41 [P0 + 0x24] = R1; 42 [P0 + 0x28] = R2; 43 [P0 + 0x2C] = R3; 44 [P0 + 0x30] = R4; 45 [P0 + 0x34] = R5; 46 [P0 + 0x38] = R6; 47 [P0 + 0x3C] = R7; 48 49 R0 = ASTAT; 50 [P0 + 0x40] = R0; 51 52 R0 = LC0; /* Loop Counters */ 53 [P0 + 0x44] = R0; 54 R0 = LC1; 55 [P0 + 0x48] = R0; 56 57 R0 = A0.W; /* Accumulators */ 58 [P0 + 0x4C] = R0; 59 R0 = A0.X; 60 [P0 + 0x50] = R0; 61 R0 = A1.W; 62 [P0 + 0x54] = R0; 63 R0 = A1.X; 64 [P0 + 0x58] = R0; 65 66 R0 = I0; /* Index Registers */ 67 [P0 + 0x5C] = R0; 68 R0 = I1; 69 [P0 + 0x60] = R0; 70 R0 = I2; 71 [P0 + 0x64] = R0; 72 R0 = I3; 73 [P0 + 0x68] = R0; 74 75 R0 = M0; /* Modifier Registers */ 76 [P0 + 0x6C] = R0; 77 R0 = M1; 78 [P0 + 0x70] = R0; 79 R0 = M2; 80 [P0 + 0x74] = R0; 81 R0 = M3; 82 [P0 + 0x78] = R0; 83 84 R0 = L0; /* Length Registers */ 85 [P0 + 0x7c] = R0; 86 R0 = L1; 87 [P0 + 0x80] = R0; 88 R0 = L2; 89 [P0 + 0x84] = R0; 90 R0 = L3; 91 [P0 + 0x88] = R0; 92 93 R0 = B0; /* Base Registers */ 94 [P0 + 0x8C] = R0; 95 R0 = B1; 96 [P0 + 0x90] = R0; 97 R0 = B2; 98 [P0 + 0x94] = R0; 99 R0 = B3; 100 [P0 + 0x98] = R0; 101 102 R0 = RETS; 103 [P0 + 0x9C] = R0; 104 105 R0 = 0; 106 107 RTS; 108.size _setjmp, .-_setjmp; 109