1/* Copyright (c) 2002, 2005, 2006, 2007 Marek Michalkiewicz 2 Copyright (c) 2006 Dmitry Xmelkov 3 All rights reserved. 4 5 Redistribution and use in source and binary forms, with or without 6 modification, are permitted provided that the following conditions are met: 7 8 * Redistributions of source code must retain the above copyright 9 notice, this list of conditions and the following disclaimer. 10 11 * Redistributions in binary form must reproduce the above copyright 12 notice, this list of conditions and the following disclaimer in 13 the documentation and/or other materials provided with the 14 distribution. 15 16 * Neither the name of the copyright holders nor the names of 17 contributors may be used to endorse or promote products derived 18 from this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. */ 31 32/* 33 macros.inc - macros for use in assembler sources 34 35 Contributors: 36 Created by Marek Michalkiewicz <marekm@linux.org.pl> 37 */ 38 39#include <avr/io.h> 40#include "sectionname.h" 41 42/* if not defined, assume old version with underscores */ 43#ifndef __USER_LABEL_PREFIX__ 44#define __USER_LABEL_PREFIX__ _ 45#endif 46 47#ifndef __REGISTER_PREFIX__ 48#define __REGISTER_PREFIX__ 49#endif 50 51/* the assembler line separator (just in case it ever changes) */ 52#define _L $ 53 54#define CONCAT1(a, b) CONCAT2(a, b) 55#define CONCAT2(a, b) a ## b 56 57#define _U(x) CONCAT1(__USER_LABEL_PREFIX__, x) 58 59#define _R(x) CONCAT1(__REGISTER_PREFIX__, x) 60 61/* these should help to fix the "can't have function named r1()" bug 62 which may require adding '%' in front of register names. */ 63 64#define r0 _R(r0) 65#define r1 _R(r1) 66#define r2 _R(r2) 67#define r3 _R(r3) 68#define r4 _R(r4) 69#define r5 _R(r5) 70#define r6 _R(r6) 71#define r7 _R(r7) 72#define r8 _R(r8) 73#define r9 _R(r9) 74#define r10 _R(r10) 75#define r11 _R(r11) 76#define r12 _R(r12) 77#define r13 _R(r13) 78#define r14 _R(r14) 79#define r15 _R(r15) 80#define r16 _R(r16) 81#define r17 _R(r17) 82#define r18 _R(r18) 83#define r19 _R(r19) 84#define r20 _R(r20) 85#define r21 _R(r21) 86#define r22 _R(r22) 87#define r23 _R(r23) 88#define r24 _R(r24) 89#define r25 _R(r25) 90#define r26 _R(r26) 91#define r27 _R(r27) 92#define r28 _R(r28) 93#define r29 _R(r29) 94#define r30 _R(r30) 95#define r31 _R(r31) 96 97#if !defined(__tmp_reg__) 98 #if defined(__AVR_TINY__) 99 #define __tmp_reg__ r16 100 #else 101 #define __tmp_reg__ r0 102 #endif 103#endif 104 105#if !defined(__zero_reg__) 106 #if defined(__AVR_TINY__) 107 #define __zero_reg__ r17 108 #else 109 #define __zero_reg__ r1 110 #endif 111#endif 112 113#if (__AVR_HAVE_JMP_CALL__) 114 #define XJMP jmp 115 #define XCALL call 116#else 117 #define XJMP rjmp 118 #define XCALL rcall 119#endif 120 121/* used only by fplib/strtod.S - libgcc internal function calls */ 122#define PROLOGUE_SAVES(offset) XJMP (__prologue_saves__ + 2 * (offset)) 123#define EPILOGUE_RESTORES(offset) XJMP (__epilogue_restores__ + 2 * (offset)) 124 125#if FLASHEND > 0x10000 /* ATmega103 */ 126 #define BIG_CODE 1 127#else 128 #define BIG_CODE 0 129#endif 130 131#ifndef __AVR_HAVE_MOVW__ 132# if defined(__AVR_ENHANCED__) && __AVR_ENHANCED__ 133# define __AVR_HAVE_MOVW__ 1 134# endif 135#endif 136 137#ifndef __AVR_HAVE_LPMX__ 138# if defined(__AVR_ENHANCED__) && __AVR_ENHANCED__ 139# define __AVR_HAVE_LPMX__ 1 140# endif 141#endif 142 143#ifndef __AVR_HAVE_MUL__ 144# if defined(__AVR_ENHANCED__) && __AVR_ENHANCED__ 145# define __AVR_HAVE_MUL__ 1 146# endif 147#endif 148 149/* 150 Smart version of movw: 151 - uses "movw" if possible (supported by MCU, and both registers even) 152 - handles overlapping register pairs correctly 153 - no instruction generated if source and destination are the same 154 (may expand to 0, 1 or 2 instructions). 155 */ 156 157.macro X_movw dst src 158 .L_movw_dst = -1 159 .L_movw_src = -1 160 .L_movw_n = 0 161 .irp reg, r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, \ 162 r10,r11,r12,r13,r14,r15,r16,r17,r18,r19, \ 163 r20,r21,r22,r23,r24,r25,r26,r27,r28,r29, \ 164 r30,r31 165 .ifc \reg,\dst 166 .L_movw_dst = .L_movw_n 167 .endif 168 .ifc \reg,\src 169 .L_movw_src = .L_movw_n 170 .endif 171 .L_movw_n = .L_movw_n + 1 172 .endr 173 .L_movw_n = 0 174 .irp reg, R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, \ 175 R10,R11,R12,R13,R14,R15,R16,R17,R18,R19, \ 176 R20,R21,R22,R23,R24,R25,R26,R27,R28,R29, \ 177 R30,R31 178 .ifc \reg,\dst 179 .L_movw_dst = .L_movw_n 180 .endif 181 .ifc \reg,\src 182 .L_movw_src = .L_movw_n 183 .endif 184 .L_movw_n = .L_movw_n + 1 185 .endr 186 .if .L_movw_dst < 0 187 .L_movw_n = 0 188 .rept 32 189 .if \dst == .L_movw_n 190 .L_movw_dst = .L_movw_n 191 .endif 192 .L_movw_n = .L_movw_n + 1 193 .endr 194 .endif 195 .if .L_movw_src < 0 196 .L_movw_n = 0 197 .rept 32 198 .if \src == .L_movw_n 199 .L_movw_src = .L_movw_n 200 .endif 201 .L_movw_n = .L_movw_n + 1 202 .endr 203 .endif 204 .if (.L_movw_dst < 0) || (.L_movw_src < 0) 205 .err ; Invalid 'X_movw' arg. 206 .endif 207 208 .if ((.L_movw_src) - (.L_movw_dst)) /* different registers */ 209 .if (((.L_movw_src) | (.L_movw_dst)) & 0x01) 210 .if (((.L_movw_src)-(.L_movw_dst)) & 0x80) /* src < dest */ 211 mov (.L_movw_dst)+1, (.L_movw_src)+1 212 mov (.L_movw_dst), (.L_movw_src) 213 .else /* src > dest */ 214 mov (.L_movw_dst), (.L_movw_src) 215 mov (.L_movw_dst)+1, (.L_movw_src)+1 216 .endif 217 .else /* both even -> overlap not possible */ 218#if defined(__AVR_HAVE_MOVW__) && __AVR_HAVE_MOVW__ 219 movw \dst, \src 220#else 221 mov (.L_movw_dst), (.L_movw_src) 222 mov (.L_movw_dst)+1, (.L_movw_src)+1 223#endif 224 .endif 225 .endif 226.endm 227 228/* Macro 'X_lpm' extends enhanced lpm instruction for classic chips. 229 Usage: 230 X_lpm reg, dst 231 where 232 reg is 0..31, r0..r31 or R0..R31 233 dst is z, Z, z+ or Z+ 234 It is possible to omit both arguments. 235 236 Possible results for classic chips: 237 lpm 238 lpm / mov Rd,r0 239 lpm / adiw ZL,1 240 lpm / mov Rd,r0 / adiw ZL,1 241 242 For enhanced chips it is one instruction always. 243 244 ATTENTION: unlike enhanced chips SREG (S,V,N,Z,C) flags are 245 changed in case of 'Z+' dst. R0 is scratch. 246 */ 247.macro X_lpm dst=r0, src=Z 248 249 /* dst evaluation */ 250 .L_lpm_dst = -1 251 252 .L_lpm_n = 0 253 .irp reg, r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, \ 254 r10,r11,r12,r13,r14,r15,r16,r17,r18,r19, \ 255 r20,r21,r22,r23,r24,r25,r26,r27,r28,r29, \ 256 r30,r31 257 .ifc \reg,\dst 258 .L_lpm_dst = .L_lpm_n 259 .endif 260 .L_lpm_n = .L_lpm_n + 1 261 .endr 262 263 .L_lpm_n = 0 264 .irp reg, R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, \ 265 R10,R11,R12,R13,R14,R15,R16,R17,R18,R19, \ 266 R20,R21,R22,R23,R24,R25,R26,R27,R28,R29, \ 267 R30,R31 268 .ifc \reg,\dst 269 .L_lpm_dst = .L_lpm_n 270 .endif 271 .L_lpm_n = .L_lpm_n + 1 272 .endr 273 274 .if .L_lpm_dst < 0 275 .L_lpm_n = 0 276 .rept 32 277 .if \dst == .L_lpm_n 278 .L_lpm_dst = .L_lpm_n 279 .endif 280 .L_lpm_n = .L_lpm_n + 1 281 .endr 282 .endif 283 284 .if (.L_lpm_dst < 0) 285 .err ; Invalid dst arg of 'X_lpm' macro. 286 .endif 287 288 /* src evaluation */ 289 .L_lpm_src = -1 290 .L_lpm_n = 0 291 .irp reg, z,Z,z+,Z+ 292 .ifc \reg,\src 293 .L_lpm_src = .L_lpm_n 294 .endif 295 .L_lpm_n = .L_lpm_n + 1 296 .endr 297 298 .if (.L_lpm_src < 0) 299 .err ; Invalid src arg of 'X_lpm' macro. 300 .endif 301 302 /* instruction(s) */ 303 .if .L_lpm_src < 2 304 .if .L_lpm_dst == 0 305 lpm 306 .else 307#if defined(__AVR_HAVE_LPMX__) && __AVR_HAVE_LPMX__ 308 lpm .L_lpm_dst, Z 309#else 310 lpm 311 mov .L_lpm_dst, r0 312#endif 313 .endif 314 .else 315 .if (.L_lpm_dst >= 30) 316 .err ; Registers 30 and 31 are inhibited as 'X_lpm *,Z+' dst. 317 .endif 318#if defined(__AVR_HAVE_LPMX__) && __AVR_HAVE_LPMX__ 319 lpm .L_lpm_dst, Z+ 320#else 321 lpm 322 .if .L_lpm_dst 323 mov .L_lpm_dst, r0 324 .endif 325 adiw r30, 1 326#endif 327 .endif 328.endm 329 330/* 331 LPM_R0_ZPLUS_INIT is used before the loop to initialize RAMPZ 332 for future devices with RAMPZ:Z auto-increment - [e]lpm r0, Z+. 333 334 LPM_R0_ZPLUS_NEXT is used inside the loop to load a byte from 335 the program memory at [RAMPZ:]Z to R0, and increment [RAMPZ:]Z. 336 337 The argument in both macros is a register that contains the 338 high byte (bits 23-16) of the address, bits 15-0 should be in 339 the Z (r31:r30) register. It can be any register except for: 340 r0, r1 (__zero_reg__ - assumed to always contain 0), r30, r31. 341 */ 342 343 .macro LPM_R0_ZPLUS_INIT hhi 344#if __AVR_ENHANCED__ 345 #if __AVR_HAVE_ELPM__ 346 out AVR_RAMPZ_ADDR, \hhi 347 #endif 348#endif 349 .endm 350 351 .macro LPM_R0_ZPLUS_NEXT hhi 352#if __AVR_ENHANCED__ 353 #if __AVR_HAVE_ELPM__ 354 /* ELPM with RAMPZ:Z post-increment, load RAMPZ only once */ 355 elpm r0, Z+ 356 #else 357 /* LPM with Z post-increment, max 64K, no RAMPZ (ATmega83/161/163/32) */ 358 lpm r0, Z+ 359 #endif 360#else 361 #if __AVR_HAVE_ELPM__ 362 /* ELPM without post-increment, load RAMPZ each time (ATmega103) */ 363 out AVR_RAMPZ_ADDR, \hhi 364 elpm 365 adiw r30,1 366 adc \hhi, __zero_reg__ 367 #else 368 /* LPM without post-increment, max 64K, no RAMPZ (AT90S*) */ 369 lpm 370 adiw r30,1 371 #endif 372#endif 373 .endm 374
