1/*
2 * Copyright (c) 2015 ARM Ltd
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 3. The name of the company may not be used to endorse or promote
14 *    products derived from this software without specific prior written
15 *    permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
22 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
23 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
24 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
25 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
26 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29	.arm
30	.syntax unified
31	.global memset
32	.type	memset, %function
33memset:
34	tst	r0, #3
35	stmfd	sp!, {r4, lr}
36	beq	10f
37	cmp	r2, #0
38	sub	r2, r2, #1
39	beq	9f
40	and	ip, r1, #255
41	mov	r3, r0
42	b	2f
431:
44	cmp	r2, #0
45	sub	r2, r2, #1
46	beq	9f
472:
48	strb	ip, [r3], #1
49	tst	r3, #3
50	bne	1b
513:
52	cmp	r2, #3
53	bls	7f
54	and	lr, r1, #255
55	orr	lr, lr, lr, asl #8
56	cmp	r2, #15
57	orr	lr, lr, lr, asl #16
58	bls	5f
59	mov	r4, r2
60	add	ip, r3, #16
614:
62	sub	r4, r4, #16
63	cmp	r4, #15
64	str	lr, [ip, #-16]
65	str	lr, [ip, #-12]
66	str	lr, [ip, #-8]
67	str	lr, [ip, #-4]
68	add	ip, ip, #16
69	bhi	4b
70	sub	ip, r2, #16
71	bic	ip, ip, #15
72	and	r2, r2, #15
73	add	ip, ip, #16
74	cmp	r2, #3
75	add	r3, r3, ip
76	bls	7f
775:
78	mov	r4, r3
79	mov	ip, r2
806:
81	sub	ip, ip, #4
82	cmp	ip, #3
83	str	lr, [r4], #4
84	bhi	6b
85	sub	ip, r2, #4
86	bic	ip, ip, #3
87	add	ip, ip, #4
88	add	r3, r3, ip
89	and	r2, r2, #3
907:
91	cmp	r2, #0
92	andne	r1, r1, #255
93	addne	r2, r3, r2
94	beq	9f
958:
96	strb	r1, [r3], #1
97	cmp	r3, r2
98	bne	8b
999:
100	ldmfd	sp!, {r4, lr}
101	bx	lr
10210:
103	mov	r3, r0
104	b	3b
105	.size memset, . - memset
106