1/*
2   Copyright (c) 2015, Synopsys, Inc. All rights reserved.
3
4   Redistribution and use in source and binary forms, with or without
5   modification, are permitted provided that the following conditions are met:
6
7   1) Redistributions of source code must retain the above copyright notice,
8   this list of conditions and the following disclaimer.
9
10   2) Redistributions in binary form must reproduce the above copyright notice,
11   this list of conditions and the following disclaimer in the documentation
12   and/or other materials provided with the distribution.
13
14   3) Neither the name of the Synopsys, Inc., nor the names of its contributors
15   may be used to endorse or promote products derived from this software
16   without specific prior written permission.
17
18   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28   POSSIBILITY OF SUCH DAMAGE.
29*/
30
31/* This implementation is optimized for performance.  For code size a generic
32   implementation of this function from newlib/libc/string/strcpy.c will be
33   used.  */
34#if !defined (__OPTIMIZE_SIZE__) && !defined (PREFER_SIZE_OVER_SPEED)
35
36#include "asm.h"
37
38#if (defined (__ARC700__) || defined (__ARCEM__) || defined (__ARCHS__)) \
39    && defined (__ARC_BARREL_SHIFTER__)
40
41/* If dst and src are 4 byte aligned, copy 8 bytes at a time.
42   If the src is 4, but not 8 byte aligned, we first read 4 bytes to get
43   it 8 byte aligned.  Thus, we can do a little read-ahead, without
44   dereferencing a cache line that we should not touch.
45   Note that short and long instructions have been scheduled to avoid
46   branch stalls.
47   The beq_s to r3z could be made unaligned & long to avoid a stall
48   there, but the it is not likely to be taken often, and it
49   would also be likey to cost an unaligned mispredict at the next call.  */
50
51ENTRY (strcpy)
52	or	r2,r0,r1
53	bmsk_s	r2,r2,1
54	brne.d	r2,0,charloop
55	mov_s	r10,r0
56	ld_s	r3,[r1,0]
57	mov	r8,0x01010101
58	bbit0.d	r1,2,loop_start
59	ror	r12,r8
60	sub	r2,r3,r8
61	bic_s	r2,r2,r3
62	tst_s	r2,r12
63	bne_l	r3z
64	mov_s	r4,r3
65	.balign 4
66loop:
67	ld.a	r3,[r1,4]
68	st.ab	r4,[r10,4]
69loop_start:
70	ld.a	r4,[r1,4]
71	sub	r2,r3,r8
72	bic_s	r2,r2,r3
73	tst_l	r2,r12
74	bne_l	r3z
75	st.ab	r3,[r10,4]
76	sub	r2,r4,r8
77	bic	r2,r2,r4
78	tst_l	r2,r12
79	beq_l	loop
80	mov_s	r3,r4
81#ifdef __LITTLE_ENDIAN__
82r3z:	bmsk.f	r1,r3,7
83	lsr_s	r3,r3,8
84#else
85r3z:	lsr.f	r1,r3,24
86	asl_s	r3,r3,8
87#endif
88	bne.d	r3z
89	stb.ab	r1,[r10,1]
90	j_s	[blink]
91
92	.balign	4
93charloop:
94	ldb.ab	r3,[r1,1]
95
96
97	brne.d	r3,0,charloop
98	stb.ab	r3,[r10,1]
99	j	[blink]
100ENDFUNC (strcpy)
101#endif /* (__ARC700__ || __ARCEM__ || __ARCHS__) && __ARC_BARREL_SHIFTER__ */
102
103#endif /* !__OPTIMIZE_SIZE__ && !PREFER_SIZE_OVER_SPEED */
104