1/*
2   Copyright (c) 2015, Synopsys, Inc. All rights reserved.
3
4   Redistribution and use in source and binary forms, with or without
5   modification, are permitted provided that the following conditions are met:
6
7   1) Redistributions of source code must retain the above copyright notice,
8   this list of conditions and the following disclaimer.
9
10   2) Redistributions in binary form must reproduce the above copyright notice,
11   this list of conditions and the following disclaimer in the documentation
12   and/or other materials provided with the distribution.
13
14   3) Neither the name of the Synopsys, Inc., nor the names of its contributors
15   may be used to endorse or promote products derived from this software
16   without specific prior written permission.
17
18   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28   POSSIBILITY OF SUCH DAMAGE.
29*/
30
31/* This implementation is optimized for performance.  For code size a generic
32   implementation of this function from newlib/libc/string/strcpy.c will be
33   used.  */
34#if !defined (__OPTIMIZE_SIZE__) && !defined (PREFER_SIZE_OVER_SPEED)
35
36#include "asm.h"
37
38#if defined (__ARC600__) && defined (__ARC_BARREL_SHIFTER__)
39/* If dst and src are 4 byte aligned, copy 8 bytes at a time.
40   If the src is 4, but not 8 byte aligned, we first read 4 bytes to get
41   it 8 byte aligned.  Thus, we can do a little read-ahead, without
42   dereferencing a cache line that we should not touch.
43   Note that short and long instructions have been scheduled to avoid
44   branch stalls.
45   This version is optimized for the ARC600 pipeline.  */
46
47ENTRY (strcpy)
48	or	r2,r0,r1
49	bmsk.f	0,r2,1
50	mov	r8,0x01010101
51	bne.d	.Lcharloop
52	mov_s	r10,r0
53	ld_l	r3,[r1,0]
54	bbit0.d	r1,2,.Loop_setup
55	ror	r12,r8
56	sub	r2,r3,r8
57	bic_s	r2,r2,r3
58	and_s	r2,r2,r12
59	brne_s	r2,0,.Lr3z
60	st.ab	r3,[r10,4]
61	ld.a	r3,[r1,4]
62.Loop_setup:
63	ld.a	r4,[r1,4]
64
65	sub	r2,r3,r8
66	and.f	r2,r2,r12
67	sub	r5,r4,r8
68	and.eq.f r5,r5,r12
69	b.d	.Loop_start
70	mov_s	r6,r3
71	.balign	4
72.Loop:
73	ld.a	r3,[r1,4]
74	st	r4,[r10,4]
75	ld.a	r4,[r1,4]
76	sub	r2,r3,r8
77	and.f	r2,r2,r12
78	sub	r5,r4,r8
79	and.eq.f r5,r5,r12
80	st.ab	r6,[r10,8]
81	mov	r6,r3
82.Loop_start:
83	beq.d	.Loop
84	bic_s	r2,r2,r3
85	brne.d	r2,0,.Lr3z
86	and	r5,r5,r12
87	bic	r5,r5,r4
88	breq.d	r5,0,.Loop
89	mov_s	r3,r4
90	st.ab	r6,[r10,4]
91#ifdef __LITTLE_ENDIAN__
92.Lr3z:	bmsk.f	r1,r3,7
93.Lr3z_loop:
94	lsr_s	r3,r3,8
95	stb.ab	r1,[r10,1]
96	bne.d	.Lr3z_loop
97	bmsk.f	r1,r3,7
98	j_s	[blink]
99#else
100.Lr3z:	lsr.f	r1,r3,24
101.Lr3z_loop:
102	asl_s	r3,r3,8
103	stb.ab	r1,[r10,1]
104	bne.d	.Lr3z_loop
105	lsr.f	r1,r3,24
106	j_s	[blink]
107#endif
108
109	.balign	4
110.Lcharloop:
111	ldb.ab	r3,[r1,1]
112
113
114	brne.d	r3,0,.Lcharloop
115	stb.ab	r3,[r10,1]
116	j	[blink]
117ENDFUNC (strcpy)
118#endif /* __ARC600__ && __ARC_BARREL_SHIFTER__ */
119
120#endif /* !__OPTIMIZE_SIZE__ && !PREFER_SIZE_OVER_SPEED */
121