1/*
2   Copyright (c) 2015, Synopsys, Inc. All rights reserved.
3
4   Redistribution and use in source and binary forms, with or without
5   modification, are permitted provided that the following conditions are met:
6
7   1) Redistributions of source code must retain the above copyright notice,
8   this list of conditions and the following disclaimer.
9
10   2) Redistributions in binary form must reproduce the above copyright notice,
11   this list of conditions and the following disclaimer in the documentation
12   and/or other materials provided with the distribution.
13
14   3) Neither the name of the Synopsys, Inc., nor the names of its contributors
15   may be used to endorse or promote products derived from this software
16   without specific prior written permission.
17
18   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28   POSSIBILITY OF SUCH DAMAGE.
29*/
30
31/* ABI interface file
32   these are the stack mappings for the registers
33   as stored in the ABI for ARC */
34
35#define ARC_REGSIZE	__SIZEOF_LONG__
36
37ABIr13	= 0
38ABIr14	= ABIr13 + ARC_REGSIZE
39ABIr15	= ABIr14 + ARC_REGSIZE
40ABIr16	= ABIr15 + ARC_REGSIZE
41ABIr17	= ABIr16 + ARC_REGSIZE
42ABIr18	= ABIr17 + ARC_REGSIZE
43ABIr19	= ABIr18 + ARC_REGSIZE
44ABIr20	= ABIr19 + ARC_REGSIZE
45ABIr21	= ABIr20 + ARC_REGSIZE
46ABIr22	= ABIr21 + ARC_REGSIZE
47ABIr23	= ABIr22 + ARC_REGSIZE
48ABIr24	= ABIr23 + ARC_REGSIZE
49ABIr25	= ABIr24 + ARC_REGSIZE
50ABIr26	= ABIr25 + ARC_REGSIZE
51ABIr27	= ABIr26 + ARC_REGSIZE
52ABIr28	= ABIr27 + ARC_REGSIZE
53ABIr29	= ABIr28 + ARC_REGSIZE
54ABIr30	= ABIr29 + ARC_REGSIZE
55ABIr31	= ABIr30 + ARC_REGSIZE
56ABIlpc	= ABIr31 + ARC_REGSIZE
57ABIlps	= ABIlpc + ARC_REGSIZE
58ABIlpe	= ABIlps + ARC_REGSIZE
59
60ABIflg	= ABIlpe + ARC_REGSIZE
61ABImlo	= ABIflg + ARC_REGSIZE
62ABImhi	= ABImlo + ARC_REGSIZE
63
64	.text
65	.align 4
66	.global setjmp
67	.type setjmp,@function
68setjmp:
69	st	r13, [r0, ABIr13]
70	st	r14, [r0, ABIr14]
71	st	r15, [r0, ABIr15]
72	st	r16, [r0, ABIr16]
73	st	r17, [r0, ABIr17]
74	st	r18, [r0, ABIr18]
75	st	r19, [r0, ABIr19]
76	st	r20, [r0, ABIr20]
77	st	r21, [r0, ABIr21]
78	st	r22, [r0, ABIr22]
79	st	r23, [r0, ABIr23]
80	st	r24, [r0, ABIr24]
81	st	r25, [r0, ABIr25]
82	st	r26, [r0, ABIr26]
83	st	r27, [r0, ABIr27]
84	st	r28, [r0, ABIr28]
85	st	r29, [r0, ABIr29]
86	st	r30, [r0, ABIr30]
87	st	blink, [r0, ABIr31]
88#ifndef __ARCV3__
89	st	lp_count, [r0, ABIlpc]
90#endif
91	lr	r2, [lp_start]
92	lr	r3, [lp_end]
93	st	r2, [r0, ABIlps]
94	st	r3, [r0, ABIlpe]
95
96#if (!defined (__ARC700__) && !defined (__ARCEM__) && !defined (__ARCHS__))
97; Till the configure changes are decided, and implemented, the code working on
98; mlo/mhi and using mul64 should be disabled.
99; 	st	mlo, [r0, ABImlo]
100; 	st	mhi, [r0, ABImhi]
101	lr	r2, [status32]
102	st	r2, [r0, ABIflg]
103#endif
104
105	j.d	[blink]
106	mov	r0,0
107.Lfe1:
108	.size	setjmp,.Lfe1-setjmp
109
110	.align	4
111	.global longjmp
112	.type longjmp,@function
113longjmp:
114
115	; load registers
116	ld	r13, [r0, ABIr13]
117	ld	r14, [r0, ABIr14]
118	ld	r15, [r0, ABIr15]
119	ld	r16, [r0, ABIr16]
120	ld	r17, [r0, ABIr17]
121	ld	r18, [r0, ABIr18]
122	ld	r19, [r0, ABIr19]
123	ld	r20, [r0, ABIr20]
124	ld	r21, [r0, ABIr21]
125	ld	r22, [r0, ABIr22]
126	ld	r23, [r0, ABIr23]
127	ld	r24, [r0, ABIr24]
128	ld	r25, [r0, ABIr25]
129	ld	r26, [r0, ABIr26]
130	ld	r27, [r0, ABIr27]
131	ld	r28, [r0, ABIr28]
132
133	ld	r3, [r0, ABIr29]
134	mov	r29, r3
135
136	ld	r3, [r0, ABIr30]
137	mov	r30, r3
138
139	ld	blink, [r0, ABIr31]
140
141#ifndef __ARCV3__
142	ld	r3,  [r0, ABIlpc]
143	mov	lp_count, r3
144#endif
145
146	ld	r2, [r0, ABIlps]
147	ld	r3, [r0, ABIlpe]
148	sr	r2, [lp_start]
149	sr	r3, [lp_end]
150
151#if (!defined (__ARC700__) && !defined (__ARCEM__) && !defined (__ARCHS__))
152	ld	r2, [r0, ABImlo]
153	ld	r3, [r0, ABImhi]
154; We do not support restoring of mulhi and mlo registers, yet.
155
156;	mulu64	0,r2,1			; restores mlo
157;	mov	0,mlo			; force multiply to finish
158;	sr	r3, [mulhi]
159	ld	r2, [r0, ABIflg]
160	flag	r2			; restore "status32" register
161#endif
162
163	mov.f	r1, r1			; to avoid return 0 from longjmp
164	mov.eq	r1, 1
165	j.d	[blink]
166	mov	r0,r1
167.Lfe2:
168	.size	longjmp,.Lfe2-longjmp
169