1/* 2 Copyright (c) 2015, Synopsys, Inc. All rights reserved. 3 4 Redistribution and use in source and binary forms, with or without 5 modification, are permitted provided that the following conditions are met: 6 7 1) Redistributions of source code must retain the above copyright notice, 8 this list of conditions and the following disclaimer. 9 10 2) Redistributions in binary form must reproduce the above copyright notice, 11 this list of conditions and the following disclaimer in the documentation 12 and/or other materials provided with the distribution. 13 14 3) Neither the name of the Synopsys, Inc., nor the names of its contributors 15 may be used to endorse or promote products derived from this software 16 without specific prior written permission. 17 18 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 POSSIBILITY OF SUCH DAMAGE. 29*/ 30 31/* ABI interface file 32 these are the stack mappings for the registers 33 as stored in the ABI for ARC */ 34 35#ifdef __ARC64__ 36#define ARC_REGSIZE 8 37#else 38#define ARC_REGSIZE 4 39#endif 40 41 .file "setjmp.S" 42 43ABIr13 = 0 44ABIr14 = ABIr13 + ARC_REGSIZE 45ABIr15 = ABIr14 + ARC_REGSIZE 46ABIr16 = ABIr15 + ARC_REGSIZE 47ABIr17 = ABIr16 + ARC_REGSIZE 48ABIr18 = ABIr17 + ARC_REGSIZE 49ABIr19 = ABIr18 + ARC_REGSIZE 50ABIr20 = ABIr19 + ARC_REGSIZE 51ABIr21 = ABIr20 + ARC_REGSIZE 52ABIr22 = ABIr21 + ARC_REGSIZE 53ABIr23 = ABIr22 + ARC_REGSIZE 54ABIr24 = ABIr23 + ARC_REGSIZE 55ABIr25 = ABIr24 + ARC_REGSIZE 56ABIr26 = ABIr25 + ARC_REGSIZE 57ABIr27 = ABIr26 + ARC_REGSIZE 58ABIr28 = ABIr27 + ARC_REGSIZE 59ABIr29 = ABIr28 + ARC_REGSIZE 60ABIr30 = ABIr29 + ARC_REGSIZE 61ABIr31 = ABIr30 + ARC_REGSIZE 62ABIlpc = ABIr31 + ARC_REGSIZE 63ABIlps = ABIlpc + ARC_REGSIZE 64ABIlpe = ABIlps + ARC_REGSIZE 65 66ABIflg = ABIlpe + ARC_REGSIZE 67ABImlo = ABIflg + ARC_REGSIZE 68ABImhi = ABImlo + ARC_REGSIZE 69 70 .text 71 .align 4 72 .global setjmp 73 .type setjmp,@function 74setjmp: 75 st r13, [r0, ABIr13] 76 st r14, [r0, ABIr14] 77 st r15, [r0, ABIr15] 78 st r16, [r0, ABIr16] 79 st r17, [r0, ABIr17] 80 st r18, [r0, ABIr18] 81 st r19, [r0, ABIr19] 82 st r20, [r0, ABIr20] 83 st r21, [r0, ABIr21] 84 st r22, [r0, ABIr22] 85 st r23, [r0, ABIr23] 86 st r24, [r0, ABIr24] 87 st r25, [r0, ABIr25] 88 st r26, [r0, ABIr26] 89 st r27, [r0, ABIr27] 90 st r28, [r0, ABIr28] 91 st r29, [r0, ABIr29] 92 st r30, [r0, ABIr30] 93 st blink, [r0, ABIr31] 94 st lp_count, [r0, ABIlpc] 95 96 lr r2, [lp_start] 97 lr r3, [lp_end] 98 st r2, [r0, ABIlps] 99 st r3, [r0, ABIlpe] 100 101#if (!defined (__ARC700__) && !defined (__ARCEM__) && !defined (__ARCHS__)) 102; Till the configure changes are decided, and implemented, the code working on 103; mlo/mhi and using mul64 should be disabled. 104; st mlo, [r0, ABImlo] 105; st mhi, [r0, ABImhi] 106 lr r2, [status32] 107 st r2, [r0, ABIflg] 108#endif 109 110 j.d [blink] 111 mov r0,0 112.Lfe1: 113 .size setjmp,.Lfe1-setjmp 114 115 .align 4 116 .global longjmp 117 .type longjmp,@function 118longjmp: 119 120 ; load registers 121 ld r13, [r0, ABIr13] 122 ld r14, [r0, ABIr14] 123 ld r15, [r0, ABIr15] 124 ld r16, [r0, ABIr16] 125 ld r17, [r0, ABIr17] 126 ld r18, [r0, ABIr18] 127 ld r19, [r0, ABIr19] 128 ld r20, [r0, ABIr20] 129 ld r21, [r0, ABIr21] 130 ld r22, [r0, ABIr22] 131 ld r23, [r0, ABIr23] 132 ld r24, [r0, ABIr24] 133 ld r25, [r0, ABIr25] 134 ld r26, [r0, ABIr26] 135 ld r27, [r0, ABIr27] 136 ld r28, [r0, ABIr28] 137 138 ld r3, [r0, ABIr29] 139 mov r29, r3 140 141 ld r3, [r0, ABIr30] 142 mov r30, r3 143 144 ld blink, [r0, ABIr31] 145 146 ld r3, [r0, ABIlpc] 147 mov lp_count, r3 148 149 ld r2, [r0, ABIlps] 150 ld r3, [r0, ABIlpe] 151 sr r2, [lp_start] 152 sr r3, [lp_end] 153 154#if (!defined (__ARC700__) && !defined (__ARCEM__) && !defined (__ARCHS__)) 155 ld r2, [r0, ABImlo] 156 ld r3, [r0, ABImhi] 157; We do not support restoring of mulhi and mlo registers, yet. 158 159; mulu64 0,r2,1 ; restores mlo 160; mov 0,mlo ; force multiply to finish 161; sr r3, [mulhi] 162 ld r2, [r0, ABIflg] 163 flag r2 ; restore "status32" register 164#endif 165 166 mov.f r1, r1 ; to avoid return 0 from longjmp 167 mov.eq r1, 1 168 j.d [blink] 169 mov r0,r1 170.Lfe2: 171 .size longjmp,.Lfe2-longjmp 172
