1 /* 2 * Copyright (c) 2017-2020 Arm Limited 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 #ifndef __MUSCA_S1_SCC_DRV_H__ 17 #define __MUSCA_S1_SCC_DRV_H__ 18 19 #include <stdint.h> 20 #include <stddef.h> 21 #include <stdbool.h> 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /** 28 * \brief Enum to store alternate function values. 29 * They are used as shift operand, must be unsigned. 30 */ 31 enum gpio_altfunc_t { 32 GPIO_MAIN_FUNC = 0UL, 33 GPIO_ALTFUNC_1, 34 GPIO_ALTFUNC_2, 35 GPIO_ALTFUNC_MAX 36 }; 37 38 #define GPIO_ALTFUNC_ALL_MASK ((1U << GPIO_ALTFUNC_MAX) - 1) 39 40 /** 41 * \brief Enum to store alternate function mask values. 42 */ 43 enum gpio_altfunc_mask_t { 44 GPIO_ALTFUNC_NONE = 0, 45 GPIO_MAIN_FUNC_MASK = (1UL << GPIO_MAIN_FUNC), 46 GPIO_ALTFUNC_1_MASK = (1UL << GPIO_ALTFUNC_1), 47 GPIO_ALTFUNC_2_MASK = (1UL << GPIO_ALTFUNC_2), 48 GPIO_MAIN_FUNC_NEG_MASK = (~GPIO_MAIN_FUNC_MASK & GPIO_ALTFUNC_ALL_MASK), 49 GPIO_ALTFUNC_1_NEG_MASK = (~GPIO_ALTFUNC_1_MASK & GPIO_ALTFUNC_ALL_MASK), 50 GPIO_ALTFUNC_2_NEG_MASK = (~GPIO_ALTFUNC_2_MASK & GPIO_ALTFUNC_ALL_MASK) 51 }; 52 53 enum pinmode_select_t { 54 PINMODE_NONE, 55 PINMODE_PULL_DOWN, 56 PINMODE_PULL_UP 57 }; 58 59 /* MUSCA SCC device configuration structure */ 60 struct musca_s1_scc_dev_cfg_t { 61 const uint32_t base; /*!< SCC base address */ 62 }; 63 64 /* MUSCA SCC device structure */ 65 struct musca_s1_scc_dev_t { 66 const struct musca_s1_scc_dev_cfg_t* const cfg; /*!< SCC configuration */ 67 }; 68 69 /** 70 * \brief Sets selected alternate functions for selected pins 71 * 72 * \param[in] dev SCC device pointer \ref musca_s1_scc_dev_t 73 * \param[in] altfunc Alternate function to set \ref gpio_altfunc_t 74 * \param[in] pin_mask Pin mask for the alternate functions 75 * 76 * \note This function doesn't check if scc dev is NULL. 77 * \note If no alternate function is selected, the function won't do anything 78 */ 79 void musca_s1_scc_set_alt_func(struct musca_s1_scc_dev_t* dev, 80 enum gpio_altfunc_t altfunc, uint32_t pin_mask); 81 82 /** 83 * \brief Sets pinmode for the given pins 84 * 85 * \param[in] dev SCC device pointer \ref musca_s1_scc_dev_t 86 * \param[in] pin_mask Pin mask for the alternate functions 87 * \param[in] mode Pin mode to set \ref pinmode_select_t 88 * 89 * \note This function doesn't check if scc dev is NULL. 90 */ 91 void musca_s1_scc_set_pinmode(struct musca_s1_scc_dev_t* dev, uint32_t pin_mask, 92 enum pinmode_select_t mode); 93 94 /** 95 * \brief Sets default input values for the selected pins 96 * 97 * \param[in] dev SCC device pointer \ref musca_s1_scc_dev_t 98 * \param[in] altfunc The selected alternate function that is set the 99 * specified default in value \ref gpio_altfunc_t 100 * \param[in] default_in_mask Pin mask for selecting pins 101 * \param[in] default_in_value Pin values for the selected pins 102 * 103 * \note This function doesn't check if scc_base is NULL. 104 * \note If no alternate function is selected, the function won't do anything 105 */ 106 void musca_s1_scc_set_default_in(struct musca_s1_scc_dev_t* dev, 107 enum gpio_altfunc_t altfunc, 108 uint32_t default_in_mask, 109 uint32_t default_in_value); 110 111 /** 112 * \brief Enables eMRAM fast read 113 * 114 */ 115 void musca_s1_scc_mram_fast_read_enable(struct musca_s1_scc_dev_t* dev); 116 117 /** 118 * \brief Disables eMRAM fast read 119 * 120 */ 121 void musca_s1_scc_mram_fast_read_disable(struct musca_s1_scc_dev_t* dev); 122 123 /** 124 * \brief Check if eMRAM fast read is enabled 125 * 126 * \return Returns bool, true if fast read is enabled, false otherwise 127 */ 128 bool musca_s1_scc_mram_is_fast_read_enabled(struct musca_s1_scc_dev_t* dev); 129 130 #ifdef __cplusplus 131 } 132 #endif 133 134 #endif /* __MUSCA_S1_SCC_DRV_H__ */ 135
