1 /*
2 * Copyright (c) 2020, 2021 Antony Pavlov <antonynpavlov@gmail.com>
3 * Copyright (c) 2021 Remy Luisant <remy@luisant.ca>
4 *
5 * Based on riscv_machine_timer.c and xtensa_sys_timer.c
6 *
7 * SPDX-License-Identifier: Apache-2.0
8 */
9
10 #include <limits.h>
11
12 #include <zephyr/init.h>
13 #include <zephyr/drivers/timer/system_timer.h>
14 #include <zephyr/irq.h>
15 #include <zephyr/sys_clock.h>
16 #include <zephyr/spinlock.h>
17 #include <soc.h>
18 #include <mips/mipsregs.h>
19
20 #define CYC_PER_TICK ((uint32_t)((uint64_t)sys_clock_hw_cycles_per_sec() \
21 / (uint64_t)CONFIG_SYS_CLOCK_TICKS_PER_SEC))
22 #define MAX_CYC INT_MAX
23 #define MAX_TICKS ((MAX_CYC - CYC_PER_TICK) / CYC_PER_TICK)
24 #define MIN_DELAY 1000
25
26 #define TICKLESS IS_ENABLED(CONFIG_TICKLESS_KERNEL)
27
28 static struct k_spinlock lock;
29 static uint32_t last_count;
30
set_cp0_compare(uint32_t time)31 static ALWAYS_INLINE void set_cp0_compare(uint32_t time)
32 {
33 _mips_write_32bit_c0_register(CP0_COMPARE, time);
34 }
35
get_cp0_count(void)36 static ALWAYS_INLINE uint32_t get_cp0_count(void)
37 {
38 return _mips_read_32bit_c0_register(CP0_COUNT);
39 }
40
timer_isr(const void * arg)41 static void timer_isr(const void *arg)
42 {
43 ARG_UNUSED(arg);
44
45 k_spinlock_key_t key = k_spin_lock(&lock);
46 uint32_t now = get_cp0_count();
47 uint32_t dticks = ((now - last_count) / CYC_PER_TICK);
48
49 last_count = now;
50
51 if (!TICKLESS) {
52 uint32_t next = last_count + CYC_PER_TICK;
53
54 if (next - now < MIN_DELAY) {
55 next += CYC_PER_TICK;
56 }
57 set_cp0_compare(next);
58 }
59
60 k_spin_unlock(&lock, key);
61 sys_clock_announce(TICKLESS ? dticks : 1);
62 }
63
sys_clock_set_timeout(int32_t ticks,bool idle)64 void sys_clock_set_timeout(int32_t ticks, bool idle)
65 {
66 ARG_UNUSED(idle);
67
68 if (!TICKLESS) {
69 return;
70 }
71
72 ticks = ticks == K_TICKS_FOREVER ? MAX_TICKS : ticks;
73 ticks = CLAMP(ticks - 1, 0, (int32_t)MAX_TICKS);
74
75 k_spinlock_key_t key = k_spin_lock(&lock);
76 uint32_t current_count = get_cp0_count();
77 uint32_t delay_wanted = ticks * CYC_PER_TICK;
78
79 /* Round up to next tick boundary. */
80 uint32_t adj = (current_count - last_count) + (CYC_PER_TICK - 1);
81
82 if (delay_wanted <= MAX_CYC - adj) {
83 delay_wanted += adj;
84 } else {
85 delay_wanted = MAX_CYC;
86 }
87 delay_wanted = (delay_wanted / CYC_PER_TICK) * CYC_PER_TICK;
88
89 if ((int32_t)(delay_wanted + last_count - current_count) < MIN_DELAY) {
90 delay_wanted += CYC_PER_TICK;
91 }
92
93 set_cp0_compare(delay_wanted + last_count);
94 k_spin_unlock(&lock, key);
95 }
96
sys_clock_elapsed(void)97 uint32_t sys_clock_elapsed(void)
98 {
99 if (!TICKLESS) {
100 return 0;
101 }
102
103 k_spinlock_key_t key = k_spin_lock(&lock);
104 uint32_t ticks_elapsed = (get_cp0_count() - last_count) / CYC_PER_TICK;
105
106 k_spin_unlock(&lock, key);
107 return ticks_elapsed;
108 }
109
sys_clock_cycle_get_32(void)110 uint32_t sys_clock_cycle_get_32(void)
111 {
112 return get_cp0_count();
113 }
114
sys_clock_driver_init(void)115 static int sys_clock_driver_init(void)
116 {
117
118 IRQ_CONNECT(MIPS_MACHINE_TIMER_IRQ, 0, timer_isr, NULL, 0);
119 last_count = get_cp0_count();
120
121 /*
122 * In a tickless system the first tick might possibly be pushed
123 * much further into the future than is being done here.
124 */
125 set_cp0_compare(last_count + CYC_PER_TICK);
126
127 irq_enable(MIPS_MACHINE_TIMER_IRQ);
128
129 return 0;
130 }
131
132 SYS_INIT(sys_clock_driver_init, PRE_KERNEL_2,
133 CONFIG_SYSTEM_CLOCK_INIT_PRIORITY);
134
