1 /*
2 * Copyright (c) 2021 Vestas Wind Systems A/S
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #define DT_DRV_COMPAT nxp_kinetis_lptmr
8
9 #include <zephyr/init.h>
10 #include <zephyr/drivers/timer/system_timer.h>
11 #include <zephyr/kernel.h>
12 #include <zephyr/sys/time_units.h>
13 #include <fsl_lptmr.h>
14 #include <zephyr/irq.h>
15
16 BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) == 1,
17 "No LPTMR instance enabled in devicetree");
18
19 /* Prescaler mapping */
20 #define LPTMR_PRESCALER_2 kLPTMR_Prescale_Glitch_0
21 #define LPTMR_PRESCALER_4 kLPTMR_Prescale_Glitch_1
22 #define LPTMR_PRESCALER_8 kLPTMR_Prescale_Glitch_2
23 #define LPTMR_PRESCALER_16 kLPTMR_Prescale_Glitch_3
24 #define LPTMR_PRESCALER_32 kLPTMR_Prescale_Glitch_4
25 #define LPTMR_PRESCALER_64 kLPTMR_Prescale_Glitch_5
26 #define LPTMR_PRESCALER_128 kLPTMR_Prescale_Glitch_6
27 #define LPTMR_PRESCALER_256 kLPTMR_Prescale_Glitch_7
28 #define LPTMR_PRESCALER_512 kLPTMR_Prescale_Glitch_8
29 #define LPTMR_PRESCALER_1024 kLPTMR_Prescale_Glitch_9
30 #define LPTMR_PRESCALER_2048 kLPTMR_Prescale_Glitch_10
31 #define LPTMR_PRESCALER_4096 kLPTMR_Prescale_Glitch_11
32 #define LPTMR_PRESCALER_8192 kLPTMR_Prescale_Glitch_12
33 #define LPTMR_PRESCALER_16384 kLPTMR_Prescale_Glitch_13
34 #define LPTMR_PRESCALER_32768 kLPTMR_Prescale_Glitch_14
35 #define LPTMR_PRESCALER_65536 kLPTMR_Prescale_Glitch_15
36 #define TO_LPTMR_PRESCALER(val) _DO_CONCAT(LPTMR_PRESCALER_, val)
37
38 /* Prescaler clock mapping */
39 #define TO_LPTMR_CLK_SEL(val) _DO_CONCAT(kLPTMR_PrescalerClock_, val)
40
41 /* Devicetree properties */
42 #define LPTMR_BASE ((LPTMR_Type *)(DT_INST_REG_ADDR(0)))
43 #define LPTMR_CLK_SOURCE TO_LPTMR_CLK_SEL(DT_INST_PROP(0, clk_source));
44 #define LPTMR_PRESCALER TO_LPTMR_PRESCALER(DT_INST_PROP(0, prescaler));
45 #define LPTMR_BYPASS_PRESCALER DT_INST_PROP(0, prescaler) == 1
46 #define LPTMR_IRQN DT_INST_IRQN(0)
47 #define LPTMR_IRQ_PRIORITY DT_INST_IRQ(0, priority)
48
49 /* Timer cycles per tick */
50 #define CYCLES_PER_TICK ((uint32_t)((uint64_t)sys_clock_hw_cycles_per_sec() \
51 / (uint64_t)CONFIG_SYS_CLOCK_TICKS_PER_SEC))
52
53 /* 32 bit cycle counter */
54 static volatile uint32_t cycles;
55
sys_clock_set_timeout(int32_t ticks,bool idle)56 void sys_clock_set_timeout(int32_t ticks, bool idle)
57 {
58 ARG_UNUSED(idle);
59
60 if (idle && (ticks == K_TICKS_FOREVER)) {
61 LPTMR_DisableInterrupts(LPTMR_BASE, kLPTMR_TimerInterruptEnable);
62 }
63 }
64
sys_clock_idle_exit(void)65 void sys_clock_idle_exit(void)
66 {
67 if (LPTMR_GetEnabledInterrupts(LPTMR_BASE) != kLPTMR_TimerInterruptEnable) {
68 LPTMR_EnableInterrupts(LPTMR_BASE, kLPTMR_TimerInterruptEnable);
69 }
70 }
71
sys_clock_disable(void)72 void sys_clock_disable(void)
73 {
74 LPTMR_DisableInterrupts(LPTMR_BASE, kLPTMR_TimerInterruptEnable);
75 LPTMR_StopTimer(LPTMR_BASE);
76 }
77
sys_clock_elapsed(void)78 uint32_t sys_clock_elapsed(void)
79 {
80 return 0;
81 }
82
sys_clock_cycle_get_32(void)83 uint32_t sys_clock_cycle_get_32(void)
84 {
85 return LPTMR_GetCurrentTimerCount(LPTMR_BASE) + cycles;
86 }
87
mcux_lptmr_timer_isr(const void * arg)88 static void mcux_lptmr_timer_isr(const void *arg)
89 {
90 ARG_UNUSED(arg);
91
92 cycles += CYCLES_PER_TICK;
93
94 sys_clock_announce(1);
95 LPTMR_ClearStatusFlags(LPTMR_BASE, kLPTMR_TimerCompareFlag);
96 }
97
sys_clock_driver_init(void)98 static int sys_clock_driver_init(void)
99 {
100 lptmr_config_t config;
101
102
103 LPTMR_GetDefaultConfig(&config);
104 config.timerMode = kLPTMR_TimerModeTimeCounter;
105 config.enableFreeRunning = false;
106 config.prescalerClockSource = LPTMR_CLK_SOURCE;
107
108 #if LPTMR_BYPASS_PRESCALER
109 config.bypassPrescaler = true;
110 #else /* LPTMR_BYPASS_PRESCALER */
111 config.bypassPrescaler = false;
112 config.value = LPTMR_PRESCALER;
113 #endif /* !LPTMR_BYPASS_PRESCALER */
114
115 LPTMR_Init(LPTMR_BASE, &config);
116
117 IRQ_CONNECT(LPTMR_IRQN, LPTMR_IRQ_PRIORITY, mcux_lptmr_timer_isr, NULL, 0);
118 irq_enable(LPTMR_IRQN);
119
120 LPTMR_EnableInterrupts(LPTMR_BASE, kLPTMR_TimerInterruptEnable);
121 LPTMR_SetTimerPeriod(LPTMR_BASE, CYCLES_PER_TICK);
122 LPTMR_StartTimer(LPTMR_BASE);
123
124 return 0;
125 }
126
127 SYS_INIT(sys_clock_driver_init, PRE_KERNEL_2,
128 CONFIG_SYSTEM_CLOCK_INIT_PRIORITY);
129
