1 /* 2 * Copyright (c) 2017-2021 Nordic Semiconductor ASA 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 struct lll_adv_iso_stream { 8 /* Associated BIG Handle */ 9 uint8_t big_handle; 10 struct ll_iso_datapath *dp; 11 12 /* Transmission queue */ 13 MEMQ_DECLARE(tx); 14 memq_link_t link_tx; 15 memq_link_t *link_tx_free; 16 17 /* Downstream last packet sequence number */ 18 uint16_t pkt_seq_num; 19 }; 20 21 struct lll_adv_iso { 22 struct lll_hdr hdr; 23 struct lll_adv *adv; 24 25 uint8_t seed_access_addr[4]; 26 uint8_t base_crc_init[2]; 27 uint16_t latency_prepare; 28 uint16_t latency_event; 29 uint16_t data_chan_prn_s; 30 uint16_t data_chan_remap_idx; 31 uint8_t next_chan_use; 32 33 uint64_t payload_count:39; 34 uint64_t enc:1; 35 uint64_t framing:1; 36 uint64_t handle:8; 37 uint64_t cssn:3; 38 uint32_t iso_interval:12; 39 40 uint8_t data_chan_map[PDU_CHANNEL_MAP_SIZE]; 41 uint8_t data_chan_count:6; 42 uint8_t num_bis:5; 43 uint8_t bn:3; 44 uint8_t nse:5; 45 uint8_t phy:3; 46 47 uint32_t sub_interval:20; 48 uint32_t max_pdu:8; 49 uint32_t pto:4; 50 51 uint32_t bis_spacing:20; 52 uint32_t max_sdu:8; 53 uint32_t irc:4; 54 55 uint32_t sdu_interval:20; 56 uint32_t irc_curr:4; 57 uint32_t ptc_curr:4; 58 uint32_t ptc:4; 59 60 uint8_t bn_curr:3; 61 uint8_t bis_curr:5; 62 63 uint8_t phy_flags:1; 64 65 #define CHM_STATE_MASK BIT_MASK(2U) 66 #define CHM_STATE_REQ BIT(0U) 67 #define CHM_STATE_SEND BIT(1U) 68 uint8_t volatile chm_ack; 69 uint8_t chm_req; 70 uint8_t chm_chan_map[PDU_CHANNEL_MAP_SIZE]; 71 uint8_t chm_chan_count:6; 72 73 uint8_t term_req:1; 74 uint8_t term_ack:1; 75 uint8_t term_reason; 76 77 uint8_t ctrl_expire; 78 uint16_t ctrl_instant; 79 80 /* Encryption */ 81 uint8_t giv[8]; 82 struct ccm ccm_tx; 83 84 #if defined(CONFIG_BT_TICKER_EXT_EXPIRE_INFO) 85 /* contains the offset in ticks from the adv_sync pointing to this ISO */ 86 uint32_t ticks_sync_pdu_offset; 87 uint16_t iso_lazy; 88 #endif /* CONFIG_BT_TICKER_EXT_EXPIRE_INFO */ 89 90 uint16_t stream_handle[BT_CTLR_ADV_ISO_STREAM_MAX]; 91 92 #if defined(HAL_RADIO_GPIO_HAVE_PA_PIN) 93 uint16_t pa_iss_us; 94 #endif /* HAL_RADIO_GPIO_HAVE_PA_PIN */ 95 }; 96 97 struct lll_adv_sync { 98 struct lll_hdr hdr; 99 struct lll_adv *adv; 100 101 uint8_t access_addr[4]; 102 uint8_t crc_init[3]; 103 104 uint16_t latency_prepare; 105 uint16_t latency_event; 106 uint16_t event_counter; 107 108 uint16_t data_chan_id; 109 struct { 110 uint8_t data_chan_map[PDU_CHANNEL_MAP_SIZE]; 111 uint8_t data_chan_count:6; 112 } chm[DOUBLE_BUFFER_SIZE]; 113 uint8_t chm_first; 114 uint8_t chm_last; 115 uint16_t chm_instant; 116 117 struct lll_adv_pdu data; 118 119 #if defined(CONFIG_BT_CTLR_ADV_PDU_LINK) 120 /* Implementation defined radio event counter to calculate chain 121 * PDU channel index. 122 */ 123 uint16_t data_chan_counter; 124 125 struct pdu_adv *last_pdu; 126 #endif /* CONFIG_BT_CTLR_ADV_PDU_LINK */ 127 128 #if defined(CONFIG_BT_TICKER_EXT_EXPIRE_INFO) 129 /* contains the offset in us from adv_aux pointing to this sync */ 130 uint32_t us_adv_sync_pdu_offset; 131 uint16_t sync_lazy; 132 #endif /* CONFIG_BT_TICKER_EXT_EXPIRE_INFO */ 133 134 #if defined(CONFIG_BT_CTLR_ADV_ISO) 135 struct lll_adv_iso *iso; 136 uint8_t volatile iso_chm_done_req; 137 uint8_t iso_chm_done_ack; 138 #endif /* CONFIG_BT_CTLR_ADV_ISO */ 139 140 #if defined(CONFIG_BT_CTLR_DF_ADV_CTE_TX) 141 /* This flag is used only by LLL. It holds information if CTE 142 * transmission was started by LLL. 143 */ 144 uint8_t cte_started:1; 145 #endif /* CONFIG_BT_CTLR_DF_ADV_CTE_TX */ 146 }; 147 148 struct lll_adv_aux { 149 struct lll_hdr hdr; 150 struct lll_adv *adv; 151 152 /* Implementation defined radio event counter to calculate auxiliary 153 * PDU channel index. 154 */ 155 uint16_t data_chan_counter; 156 157 /* Store used by primary channel PDU event to fill the 158 * auxiliary offset to this auxiliary PDU event. 159 */ 160 uint32_t ticks_pri_pdu_offset; 161 uint32_t us_pri_pdu_offset; 162 163 struct lll_adv_pdu data; 164 #if defined(CONFIG_BT_CTLR_ADV_PDU_LINK) 165 struct pdu_adv *last_pdu; 166 #endif /* CONFIG_BT_CTLR_ADV_PDU_LINK */ 167 }; 168 169 struct lll_adv { 170 struct lll_hdr hdr; 171 172 #if defined(CONFIG_BT_PERIPHERAL) 173 /* NOTE: conn context SHALL be after lll_hdr, 174 * check ull_conn_setup how it access the connection LLL 175 * context. 176 */ 177 struct lll_conn *conn; 178 uint8_t is_hdcd:1; 179 #endif /* CONFIG_BT_PERIPHERAL */ 180 181 uint8_t chan_map:3; 182 uint8_t chan_map_curr:3; 183 uint8_t filter_policy:2; 184 185 #if defined(CONFIG_BT_CTLR_ADV_EXT) 186 uint8_t phy_p:3; 187 uint8_t phy_s:3; 188 uint8_t phy_flags:1; 189 #endif /* CONFIG_BT_CTLR_ADV_EXT */ 190 191 #if defined(CONFIG_BT_CTLR_SCAN_REQ_NOTIFY) 192 uint8_t scan_req_notify:1; 193 #endif 194 195 #if defined(CONFIG_BT_HCI_MESH_EXT) 196 uint8_t is_mesh:1; 197 #endif /* CONFIG_BT_HCI_MESH_EXT */ 198 199 #if defined(CONFIG_BT_CTLR_PRIVACY) 200 uint8_t rl_idx; 201 #endif /* CONFIG_BT_CTLR_PRIVACY */ 202 203 struct lll_adv_pdu adv_data; 204 struct lll_adv_pdu scan_rsp; 205 206 #if defined(CONFIG_BT_CTLR_ADV_EXT) 207 struct node_rx_pdu *node_rx_adv_term; 208 struct lll_adv_aux *aux; 209 210 #if defined(CONFIG_BT_CTLR_ADV_PERIODIC) 211 struct lll_adv_sync *sync; 212 #endif /* CONFIG_BT_CTLR_ADV_PERIODIC */ 213 #endif /* CONFIG_BT_CTLR_ADV_EXT */ 214 215 #if defined(CONFIG_BT_CTLR_TX_PWR_DYNAMIC_CONTROL) 216 int8_t tx_pwr_lvl; 217 #endif /* CONFIG_BT_CTLR_TX_PWR_DYNAMIC_CONTROL */ 218 }; 219 220 int lll_adv_init(void); 221 int lll_adv_reset(void); 222 void lll_adv_prepare(void *param); 223 224 extern uint16_t ull_adv_lll_handle_get(struct lll_adv *lll); 225
