1/*
2 * Copyright (c) 2022 Carlo Caione <ccaione@baylibre.com>
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/**
8 * @file
9 * @brief Linker command/script file
10 *
11 * Linker script for the Cortex-M platforms.
12 */
13
14#include <zephyr/linker/sections.h>
15#include <zephyr/devicetree.h>
16
17#include <zephyr/linker/linker-defs.h>
18#include <zephyr/linker/linker-tool.h>
19
20#if defined(CONFIG_NORDIC_QSPI_NOR) && defined(CONFIG_SOC_NRF5340_CPUAPP)
21
22/* On nRF5340, external flash is mapped in XIP region at 0x1000_0000. */
23
24#define EXTFLASH_NODE	DT_INST(0, nordic_qspi_nor)
25#define EXTFLASH_ADDR	0x10000000
26#define EXTFLASH_SIZE	DT_PROP_OR(EXTFLASH_NODE, size_in_bytes, \
27				   DT_PROP(EXTFLASH_NODE, size) / 8)
28
29#elif defined(CONFIG_STM32_MEMMAP) && DT_NODE_EXISTS(DT_INST(0, st_stm32_ospi_nor))
30/* On stm32 OSPI, external flash is mapped in XIP region at address given by the reg property. */
31
32#define EXTFLASH_NODE	DT_INST(0, st_stm32_ospi_nor)
33#define EXTFLASH_ADDR	DT_REG_ADDR(DT_INST(0, st_stm32_ospi_nor))
34#define EXTFLASH_SIZE	DT_REG_ADDR_BY_IDX(DT_INST(0, st_stm32_ospi_nor), 1)
35
36#elif defined(CONFIG_STM32_MEMMAP) && DT_NODE_EXISTS(DT_INST(0, st_stm32_qspi_nor))
37/* On stm32 QSPI, external flash is mapped in XIP region at address given by the reg property. */
38
39#define EXTFLASH_NODE	DT_INST(0, st_stm32_qspi_nor)
40#define EXTFLASH_ADDR	DT_REG_ADDR(DT_INST(0, st_stm32_qspi_nor))
41#define EXTFLASH_SIZE	DT_REG_ADDR_BY_IDX(DT_INST(0, st_stm32_qspi_nor), 1)
42
43#elif defined(CONFIG_STM32_MEMMAP) && DT_NODE_EXISTS(DT_INST(0, st_stm32_xspi_nor))
44/* On stm32 XSPI, external flash is mapped in XIP region at address given by the reg property. */
45
46#define EXTFLASH_NODE	DT_INST(0, st_stm32_xspi_nor)
47#define EXTFLASH_ADDR	DT_REG_ADDR(DT_INST(0, st_stm32_xspi_nor))
48#define EXTFLASH_SIZE	DT_REG_ADDR_BY_IDX(DT_INST(0, st_stm32_xspi_nor), 1)
49
50#else
51
52/*
53 * Add another fake portion of FLASH to simulate a secondary or external FLASH
54 * that we can do XIP from.
55 */
56#define EXTFLASH_ADDR	0x7000
57#define EXTFLASH_SIZE	(CONFIG_FLASH_SIZE * 1K - EXTFLASH_ADDR)
58
59#endif
60
61MEMORY
62{
63	EXTFLASH (rx) : ORIGIN = EXTFLASH_ADDR, LENGTH = EXTFLASH_SIZE
64}
65
66#include <zephyr/arch/arm/cortex_m/scripts/linker.ld>
67