1/*
2   Copyright (c) 2015-2024, Synopsys, Inc. All rights reserved.
3
4   Redistribution and use in source and binary forms, with or without
5   modification, are permitted provided that the following conditions are met:
6
7   1) Redistributions of source code must retain the above copyright notice,
8   this list of conditions and the following disclaimer.
9
10   2) Redistributions in binary form must reproduce the above copyright notice,
11   this list of conditions and the following disclaimer in the documentation
12   and/or other materials provided with the distribution.
13
14   3) Neither the name of the Synopsys, Inc., nor the names of its contributors
15   may be used to endorse or promote products derived from this software
16   without specific prior written permission.
17
18   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28   POSSIBILITY OF SUCH DAMAGE.
29*/
30
31/* This implementation is optimized for performance.  For code size a generic
32   implementation of this function from newlib/libc/string/strncpy.c will be
33   used.  */
34#include <picolibc.h>
35#if !defined (__OPTIMIZE_SIZE__) && !defined (PREFER_SIZE_OVER_SPEED) \
36    && !defined (__ARC_RF16__)
37
38#include "asm.h"
39
40/* If dst and src are 4 byte aligned, copy 8 bytes at a time.
41   If the src is 4, but not 8 byte aligned, we first read 4 bytes to get
42   it 8 byte aligned.  Thus, we can do a little read-ahead, without
43   dereferencing a cache line that we should not touch.
44   Note that short and long instructions have been scheduled to avoid
45   branch stalls.
46   The beq_s to r3z could be made unaligned & long to avoid a stall
47   there, but the it is not likely to be taken often, and it
48   would also be likey to cost an unaligned mispredict at the next call.  */
49
50#if !defined (__ARC601__) && defined (__ARC_BARREL_SHIFTER__)
51
52#if defined (__ARC700___) || defined (__ARCEM__) || defined (__ARCHS__)
53#define BRand(a,b,l)	tst	a,b ` bne_l l
54#else
55#define BRand(a,b,l)	and	a,a,b ` brne_s a,0,l
56#endif
57
58ENTRY (strncpy)
59	cmp_s	r2,8
60	or	r12,r0,r1
61	bmsk.cc.f r12,r12,1
62	brne.d	r12,0,.Lbytewise
63	mov_s	r10,r0
64	ld_s	r3,[r1,0]
65	mov	r8,0x01010101
66	sub	lp_count,r2,1
67	bbit0.d	r1,2,.Loop_start
68	ror	r11,r8
69	sub	r12,r3,r8
70	bic_l	r12,r12,r3
71	BRand	(r12,r11,.Lr3z)
72	mov_s	r4,r3
73	ld.a	r3,[r1,4]
74	sub	lp_count,lp_count,4
75	st.ab	r4,[r10,4]
76	.balign 4
77.Loop_start:
78	lsr.f	lp_count,lp_count,3
79	lpne	.Loop_end
80	ld.a	r4,[r1,4]
81	sub	r12,r3,r8
82	bic_s	r12,r12,r3
83	BRand	(r12,r11,.Lr3z)
84	st.ab	r3,[r10,4]
85	sub	r12,r4,r8
86	bic	r12,r12,r4
87	BRand	(r12,r11,.Lr4z)
88	ld.a	r3,[r1,4]
89	st.ab	r4,[r10,4]
90.Loop_end:
91	bcc_s	.Lastword
92	ld.a	r4,[r1,4]
93	sub	r12,r3,r8
94	bic_s	r12,r12,r3
95	BRand	(r12,r11,.Lr3z)
96	st.ab	r3,[r10,4]
97	mov_s	r3,r4
98.Lastword:
99	and.f	lp_count,r2,3
100	mov.eq	lp_count,4
101	lp	.Last_byte_end
102#ifdef __LITTLE_ENDIAN__
103	bmsk.f	r1,r3,7
104	lsr.ne	r3,r3,8
105#else
106	lsr.f	r1,r3,24
107	asl.ne	r3,r3,8
108#endif
109	stb.ab	r1,[r10,1]
110.Last_byte_end:
111	j_s	[blink]
112
113	.balign	4
114.Lr4z:
115	mov_l	r3,r4
116.Lr3z:
117#if defined (__ARC700__) || defined (__ARCEM__) || defined (__ARCHS__)
118#ifdef __LITTLE_ENDIAN__
119	bmsk.f	r1,r3,7
120	lsr_s	r3,r3,8
121#else
122	lsr.f	r1,r3,24
123	asl_s	r3,r3,8
124#endif
125	bne.d	.Lr3z
126	stb.ab	r1,[r10,1]
127#else /* ! __ARC700__ */
128#ifdef __LITTLE_ENDIAN__
129	bmsk.f	r1,r3,7
130.Lr3z_loop:
131	lsr_s	r3,r3,8
132	stb.ab	r1,[r10,1]
133	bne.d	.Lr3z_loop
134	bmsk.f	r1,r3,7
135#else
136	lsr.f	r1,r3,24
137.Lr3z_loop:
138	asl_s	r3,r3,8
139	stb.ab	r1,[r10,1]
140	bne.d	.Lr3z_loop
141	lsr.f	r1,r3,24
142#endif /* ENDIAN */
143#endif /* ! __ARC700__ */
144.Lzero_rest:
145	; __strncpy_bzero requires:
146	; return value in r0
147	; zeroing length in r2
148	; zeroing start address in r3
149	mov_s	r3,r10
150	add_s	r2,r2,r0
151	b.d	__strncpy_bzero
152	sub_s	r2,r2,r3
153
154	.balign	4
155.Lbytewise:
156	sub.f	r2,r2,1
157	mov_l	r3,r0
158	jcs	[blink]
159.Lcharloop:
160	ldb.ab	r12,[r1,1]
161	beq.d	.Last_byte
162	sub.f	r2,r2,1
163	brne.d	r12,0,.Lcharloop
164	stb.ab	r12,[r3,1]
165	b.d	__strncpy_bzero
166	stb.ab	r12,[r3,1]
167.Last_byte:
168	j_s.d	[blink]
169	stb_l	r12,[r3]
170ENDFUNC (strncpy)
171#endif /* !__ARC601__ && __ARC_BARREL_SHIFTER__ */
172
173#endif /* !__OPTIMIZE_SIZE__ && !PREFER_SIZE_OVER_SPEED */
174