1/* 2 Copyright (c) 2015-2024, Synopsys, Inc. All rights reserved. 3 4 Redistribution and use in source and binary forms, with or without 5 modification, are permitted provided that the following conditions are met: 6 7 1) Redistributions of source code must retain the above copyright notice, 8 this list of conditions and the following disclaimer. 9 10 2) Redistributions in binary form must reproduce the above copyright notice, 11 this list of conditions and the following disclaimer in the documentation 12 and/or other materials provided with the distribution. 13 14 3) Neither the name of the Synopsys, Inc., nor the names of its contributors 15 may be used to endorse or promote products derived from this software 16 without specific prior written permission. 17 18 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 POSSIBILITY OF SUCH DAMAGE. 29*/ 30 31/* This implementation is optimized for performance. For code size a generic 32 implementation of this function from newlib/libc/string/strcpy.c will be 33 used. */ 34#include <picolibc.h> 35 36#if !defined (__OPTIMIZE_SIZE__) && !defined (PREFER_SIZE_OVER_SPEED) \ 37 && !defined (__ARC_RF16__) 38 39#include "asm.h" 40 41#if defined (__ARC600__) && defined (__ARC_BARREL_SHIFTER__) 42/* If dst and src are 4 byte aligned, copy 8 bytes at a time. 43 If the src is 4, but not 8 byte aligned, we first read 4 bytes to get 44 it 8 byte aligned. Thus, we can do a little read-ahead, without 45 dereferencing a cache line that we should not touch. 46 Note that short and long instructions have been scheduled to avoid 47 branch stalls. 48 This version is optimized for the ARC600 pipeline. */ 49 50ENTRY (strcpy) 51 or r2,r0,r1 52 bmsk.f 0,r2,1 53 mov r8,0x01010101 54 bne.d .Lcharloop 55 mov_s r10,r0 56 ld_l r3,[r1,0] 57 bbit0.d r1,2,.Loop_setup 58 ror r12,r8 59 sub r2,r3,r8 60 bic_s r2,r2,r3 61 and_s r2,r2,r12 62 brne_s r2,0,.Lr3z 63 st.ab r3,[r10,4] 64 ld.a r3,[r1,4] 65.Loop_setup: 66 ld.a r4,[r1,4] 67 68 sub r2,r3,r8 69 and.f r2,r2,r12 70 sub r5,r4,r8 71 and.eq.f r5,r5,r12 72 b.d .Loop_start 73 mov_s r6,r3 74 .balign 4 75.Loop: 76 ld.a r3,[r1,4] 77 st r4,[r10,4] 78 ld.a r4,[r1,4] 79 sub r2,r3,r8 80 and.f r2,r2,r12 81 sub r5,r4,r8 82 and.eq.f r5,r5,r12 83 st.ab r6,[r10,8] 84 mov r6,r3 85.Loop_start: 86 beq.d .Loop 87 bic_s r2,r2,r3 88 brne.d r2,0,.Lr3z 89 and r5,r5,r12 90 bic r5,r5,r4 91 breq.d r5,0,.Loop 92 mov_s r3,r4 93 st.ab r6,[r10,4] 94#ifdef __LITTLE_ENDIAN__ 95.Lr3z: bmsk.f r1,r3,7 96.Lr3z_loop: 97 lsr_s r3,r3,8 98 stb.ab r1,[r10,1] 99 bne.d .Lr3z_loop 100 bmsk.f r1,r3,7 101 j_s [blink] 102#else 103.Lr3z: lsr.f r1,r3,24 104.Lr3z_loop: 105 asl_s r3,r3,8 106 stb.ab r1,[r10,1] 107 bne.d .Lr3z_loop 108 lsr.f r1,r3,24 109 j_s [blink] 110#endif 111 112 .balign 4 113.Lcharloop: 114 ldb.ab r3,[r1,1] 115 116 117 brne.d r3,0,.Lcharloop 118 stb.ab r3,[r10,1] 119 j [blink] 120ENDFUNC (strcpy) 121#endif /* __ARC600__ && __ARC_BARREL_SHIFTER__ */ 122 123#endif /* !__OPTIMIZE_SIZE__ && !PREFER_SIZE_OVER_SPEED */ 124
