1 /*
2 * Copyright (c) 2017 Intel Corporation.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <zephyr/toolchain.h>
8 #include <zephyr/linker/sections.h>
9 #include <zephyr/sw_isr_table.h>
10 #include <zephyr/arch/cpu.h>
11
12 /* There is an additional member at the end populated by the linker script
13 * which indicates the number of interrupts specified
14 */
15 struct int_list_header {
16 uint32_t table_size;
17 uint32_t offset;
18 };
19
20 /* These values are not included in the resulting binary, but instead form the
21 * header of the initList section, which is used by gen_isr_tables.py to create
22 * the vector and sw isr tables,
23 */
24 Z_GENERIC_SECTION(.irq_info) struct int_list_header _iheader = {
25 .table_size = IRQ_TABLE_SIZE,
26 .offset = CONFIG_GEN_IRQ_START_VECTOR,
27 };
28
29 /* These are placeholder tables. They will be replaced by the real tables
30 * generated by gen_isr_tables.py.
31 *
32 * z_irq_spurious is used as a placeholder value to ensure that it is not
33 * optimized out in the first linker pass. The first linker pass must contain
34 * the same symbols as the second linker pass for the code generation to work.
35 */
36
37 /* Some arches don't use a vector table, they have a common exception entry
38 * point for all interrupts. Don't generate a table in this case.
39 */
40 #ifdef CONFIG_GEN_IRQ_VECTOR_TABLE
41 /* When both the IRQ vector table and the software ISR table are used, populate
42 * the IRQ vector table with the common software ISR by default, such that all
43 * indirect interrupt vectors are handled using the software ISR table;
44 * otherwise, populate the IRQ vector table with z_irq_spurious so that all
45 * un-connected IRQ vectors end up in the spurious IRQ handler.
46 */
47 #ifdef CONFIG_GEN_SW_ISR_TABLE
48 #define IRQ_VECTOR_TABLE_DEFAULT_ISR _isr_wrapper
49 #else
50 #define IRQ_VECTOR_TABLE_DEFAULT_ISR z_irq_spurious
51 #endif /* CONFIG_GEN_SW_ISR_TABLE */
52
53 #ifdef CONFIG_IRQ_VECTOR_TABLE_JUMP_BY_CODE
54
55 /* Assembly code for a jump instruction. Must be set by the architecture. */
56 #ifndef ARCH_IRQ_VECTOR_JUMP_CODE
57 #error "ARCH_IRQ_VECTOR_JUMP_CODE not defined"
58 #endif
59
60 #define BUILD_VECTOR(n, _) __asm(ARCH_IRQ_VECTOR_JUMP_CODE(IRQ_VECTOR_TABLE_DEFAULT_ISR))
61
62 /* The IRQ vector table contains the jump opcodes towards the vector routine */
_irq_vector_table(void)63 void __irq_vector_table __attribute__((naked)) _irq_vector_table(void) {
64 LISTIFY(CONFIG_NUM_IRQS, BUILD_VECTOR, (;));
65 };
66 #else
67
68 /* The IRQ vector table is an array of vector addresses */
69 uintptr_t __irq_vector_table _irq_vector_table[IRQ_TABLE_SIZE] = {
70 [0 ...(IRQ_TABLE_SIZE - 1)] = (uintptr_t)&IRQ_VECTOR_TABLE_DEFAULT_ISR,
71 };
72 #endif /* CONFIG_IRQ_VECTOR_TABLE_JUMP_BY_CODE */
73 #endif /* CONFIG_GEN_IRQ_VECTOR_TABLE */
74
75 /* If there are no interrupts at all, or all interrupts are of the 'direct'
76 * type and bypass the _sw_isr_table, then do not generate one.
77 */
78 #ifdef CONFIG_GEN_SW_ISR_TABLE
79 struct _isr_table_entry __sw_isr_table _sw_isr_table[IRQ_TABLE_SIZE] = {
80 [0 ...(IRQ_TABLE_SIZE - 1)] = {(const void *)0x42,
81 (void *)&z_irq_spurious},
82 };
83 #endif
84
