1 /* SPDX-License-Identifier: BSD-3-Clause 2 * 3 * Copyright(c) 2021 Intel Corporation. All rights reserved. 4 */ 5 6 /* 7 * This file contains structures that are exact copies of an existing ABI used 8 * by IOT middleware. They are Intel specific and will be used by one middleware. 9 * 10 * Some of the structures may contain programming implementations that makes them 11 * unsuitable for generic use and general usage. 12 * 13 * This code is mostly copied "as-is" from existing C++ interface files hence the use of 14 * different style in places. The intention is to keep the interface as close as possible to 15 * original so it's easier to track changes with IPC host code. 16 */ 17 18 /** 19 * \file include/ipc4/header.h 20 * \brief IPC4 global definitions. 21 * NOTE: This ABI uses bit fields and is non portable. 22 */ 23 24 #ifndef __SOF_IPC4_GATEWAY_H__ 25 #define __SOF_IPC4_GATEWAY_H__ 26 27 #include <stdint.h> 28 29 /**< Type of the gateway. */ 30 enum ipc4_connector_node_id_type { 31 /**< HD/A host output (-> DSP). */ 32 ipc4_hda_host_output_class = 0, 33 /**< HD/A host input (<- DSP). */ 34 ipc4_hda_host_input_class = 1, 35 /**< HD/A host input/output (rsvd for future use). */ 36 ipc4_hda_host_inout_class = 2, 37 38 /**< HD/A link output (DSP ->). */ 39 ipc4_hda_link_output_class = 8, 40 /**< HD/A link input (DSP <-). */ 41 ipc4_hda_link_input_class = 9, 42 /**< HD/A link input/output (rsvd for future use). */ 43 ipc4_hda_link_inout_class = 10, 44 45 /**< DMIC link input (DSP <-). */ 46 ipc4_dmic_link_input_class = 11, 47 48 /**< I2S link output (DSP ->). */ 49 ipc4_i2s_link_output_class = 12, 50 /**< I2S link input (DSP <-). */ 51 ipc4_i2s_link_input_class = 13, 52 53 /**< ALH link output, legacy for SNDW (DSP ->). */ 54 ipc4_alh_link_output_class = 16, 55 /**< ALH link input, legacy for SNDW (DSP <-). */ 56 ipc4_alh_link_input_class = 17, 57 58 /**< SNDW link output (DSP ->). */ 59 ipc4_alh_snd_wire_stream_link_output_class = 16, 60 /**< SNDW link input (DSP <-). */ 61 ipc4_alh_snd_wire_stream_link_input_class = 17, 62 63 /**< UAOL link output (DSP ->). */ 64 ipc4_alh_uaol_stream_link_output_class = 18, 65 /**< UAOL link input (DSP <-). */ 66 ipc4_alh_uaol_stream_link_input_class = 19, 67 68 /**< IPC output (DSP ->). */ 69 ipc4_ipc_output_class = 20, 70 /**< IPC input (DSP <-). */ 71 ipc4_ipc_input_class = 21, 72 73 /**< I2S Multi gtw output (DSP ->). */ 74 ipc4_i2s_multi_link_output_class = 22, 75 /**< I2S Multi gtw input (DSP <-). */ 76 ipc4_i2s_multi_link_input_class = 23, 77 /**< GPIO */ 78 ipc4_gpio_class = 24, 79 /**< SPI */ 80 ipc4_spi_output_class = 25, 81 ipc4_spi_input_class = 26, 82 ipc4_max_connector_node_id_type 83 }; 84 85 /**< Invalid raw node id (to indicate uninitialized node id). */ 86 #define IPC4_INVALID_NODE_ID 0xffffffff 87 88 /**< Base top-level structure of an address of a gateway. */ 89 /*! 90 * The virtual index value, presented on the top level as raw 8 bits, 91 * is expected to be encoded in a gateway specific way depending on 92 * the actual type of gateway. 93 */ 94 union ipc4_connector_node_id { 95 96 /**< Raw 32-bit value of node id. */ 97 uint32_t dw; 98 99 /**< Bit fields */ 100 struct { 101 /**< Index of the virtual DMA at the gateway. */ 102 uint32_t v_index : 8; 103 104 /**< Type of the gateway, one of ConnectorNodeId::Type values. */ 105 uint32_t dma_type : 5; 106 107 /**< Rsvd field. */ 108 uint32_t _rsvd : 19; 109 } f; /**<< Bits */ 110 } __attribute__((packed, aligned(4))); 111 112 #define IPC4_HW_HOST_OUTPUT_NODE_ID_BASE 0x00 113 #define IPC4_HW_CODE_LOADER_NODE_ID 0x0F 114 #define IPC4_HW_LINK_INPUT_NODE_ID_BASE 0x10 115 116 /*! 117 * Attributes are usually provided along with the gateway configuration 118 * BLOB when the FW is requested to instantiate that gateway. 119 * 120 * There are flags which requests FW to allocate gateway related data 121 * (buffers and other items used while transferring data, like linked list) 122 * to be allocated from a special memory area, e.g low power memory. 123 */ 124 union ipc4_gateway_attributes { 125 126 /**< Raw value */ 127 uint32_t dw; 128 129 /**< Access to the fields */ 130 struct { 131 /**< Gateway data requested in low power memory. */ 132 uint32_t lp_buffer_alloc : 1; 133 134 /**< Gateway data requested in register file memory. */ 135 uint32_t alloc_from_reg_file : 1; 136 137 /**< Reserved field */ 138 uint32_t _rsvd : 30; 139 } bits; /**<< Bits */ 140 } __attribute__((packed, aligned(4))); 141 142 /**< Configuration for the IPC Gateway */ 143 struct ipc4_gateway_config_blob { 144 145 /**< Size of the gateway buffer, specified in bytes */ 146 uint32_t buffer_size; 147 148 /**< Flags */ 149 union flags { 150 struct bits { 151 /**< Activates high threshold notification */ 152 /*! 153 * Indicates whether notification should be sent to the host 154 * when the size of data in the buffer reaches the high threshold 155 * specified by threshold_high parameter. 156 */ 157 uint32_t notif_high : 1; 158 159 /**< Activates low threshold notification */ 160 /*! 161 * Indicates whether notification should be sent to the host 162 * when the size of data in the buffer reaches the low threshold 163 * specified by threshold_low parameter. 164 */ 165 uint32_t notif_low : 1; 166 167 /**< Reserved field */ 168 uint32_t rsvd : 30; 169 } f; /**<< Bits */ 170 /**< Raw value of flags */ 171 uint32_t flags_raw; 172 } u; /**<< Flags */ 173 174 /**< High threshold */ 175 /*! 176 * Specifies the high threshold (in bytes) for notifying the host 177 * about the buffered data level. 178 */ 179 uint32_t threshold_high; 180 181 /**< Low threshold */ 182 /*! 183 * Specifies the low threshold (in bytes) for notifying the host 184 * about the buffered data level. 185 */ 186 uint32_t threshold_low; 187 } __attribute__((packed, aligned(4))); 188 189 #endif 190
