1 /***************************************************************************//** 2 * \file cyip_sflash_xmc7100.h 3 * 4 * \brief 5 * SFLASH IP definitions 6 * 7 ******************************************************************************** 8 * \copyright 9 * (c) (2016-2024), Cypress Semiconductor Corporation (an Infineon company) or 10 * an affiliate of Cypress Semiconductor Corporation. 11 * 12 * SPDX-License-Identifier: Apache-2.0 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 *******************************************************************************/ 26 27 #ifndef _CYIP_SFLASH_XMC7100_H_ 28 #define _CYIP_SFLASH_XMC7100_H_ 29 30 #include "cyip_headers.h" 31 32 /******************************************************************************* 33 * SFLASH 34 *******************************************************************************/ 35 36 #define SFLASH_SECTION_SIZE 0x00008000UL 37 38 /** 39 * \brief FLASH Supervisory Region (SFLASH) 40 */ 41 typedef struct { 42 __IM uint8_t RESERVED; 43 __IOM uint8_t SI_REVISION_ID; /*!< 0x00000001 Indicates Silicon Revision ID of the device */ 44 __IOM uint16_t SILICON_ID; /*!< 0x00000002 Indicates Silicon ID of the device */ 45 __IM uint32_t RESERVED1[41]; 46 __IOM uint32_t SFLASH_SVN; /*!< 0x000000A8 SFLASH Subversion */ 47 __IM uint32_t RESERVED2[84]; 48 __IOM uint32_t FB_FLAGS; /*!< 0x000001FC Flash boot flags */ 49 __IM uint16_t RESERVED3[551]; 50 __IOM uint16_t EPASS_TEMP_TRIM_TEMP_ROOMSORT; /*!< 0x0000064E On Chip temperature measured using external currents and 51 external ADC at ROOM */ 52 __IOM uint16_t EPASS_TEMP_TRIM_DIODE_ROOMSORT; /*!< 0x00000650 Temperature sensor calibration data for VDDA=3.3V, Temperature 53 sensor diode voltage at ROOM */ 54 __IOM uint16_t EPASS_TEMP_TRIM_VBG_ROOMSORT; /*!< 0x00000652 Temperature sensor calibration data for VDDA=3.3V, Bandgap 55 voltage at ROOM */ 56 __IOM uint16_t EPASS_TEMP_TRIM_TEMP_COLDSORT; /*!< 0x00000654 On Chip temperature measured using external currents and 57 external ADC at COLD */ 58 __IOM uint16_t EPASS_TEMP_TRIM_DIODE_COLDSORT; /*!< 0x00000656 Temperature sensor calibration data for VDDA=3.3V, Temperature 59 sensor diode voltage at COLD */ 60 __IOM uint16_t EPASS_TEMP_TRIM_VBG_COLDSORT; /*!< 0x00000658 Temperature sensor calibration data for VDDA=3.3V, Bandgap 61 voltage at COLD */ 62 __IOM uint16_t EPASS_TEMP_TRIM_TEMP_HOTCLASS; /*!< 0x0000065A On Chip temperature measured using external currents and 63 external ADC at HOT */ 64 __IOM uint16_t EPASS_TEMP_TRIM_DIODE_HOTCLASS; /*!< 0x0000065C Temperature sensor calibration data for VDDA=3.3V, Temperature 65 sensor diode voltage at HOT */ 66 __IOM uint16_t EPASS_TEMP_TRIM_VBG_HOTCLASS; /*!< 0x0000065E Temperature sensor calibration data for VDDA=3.3V, Bandgap 67 voltage at HOT */ 68 __IM uint16_t RESERVED4[5]; 69 __IOM uint16_t EPASS_TEMP_TRIM_DIODE_ROOMSORT_5V; /*!< 0x0000066A Temperature sensor calibration data for VDDA=5V, Temperature 70 sensor diode voltage at ROOM */ 71 __IOM uint16_t EPASS_TEMP_TRIM_VBG_ROOMSORT_5V; /*!< 0x0000066C Temperature sensor calibration data for VDDA=5V, Bandgap 72 voltage at ROOM */ 73 __IOM uint16_t EPASS_TEMP_TRIM_DIODE_COLDSORT_5V; /*!< 0x0000066E Temperature sensor calibration data for VDDA=5V, Temperature 74 sensor diode voltage at COLD */ 75 __IOM uint16_t EPASS_TEMP_TRIM_VBG_COLDSORT_5V; /*!< 0x00000670 Temperature sensor calibration data for VDDA=5V, Bandgap 76 voltage at COLD */ 77 __IOM uint16_t EPASS_TEMP_TRIM_DIODE_HOTCLASS_5V; /*!< 0x00000672 Temperature sensor calibration data for VDDA=5V, Temperature 78 sensor diode voltage at HOT */ 79 __IOM uint16_t EPASS_TEMP_TRIM_VBG_HOTCLASS_5V; /*!< 0x00000674 Temperature sensor calibration data for VDDA=5V, Bandgap 80 voltage at HOT */ 81 __IM uint16_t RESERVED5[93]; 82 __IOM uint32_t SRSS_PWR_OFFSET; /*!< 0x00000730 SRSS_PWR_OFFSET */ 83 __IOM uint32_t SRSS_PWR_TRIM_HT_PWRSYS_INTERNAL; /*!< 0x00000734 Trim settings when the supply is intended to come from the 84 internal regulators */ 85 __IOM uint32_t SRSS_PWR_TRIM_HT_PWRSYS_EXTERNAL; /*!< 0x00000738 Trim settings for the regulators so they do not interfere with 86 external supply */ 87 __IM uint32_t RESERVED6[49]; 88 __IOM uint32_t USER_FREE_ROW0[128]; /*!< 0x00000800 USER_FREE_ROW0 */ 89 __IOM uint32_t USER_FREE_ROW1[128]; /*!< 0x00000A00 USER_FREE_ROW1 */ 90 __IOM uint32_t USER_FREE_ROW2[128]; /*!< 0x00000C00 USER_FREE_ROW2 */ 91 __IOM uint32_t USER_FREE_ROW3[128]; /*!< 0x00000E00 USER_FREE_ROW3 */ 92 __IM uint32_t RESERVED7[512]; 93 __IOM uint32_t SFLASH_UPDATE_MARKER[2]; /*!< 0x00001800 Markers for storing SFLASH programming states */ 94 __IM uint32_t RESERVED8[510]; 95 __IOM uint32_t FLASH_BOOT_OBJECT_SIZE; /*!< 0x00002000 Flash Boot - Object Size */ 96 __IOM uint32_t FLASH_BOOT_APP_ID; /*!< 0x00002004 Flash Boot - Application ID/Version */ 97 __IM uint32_t RESERVED9[4]; 98 __IOM uint32_t FLASH_BOOT_VERSION_LOW; /*!< 0x00002018 Flash Boot - Version Low */ 99 __IOM uint32_t FLASH_BOOT_FAMILY_ID; /*!< 0x0000201C Flash Boot - Family ID */ 100 __IM uint32_t RESERVED10[4344]; 101 __IOM uint8_t PUBLIC_KEY[3072]; /*!< 0x00006400 Public key for signature verification (max RSA key size 4096) */ 102 __IM uint32_t RESERVED11[384]; 103 __IOM uint32_t APP_PROT_SETTINGS[128]; /*!< 0x00007600 Application protection settings (4*128=512 bytes) */ 104 __IM uint32_t RESERVED12[256]; 105 __IOM uint32_t TOC2_OBJECT_SIZE; /*!< 0x00007C00 Object size in bytes for CRC calculation starting from offset 106 0x00 */ 107 __IOM uint32_t TOC2_MAGIC_NUMBER; /*!< 0x00007C04 Magic number(0x01211220) */ 108 __IOM uint32_t TOC2_SMIF_CFG_STRUCT_ADDR; /*!< 0x00007C08 Null terminated table of pointers representing the SMIF 109 configuration structure */ 110 __IOM uint32_t TOC2_FIRST_USER_APP_ADDR; /*!< 0x00007C0C Address of First User Application Object */ 111 __IOM uint32_t TOC2_FIRST_USER_APP_FORMAT; /*!< 0x00007C10 Format of First User Application Object. 0 - Basic, 1 - Cypress 112 standard & 2 - Simplified */ 113 __IOM uint32_t TOC2_SECOND_USER_APP_ADDR; /*!< 0x00007C14 Address of Second User Application Object */ 114 __IOM uint32_t TOC2_SECOND_USER_APP_FORMAT; /*!< 0x00007C18 Format of Second User Application Object. 0 - Basic, 1 - 115 Cypress standard & 2 - Simplified */ 116 __IOM uint32_t TOC2_FIRST_CMX_1_USER_APP_ADDR; /*!< 0x00007C1C Address of First CM4 or CM7 core1 User Application Object */ 117 __IOM uint32_t TOC2_SECOND_CMX_1_USER_APP_ADDR; /*!< 0x00007C20 Address of Second CM4 or CM7 core1 User Application Object */ 118 __IOM uint32_t TOC2_FIRST_CMX_2_USER_APP_ADDR; /*!< 0x00007C24 Address of First CM4 or CM7 core2 User Application Object */ 119 __IOM uint32_t TOC2_SECOND_CMX_2_USER_APP_ADDR; /*!< 0x00007C28 Address of Second CM4 or CM7 core2 User Application Object */ 120 __IM uint32_t RESERVED13[52]; 121 __IOM uint32_t TOC2_SECURITY_UPDATES_MARKER; /*!< 0x00007CFC Marker for Security Updates */ 122 __IOM uint32_t TOC2_SHASH_OBJECTS; /*!< 0x00007D00 Number of additional objects to be verified for SECURE_HASH */ 123 __IOM uint32_t TOC2_SIGNATURE_VERIF_KEY; /*!< 0x00007D04 Address of signature verification key (0 if none).The object is 124 signature specific key. It is the public key in case of RSA */ 125 __IOM uint32_t TOC2_APP_PROTECTION_ADDR; /*!< 0x00007D08 Address of Application Protection */ 126 __IM uint32_t RESERVED14[58]; 127 __IOM uint32_t TOC2_REVISION; /*!< 0x00007DF4 Indicates TOC2 Revision. It is not used now. */ 128 __IOM uint32_t TOC2_FLAGS; /*!< 0x00007DF8 Controls default configuration */ 129 } SFLASH_Type; /*!< Size = 32252 (0x7DFC) */ 130 131 132 /* SFLASH.SI_REVISION_ID */ 133 #define SFLASH_SI_REVISION_ID_SI_REVISION_ID_Pos 0UL 134 #define SFLASH_SI_REVISION_ID_SI_REVISION_ID_Msk 0xFFUL 135 /* SFLASH.SILICON_ID */ 136 #define SFLASH_SILICON_ID_ID_Pos 0UL 137 #define SFLASH_SILICON_ID_ID_Msk 0xFFFFUL 138 /* SFLASH.SFLASH_SVN */ 139 #define SFLASH_SFLASH_SVN_DATA32_Pos 0UL 140 #define SFLASH_SFLASH_SVN_DATA32_Msk 0xFFFFFFFFUL 141 /* SFLASH.FB_FLAGS */ 142 #define SFLASH_FB_FLAGS_FB_PIN_CTL_Pos 0UL 143 #define SFLASH_FB_FLAGS_FB_PIN_CTL_Msk 0x3UL 144 #define SFLASH_FB_FLAGS_FB_RSA3K_CTL_Pos 2UL 145 #define SFLASH_FB_FLAGS_FB_RSA3K_CTL_Msk 0xCUL 146 #define SFLASH_FB_FLAGS_FB_RSA4K_CTL_Pos 4UL 147 #define SFLASH_FB_FLAGS_FB_RSA4K_CTL_Msk 0x30UL 148 /* SFLASH.EPASS_TEMP_TRIM_TEMP_ROOMSORT */ 149 #define SFLASH_EPASS_TEMP_TRIM_TEMP_ROOMSORT_DATA16_Pos 0UL 150 #define SFLASH_EPASS_TEMP_TRIM_TEMP_ROOMSORT_DATA16_Msk 0xFFFFUL 151 /* SFLASH.EPASS_TEMP_TRIM_DIODE_ROOMSORT */ 152 #define SFLASH_EPASS_TEMP_TRIM_DIODE_ROOMSORT_DATA16_Pos 0UL 153 #define SFLASH_EPASS_TEMP_TRIM_DIODE_ROOMSORT_DATA16_Msk 0xFFFFUL 154 /* SFLASH.EPASS_TEMP_TRIM_VBG_ROOMSORT */ 155 #define SFLASH_EPASS_TEMP_TRIM_VBG_ROOMSORT_DATA16_Pos 0UL 156 #define SFLASH_EPASS_TEMP_TRIM_VBG_ROOMSORT_DATA16_Msk 0xFFFFUL 157 /* SFLASH.EPASS_TEMP_TRIM_TEMP_COLDSORT */ 158 #define SFLASH_EPASS_TEMP_TRIM_TEMP_COLDSORT_DATA16_Pos 0UL 159 #define SFLASH_EPASS_TEMP_TRIM_TEMP_COLDSORT_DATA16_Msk 0xFFFFUL 160 /* SFLASH.EPASS_TEMP_TRIM_DIODE_COLDSORT */ 161 #define SFLASH_EPASS_TEMP_TRIM_DIODE_COLDSORT_DATA16_Pos 0UL 162 #define SFLASH_EPASS_TEMP_TRIM_DIODE_COLDSORT_DATA16_Msk 0xFFFFUL 163 /* SFLASH.EPASS_TEMP_TRIM_VBG_COLDSORT */ 164 #define SFLASH_EPASS_TEMP_TRIM_VBG_COLDSORT_DATA16_Pos 0UL 165 #define SFLASH_EPASS_TEMP_TRIM_VBG_COLDSORT_DATA16_Msk 0xFFFFUL 166 /* SFLASH.EPASS_TEMP_TRIM_TEMP_HOTCLASS */ 167 #define SFLASH_EPASS_TEMP_TRIM_TEMP_HOTCLASS_DATA16_Pos 0UL 168 #define SFLASH_EPASS_TEMP_TRIM_TEMP_HOTCLASS_DATA16_Msk 0xFFFFUL 169 /* SFLASH.EPASS_TEMP_TRIM_DIODE_HOTCLASS */ 170 #define SFLASH_EPASS_TEMP_TRIM_DIODE_HOTCLASS_DATA16_Pos 0UL 171 #define SFLASH_EPASS_TEMP_TRIM_DIODE_HOTCLASS_DATA16_Msk 0xFFFFUL 172 /* SFLASH.EPASS_TEMP_TRIM_VBG_HOTCLASS */ 173 #define SFLASH_EPASS_TEMP_TRIM_VBG_HOTCLASS_DATA16_Pos 0UL 174 #define SFLASH_EPASS_TEMP_TRIM_VBG_HOTCLASS_DATA16_Msk 0xFFFFUL 175 /* SFLASH.EPASS_TEMP_TRIM_DIODE_ROOMSORT_5V */ 176 #define SFLASH_EPASS_TEMP_TRIM_DIODE_ROOMSORT_5V_DATA16_Pos 0UL 177 #define SFLASH_EPASS_TEMP_TRIM_DIODE_ROOMSORT_5V_DATA16_Msk 0xFFFFUL 178 /* SFLASH.EPASS_TEMP_TRIM_VBG_ROOMSORT_5V */ 179 #define SFLASH_EPASS_TEMP_TRIM_VBG_ROOMSORT_5V_DATA16_Pos 0UL 180 #define SFLASH_EPASS_TEMP_TRIM_VBG_ROOMSORT_5V_DATA16_Msk 0xFFFFUL 181 /* SFLASH.EPASS_TEMP_TRIM_DIODE_COLDSORT_5V */ 182 #define SFLASH_EPASS_TEMP_TRIM_DIODE_COLDSORT_5V_DATA16_Pos 0UL 183 #define SFLASH_EPASS_TEMP_TRIM_DIODE_COLDSORT_5V_DATA16_Msk 0xFFFFUL 184 /* SFLASH.EPASS_TEMP_TRIM_VBG_COLDSORT_5V */ 185 #define SFLASH_EPASS_TEMP_TRIM_VBG_COLDSORT_5V_DATA16_Pos 0UL 186 #define SFLASH_EPASS_TEMP_TRIM_VBG_COLDSORT_5V_DATA16_Msk 0xFFFFUL 187 /* SFLASH.EPASS_TEMP_TRIM_DIODE_HOTCLASS_5V */ 188 #define SFLASH_EPASS_TEMP_TRIM_DIODE_HOTCLASS_5V_DATA16_Pos 0UL 189 #define SFLASH_EPASS_TEMP_TRIM_DIODE_HOTCLASS_5V_DATA16_Msk 0xFFFFUL 190 /* SFLASH.EPASS_TEMP_TRIM_VBG_HOTCLASS_5V */ 191 #define SFLASH_EPASS_TEMP_TRIM_VBG_HOTCLASS_5V_DATA16_Pos 0UL 192 #define SFLASH_EPASS_TEMP_TRIM_VBG_HOTCLASS_5V_DATA16_Msk 0xFFFFUL 193 /* SFLASH.SRSS_PWR_OFFSET */ 194 #define SFLASH_SRSS_PWR_OFFSET_PMIC_VADJ_OFFSET_Pos 0UL 195 #define SFLASH_SRSS_PWR_OFFSET_PMIC_VADJ_OFFSET_Msk 0x1FUL 196 #define SFLASH_SRSS_PWR_OFFSET_REGHC_TRANS_VADJ_OFFSET_Pos 8UL 197 #define SFLASH_SRSS_PWR_OFFSET_REGHC_TRANS_VADJ_OFFSET_Msk 0x1F00UL 198 /* SFLASH.SRSS_PWR_TRIM_HT_PWRSYS_INTERNAL */ 199 #define SFLASH_SRSS_PWR_TRIM_HT_PWRSYS_INTERNAL_ACT_REG_VTRIM_Pos 0UL 200 #define SFLASH_SRSS_PWR_TRIM_HT_PWRSYS_INTERNAL_ACT_REG_VTRIM_Msk 0x1FUL 201 #define SFLASH_SRSS_PWR_TRIM_HT_PWRSYS_INTERNAL_DPSLP_REG_VTRIM_Pos 24UL 202 #define SFLASH_SRSS_PWR_TRIM_HT_PWRSYS_INTERNAL_DPSLP_REG_VTRIM_Msk 0xF000000UL 203 /* SFLASH.SRSS_PWR_TRIM_HT_PWRSYS_EXTERNAL */ 204 #define SFLASH_SRSS_PWR_TRIM_HT_PWRSYS_EXTERNAL_ACT_REG_VTRIM_Pos 0UL 205 #define SFLASH_SRSS_PWR_TRIM_HT_PWRSYS_EXTERNAL_ACT_REG_VTRIM_Msk 0x1FUL 206 #define SFLASH_SRSS_PWR_TRIM_HT_PWRSYS_EXTERNAL_DPSLP_REG_VTRIM_Pos 24UL 207 #define SFLASH_SRSS_PWR_TRIM_HT_PWRSYS_EXTERNAL_DPSLP_REG_VTRIM_Msk 0xF000000UL 208 /* SFLASH.USER_FREE_ROW0 */ 209 #define SFLASH_USER_FREE_ROW0_DATA32_Pos 0UL 210 #define SFLASH_USER_FREE_ROW0_DATA32_Msk 0xFFFFFFFFUL 211 /* SFLASH.USER_FREE_ROW1 */ 212 #define SFLASH_USER_FREE_ROW1_DATA32_Pos 0UL 213 #define SFLASH_USER_FREE_ROW1_DATA32_Msk 0xFFFFFFFFUL 214 /* SFLASH.USER_FREE_ROW2 */ 215 #define SFLASH_USER_FREE_ROW2_DATA32_Pos 0UL 216 #define SFLASH_USER_FREE_ROW2_DATA32_Msk 0xFFFFFFFFUL 217 /* SFLASH.USER_FREE_ROW3 */ 218 #define SFLASH_USER_FREE_ROW3_DATA32_Pos 0UL 219 #define SFLASH_USER_FREE_ROW3_DATA32_Msk 0xFFFFFFFFUL 220 /* SFLASH.SFLASH_UPDATE_MARKER */ 221 #define SFLASH_SFLASH_UPDATE_MARKER_DATA32_Pos 0UL 222 #define SFLASH_SFLASH_UPDATE_MARKER_DATA32_Msk 0xFFFFFFFFUL 223 /* SFLASH.FLASH_BOOT_OBJECT_SIZE */ 224 #define SFLASH_FLASH_BOOT_OBJECT_SIZE_DATA32_Pos 0UL 225 #define SFLASH_FLASH_BOOT_OBJECT_SIZE_DATA32_Msk 0xFFFFFFFFUL 226 /* SFLASH.FLASH_BOOT_APP_ID */ 227 #define SFLASH_FLASH_BOOT_APP_ID_APP_ID_Pos 0UL 228 #define SFLASH_FLASH_BOOT_APP_ID_APP_ID_Msk 0xFFFFUL 229 #define SFLASH_FLASH_BOOT_APP_ID_MINOR_VERSION_Pos 16UL 230 #define SFLASH_FLASH_BOOT_APP_ID_MINOR_VERSION_Msk 0xFF0000UL 231 #define SFLASH_FLASH_BOOT_APP_ID_MAJOR_VERSION_Pos 24UL 232 #define SFLASH_FLASH_BOOT_APP_ID_MAJOR_VERSION_Msk 0xF000000UL 233 /* SFLASH.FLASH_BOOT_VERSION_LOW */ 234 #define SFLASH_FLASH_BOOT_VERSION_LOW_DATA32_Pos 0UL 235 #define SFLASH_FLASH_BOOT_VERSION_LOW_DATA32_Msk 0xFFFFFFFFUL 236 /* SFLASH.FLASH_BOOT_FAMILY_ID */ 237 #define SFLASH_FLASH_BOOT_FAMILY_ID_DATA32_Pos 0UL 238 #define SFLASH_FLASH_BOOT_FAMILY_ID_DATA32_Msk 0xFFFFFFFFUL 239 /* SFLASH.PUBLIC_KEY */ 240 #define SFLASH_PUBLIC_KEY_DATA_Pos 0UL 241 #define SFLASH_PUBLIC_KEY_DATA_Msk 0xFFUL 242 /* SFLASH.APP_PROT_SETTINGS */ 243 #define SFLASH_APP_PROT_SETTINGS_DATA32_Pos 0UL 244 #define SFLASH_APP_PROT_SETTINGS_DATA32_Msk 0xFFFFFFFFUL 245 /* SFLASH.TOC2_OBJECT_SIZE */ 246 #define SFLASH_TOC2_OBJECT_SIZE_DATA32_Pos 0UL 247 #define SFLASH_TOC2_OBJECT_SIZE_DATA32_Msk 0xFFFFFFFFUL 248 /* SFLASH.TOC2_MAGIC_NUMBER */ 249 #define SFLASH_TOC2_MAGIC_NUMBER_DATA32_Pos 0UL 250 #define SFLASH_TOC2_MAGIC_NUMBER_DATA32_Msk 0xFFFFFFFFUL 251 /* SFLASH.TOC2_SMIF_CFG_STRUCT_ADDR */ 252 #define SFLASH_TOC2_SMIF_CFG_STRUCT_ADDR_DATA32_Pos 0UL 253 #define SFLASH_TOC2_SMIF_CFG_STRUCT_ADDR_DATA32_Msk 0xFFFFFFFFUL 254 /* SFLASH.TOC2_FIRST_USER_APP_ADDR */ 255 #define SFLASH_TOC2_FIRST_USER_APP_ADDR_DATA32_Pos 0UL 256 #define SFLASH_TOC2_FIRST_USER_APP_ADDR_DATA32_Msk 0xFFFFFFFFUL 257 /* SFLASH.TOC2_FIRST_USER_APP_FORMAT */ 258 #define SFLASH_TOC2_FIRST_USER_APP_FORMAT_DATA32_Pos 0UL 259 #define SFLASH_TOC2_FIRST_USER_APP_FORMAT_DATA32_Msk 0xFFFFFFFFUL 260 /* SFLASH.TOC2_SECOND_USER_APP_ADDR */ 261 #define SFLASH_TOC2_SECOND_USER_APP_ADDR_DATA32_Pos 0UL 262 #define SFLASH_TOC2_SECOND_USER_APP_ADDR_DATA32_Msk 0xFFFFFFFFUL 263 /* SFLASH.TOC2_SECOND_USER_APP_FORMAT */ 264 #define SFLASH_TOC2_SECOND_USER_APP_FORMAT_DATA32_Pos 0UL 265 #define SFLASH_TOC2_SECOND_USER_APP_FORMAT_DATA32_Msk 0xFFFFFFFFUL 266 /* SFLASH.TOC2_FIRST_CMX_1_USER_APP_ADDR */ 267 #define SFLASH_TOC2_FIRST_CMX_1_USER_APP_ADDR_DATA32_Pos 0UL 268 #define SFLASH_TOC2_FIRST_CMX_1_USER_APP_ADDR_DATA32_Msk 0xFFFFFFFFUL 269 /* SFLASH.TOC2_SECOND_CMX_1_USER_APP_ADDR */ 270 #define SFLASH_TOC2_SECOND_CMX_1_USER_APP_ADDR_DATA32_Pos 0UL 271 #define SFLASH_TOC2_SECOND_CMX_1_USER_APP_ADDR_DATA32_Msk 0xFFFFFFFFUL 272 /* SFLASH.TOC2_FIRST_CMX_2_USER_APP_ADDR */ 273 #define SFLASH_TOC2_FIRST_CMX_2_USER_APP_ADDR_DATA32_Pos 0UL 274 #define SFLASH_TOC2_FIRST_CMX_2_USER_APP_ADDR_DATA32_Msk 0xFFFFFFFFUL 275 /* SFLASH.TOC2_SECOND_CMX_2_USER_APP_ADDR */ 276 #define SFLASH_TOC2_SECOND_CMX_2_USER_APP_ADDR_DATA32_Pos 0UL 277 #define SFLASH_TOC2_SECOND_CMX_2_USER_APP_ADDR_DATA32_Msk 0xFFFFFFFFUL 278 /* SFLASH.TOC2_SECURITY_UPDATES_MARKER */ 279 #define SFLASH_TOC2_SECURITY_UPDATES_MARKER_DATA32_Pos 0UL 280 #define SFLASH_TOC2_SECURITY_UPDATES_MARKER_DATA32_Msk 0xFFFFFFFFUL 281 /* SFLASH.TOC2_SHASH_OBJECTS */ 282 #define SFLASH_TOC2_SHASH_OBJECTS_DATA32_Pos 0UL 283 #define SFLASH_TOC2_SHASH_OBJECTS_DATA32_Msk 0xFFFFFFFFUL 284 /* SFLASH.TOC2_SIGNATURE_VERIF_KEY */ 285 #define SFLASH_TOC2_SIGNATURE_VERIF_KEY_DATA32_Pos 0UL 286 #define SFLASH_TOC2_SIGNATURE_VERIF_KEY_DATA32_Msk 0xFFFFFFFFUL 287 /* SFLASH.TOC2_APP_PROTECTION_ADDR */ 288 #define SFLASH_TOC2_APP_PROTECTION_ADDR_DATA32_Pos 0UL 289 #define SFLASH_TOC2_APP_PROTECTION_ADDR_DATA32_Msk 0xFFFFFFFFUL 290 /* SFLASH.TOC2_REVISION */ 291 #define SFLASH_TOC2_REVISION_DATA32_Pos 0UL 292 #define SFLASH_TOC2_REVISION_DATA32_Msk 0xFFFFFFFFUL 293 /* SFLASH.TOC2_FLAGS */ 294 #define SFLASH_TOC2_FLAGS_CLOCK_CONFIG_Pos 0UL 295 #define SFLASH_TOC2_FLAGS_CLOCK_CONFIG_Msk 0x3UL 296 #define SFLASH_TOC2_FLAGS_LISTEN_WINDOW_Pos 2UL 297 #define SFLASH_TOC2_FLAGS_LISTEN_WINDOW_Msk 0x1CUL 298 #define SFLASH_TOC2_FLAGS_SWJ_PINS_CTL_Pos 5UL 299 #define SFLASH_TOC2_FLAGS_SWJ_PINS_CTL_Msk 0x60UL 300 #define SFLASH_TOC2_FLAGS_APP_AUTH_CTL_Pos 7UL 301 #define SFLASH_TOC2_FLAGS_APP_AUTH_CTL_Msk 0x180UL 302 #define SFLASH_TOC2_FLAGS_FB_BOOTLOADER_CTL_Pos 9UL 303 #define SFLASH_TOC2_FLAGS_FB_BOOTLOADER_CTL_Msk 0x600UL 304 305 306 #endif /* _CYIP_SFLASH_XMC7100_H_ */ 307 308 309 /* [] END OF FILE */ 310
