1 /** 2 * \file 3 * 4 * \brief Instance description for TWIM2 5 * 6 * Copyright (c) 2016 Atmel Corporation, 7 * a wholly owned subsidiary of Microchip Technology Inc. 8 * 9 * \asf_license_start 10 * 11 * \page License 12 * 13 * Licensed under the Apache License, Version 2.0 (the "License"); 14 * you may not use this file except in compliance with the License. 15 * You may obtain a copy of the Licence at 16 * 17 * http://www.apache.org/licenses/LICENSE-2.0 18 * 19 * Unless required by applicable law or agreed to in writing, software 20 * distributed under the License is distributed on an "AS IS" BASIS, 21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the License for the specific language governing permissions and 23 * limitations under the License. 24 * 25 * \asf_license_stop 26 * 27 */ 28 29 #ifndef _SAM4L_TWIM2_INSTANCE_ 30 #define _SAM4L_TWIM2_INSTANCE_ 31 32 /* ========== Register definition for TWIM2 peripheral ========== */ 33 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 34 #define REG_TWIM2_CR (0x40078000) /**< \brief (TWIM2) Control Register */ 35 #define REG_TWIM2_CWGR (0x40078004) /**< \brief (TWIM2) Clock Waveform Generator Register */ 36 #define REG_TWIM2_SMBTR (0x40078008) /**< \brief (TWIM2) SMBus Timing Register */ 37 #define REG_TWIM2_CMDR (0x4007800C) /**< \brief (TWIM2) Command Register */ 38 #define REG_TWIM2_NCMDR (0x40078010) /**< \brief (TWIM2) Next Command Register */ 39 #define REG_TWIM2_RHR (0x40078014) /**< \brief (TWIM2) Receive Holding Register */ 40 #define REG_TWIM2_THR (0x40078018) /**< \brief (TWIM2) Transmit Holding Register */ 41 #define REG_TWIM2_SR (0x4007801C) /**< \brief (TWIM2) Status Register */ 42 #define REG_TWIM2_IER (0x40078020) /**< \brief (TWIM2) Interrupt Enable Register */ 43 #define REG_TWIM2_IDR (0x40078024) /**< \brief (TWIM2) Interrupt Disable Register */ 44 #define REG_TWIM2_IMR (0x40078028) /**< \brief (TWIM2) Interrupt Mask Register */ 45 #define REG_TWIM2_SCR (0x4007802C) /**< \brief (TWIM2) Status Clear Register */ 46 #define REG_TWIM2_PR (0x40078030) /**< \brief (TWIM2) Parameter Register */ 47 #define REG_TWIM2_VR (0x40078034) /**< \brief (TWIM2) Version Register */ 48 #define REG_TWIM2_HSCWGR (0x40078038) /**< \brief (TWIM2) HS-mode Clock Waveform Generator */ 49 #define REG_TWIM2_SRR (0x4007803C) /**< \brief (TWIM2) Slew Rate Register */ 50 #define REG_TWIM2_HSSRR (0x40078040) /**< \brief (TWIM2) HS-mode Slew Rate Register */ 51 #else 52 #define REG_TWIM2_CR (*(WoReg *)0x40078000UL) /**< \brief (TWIM2) Control Register */ 53 #define REG_TWIM2_CWGR (*(RwReg *)0x40078004UL) /**< \brief (TWIM2) Clock Waveform Generator Register */ 54 #define REG_TWIM2_SMBTR (*(RwReg *)0x40078008UL) /**< \brief (TWIM2) SMBus Timing Register */ 55 #define REG_TWIM2_CMDR (*(RwReg *)0x4007800CUL) /**< \brief (TWIM2) Command Register */ 56 #define REG_TWIM2_NCMDR (*(RwReg *)0x40078010UL) /**< \brief (TWIM2) Next Command Register */ 57 #define REG_TWIM2_RHR (*(RoReg *)0x40078014UL) /**< \brief (TWIM2) Receive Holding Register */ 58 #define REG_TWIM2_THR (*(WoReg *)0x40078018UL) /**< \brief (TWIM2) Transmit Holding Register */ 59 #define REG_TWIM2_SR (*(RoReg *)0x4007801CUL) /**< \brief (TWIM2) Status Register */ 60 #define REG_TWIM2_IER (*(WoReg *)0x40078020UL) /**< \brief (TWIM2) Interrupt Enable Register */ 61 #define REG_TWIM2_IDR (*(WoReg *)0x40078024UL) /**< \brief (TWIM2) Interrupt Disable Register */ 62 #define REG_TWIM2_IMR (*(RoReg *)0x40078028UL) /**< \brief (TWIM2) Interrupt Mask Register */ 63 #define REG_TWIM2_SCR (*(WoReg *)0x4007802CUL) /**< \brief (TWIM2) Status Clear Register */ 64 #define REG_TWIM2_PR (*(RoReg *)0x40078030UL) /**< \brief (TWIM2) Parameter Register */ 65 #define REG_TWIM2_VR (*(RoReg *)0x40078034UL) /**< \brief (TWIM2) Version Register */ 66 #define REG_TWIM2_HSCWGR (*(RwReg *)0x40078038UL) /**< \brief (TWIM2) HS-mode Clock Waveform Generator */ 67 #define REG_TWIM2_SRR (*(RwReg *)0x4007803CUL) /**< \brief (TWIM2) Slew Rate Register */ 68 #define REG_TWIM2_HSSRR (*(RwReg *)0x40078040UL) /**< \brief (TWIM2) HS-mode Slew Rate Register */ 69 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 70 71 /* ========== Instance parameters for TWIM2 peripheral ========== */ 72 #define TWIM2_PDCA_ID_RX 7 73 #define TWIM2_PDCA_ID_TX 25 74 75 #endif /* _SAM4L_TWIM2_INSTANCE_ */ 76
