1 /*
2  * ==========================================================
3  *
4  *    Copyright (C) 2020 QuickLogic Corporation
5  *    Licensed under the Apache License, Version 2.0 (the "License");
6  *    you may not use this file except in compliance with the License.
7  *    You may obtain a copy of the License at
8  * 		http://www.apache.org/licenses/LICENSE-2.0
9  *    Unless required by applicable law or agreed to in writing, software
10  *    distributed under the License is distributed on an "AS IS" BASIS,
11  *    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12  *    See the License for the specific language governing permissions and
13  *    limitations under the License.
14  *
15  *    File      : eoss3_hal_uart.h
16  *    Purpose   : This file contains macros, structures and APIs for
17  *             UART read/write
18  *
19  *
20  * ===========================================================
21  *
22  */
23 
24 #ifndef __TAMAR_HAL_UART_H_
25 #define __TAMAR_HAL_UART_H_
26 
27 #include <stdint.h>
28 #include <stdbool.h>
29 #include <stddef.h>
30 
31 /*!	\enum UartBaudRateType
32 	\brief Uart baudrate
33 */
34 typedef enum
35 {
36 	BAUD_2400 = 0,
37 	BAUD_4800,
38 	BAUD_9600,
39 	BAUD_19200,
40 	BAUD_38400,
41 	BAUD_57600,
42 	BAUD_115200,
43 	BAUD_230400,
44 	BAUD_460800,
45 	BAUD_921600,
46 	BAUD_INVALID,
47 } UartBaudRateType;
48 
49 /*!	\enum UartWordLenType
50 	\brief Uart wordlength to transfer/receive
51 */
52 typedef enum
53 {
54 	WORDLEN_8B = 0,
55 	WORDLEN_7B,
56 	WORDLEN_6B,
57 	WORDLEN_5B,
58 	WORDLEN_INVALID = -1,
59 } UartWordLenType;
60 
61 /*!	\enum UartStopBitsType
62 	\brief Uart stopbits selection
63 */
64 typedef enum
65 {
66 	STOPBITS_1 = 0,
67 	STOPBITS_2,
68 	STOPBIT_INVALID = -1,
69 } UartStopBitsType;
70 
71 /*!	\enum UartParityType
72 	\brief Uart parity type
73 */
74 typedef enum
75 {
76 	PARITY_NONE = 0,
77 	PARITY_EVEN,
78 	PARITY_ODD,
79 } UartParityType;
80 
81 /*!	\enum UartModeType
82 	\brief Uart operation mode
83 */
84 typedef enum
85 {
86 	DISABLE_MODE = 0,
87 	TX_MODE,
88 	RX_MODE,
89 	TX_RX_MODE
90 } UartModeType;
91 
92 /*!	\enum UartHwFlowCtrl
93 	\brief Uart H/W flow control selection
94 */
95 typedef enum
96 {
97 	HW_FLOW_CTRL_DISABLE = 0,
98 	HW_FLOW_CTRL_ENABLE,
99 } UartHwFlowCtrl;
100 
101 /*!	\enum UartInterruptMode
102 	\brief Uart interrupt mode selection
103 */
104 typedef enum
105 {
106 	UART_INTR_DISABLE = 0,
107 	UART_INTR_ENABLE
108 } UartInterruptMode;
109 
110 /*!	\enum CpuClk
111 	\brief CPU clock for UART configuration
112 */
113 typedef enum
114 {
115 	CLK_2_33 = 0,
116 	CLK_77_76,
117 	CLK_19,
118 	CLK_40,
119 	CLK_2_2,
120 	CLK_10,
121 } CpuClk;
122 
123 #if !defined(UART_ID_CONSOLE)
124 /* most often, the UART_HW */
125 #define UART_ID_CONSOLE UART_ID_HW
126 #endif
127 #if !defined(UART_ID_DBG)
128 /* most often, the UART_HW but could be disabled */
129 #define UART_ID_DBG UART_ID_HW
130 #endif
131 
132 #define UART_ID_DISABLED  0 /* /dev/null */
133 #define UART_ID_HW        1 /* the hard UART on the S3 */
134 #define UART_ID_SEMIHOST  2
135 #define UART_ID_FPGA      3 /* second uart if part of FPGA */
136 
137 #define UART_ID_BOOTLOADER  UART_ID_HW
138 
139 
140 /*! \struct UartHandler eoss3_hal_uart.h "inc/eoss3_hal_uart.h"
141  * 	\brief UART configuration structure filled in by user.
142  */
143 typedef struct
144 {
145     CpuClk                 cpuClk;		/*!< CPU clock rate */
146     UartBaudRateType       baud;		/*!< Uart baud rate */
147     UartWordLenType        wl;			/*!< Uart word length */
148     UartStopBitsType       stop;		/*!< Uart stop bit */
149     UartParityType         parity;		/*!< Uart parity bit */
150     UartModeType           mode;		/*!< Uart operation mode */
151     UartHwFlowCtrl         hwCtrl;		/*!< Uart H/W Flow control */
152     UartInterruptMode      intrMode;		/*!< Uart interrupt mode */
153     uint32_t               lcr_h_value;
154     uint32_t               cr_value;
155     uint32_t               ibrd_value;
156     uint32_t               fbrd_value;
157     int                    lpm_enabled;
158 }UartHandler;
159 
160 
161 void uart_pm_update( int uartid, int is_wakeup );
162 
163 void uart_init(int uartid, const UartHandler *pConfig );
164 
165 /* newbaudrate can be:  BAUD_9600, or 9600 */
166 void uart_new_baudrate( int uartid, uint32_t newbaudrate );
167 
168 void uart_isr_handler(int uartid);
169 
170 /**
171  * @brief Send byte over UART.
172  *
173  *  @param uartid   which uart
174  *  @param c		Byte to transmit over UART
175  *
176  *  Raw does not perform lf -> cr/lf mapping.
177  *  Where as "non-raw" does perform lf->cr/lf mapping
178  */
179 void uart_tx_raw(int uartid, int c);
180 
181 /**
182  * @brief Send byte over UART.
183  *
184  *  @param uartid   which uart
185  *  @param c		Byte to transmit over UART
186  *
187  *  Raw does not perform lf -> cr/lf mapping.
188  *  Where as "non-raw" does perform lf->cr/lf mapping
189  */
190 void uart_tx(int uartid, int c);
191 
192 /**
193  * @brief Send buffer over UART.
194  *
195  *  @param uartid   which uart
196  *  @param data     bytes to send
197  *  @param len      count of bytes.
198  *
199  *  Raw does not perform lf -> cr/lf mapping.
200  *  Where as "non-raw" does perform lf->cr/lf mapping
201  */
202 
203 void uart_tx_raw_buf(int uartid, const uint8_t *data,size_t len);
204 
205 /**
206  * @brief Send buffer over UART.
207  *
208  *  @param uartid   which uart
209  *  @param data     bytes to send
210  *  @param len      count of bytes.
211  *
212  *  Raw does not perform lf -> cr/lf mapping.
213  *  Where as "non-raw" does perform lf->cr/lf mapping
214  */
215 void uart_tx_buf(int uartid, const uint8_t *data,size_t len);
216 
217 /* wait till a byte is ready, or timeout */
218 int uart_rx_wait( int uartid, int timeout );
219 /**
220  * @brief Return number of bytes available in input buffer.
221  *
222  * @param uartid   which uart.
223  *
224  */
225 int uart_rx_available(int uartid );
226 
227 /**
228  * @brief Read N bytes from uart into buffer
229  *
230  * @param uartid   which uart.
231  *
232  * This is a RAW uart api, and does not preform cr/lf mapping -> lf.
233  */
234 int uart_rx_raw_buf( int uartid, uint8_t *puthere, size_t nbytes );
235 
236 /**
237  * @brief Read byte from uart, blocking does not return
238  */
239 int uart_rx(int uartid);
240 
241 /**
242  * @brief Set uart lpm enable or disable
243  *
244  * @param 1 = enable, 0 = disable
245  */
246 void uart_set_lpm_state(int uart_id, int lpm_en);
247 
248 /*
249  * @}
250  */
251 #endif /* !__TAMAR_HAL_UART_H_ */
252