1 /*
2  * Copyright (c) 2016 Freescale Semiconductor, Inc.
3  * Copyright 2019-2023, NXP
4  * Copyright (c) 2022 Vestas Wind Systems A/S
5  *
6  * SPDX-License-Identifier: Apache-2.0
7  */
8 
9 #define DT_DRV_COMPAT nxp_lpi2c
10 
11 #include <errno.h>
12 #include <zephyr/drivers/i2c.h>
13 #include <zephyr/drivers/clock_control.h>
14 #include <zephyr/kernel.h>
15 #include <zephyr/irq.h>
16 #include <fsl_lpi2c.h>
17 #if CONFIG_NXP_LP_FLEXCOMM
18 #include <zephyr/drivers/mfd/nxp_lp_flexcomm.h>
19 #endif
20 
21 #include <zephyr/drivers/pinctrl.h>
22 
23 #ifdef CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY
24 #include "i2c_bitbang.h"
25 #include <zephyr/drivers/gpio.h>
26 #endif /* CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY */
27 
28 #include <zephyr/logging/log.h>
29 LOG_MODULE_REGISTER(mcux_lpi2c);
30 
31 
32 #include "i2c-priv.h"
33 /* Wait for the duration of 12 bits to detect a NAK after a bus
34  * address scan.  (10 appears sufficient, 20% safety factor.)
35  */
36 #define SCAN_DELAY_US(baudrate) (12 * USEC_PER_SEC / baudrate)
37 
38 /* Required by DEVICE_MMIO_NAMED_* macros */
39 #define DEV_CFG(_dev) \
40 	((const struct mcux_lpi2c_config *)(_dev)->config)
41 #define DEV_DATA(_dev) ((struct mcux_lpi2c_data *)(_dev)->data)
42 
43 struct mcux_lpi2c_config {
44 	DEVICE_MMIO_NAMED_ROM(reg_base);
45 #ifdef CONFIG_NXP_LP_FLEXCOMM
46 	const struct device *parent_dev;
47 #endif
48 	const struct device *clock_dev;
49 	clock_control_subsys_t clock_subsys;
50 	void (*irq_config_func)(const struct device *dev);
51 	uint32_t bitrate;
52 	uint32_t bus_idle_timeout_ns;
53 	const struct pinctrl_dev_config *pincfg;
54 #ifdef CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY
55 	struct gpio_dt_spec scl;
56 	struct gpio_dt_spec sda;
57 #endif /* CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY */
58 };
59 
60 struct mcux_lpi2c_data {
61 	DEVICE_MMIO_NAMED_RAM(reg_base);
62 	lpi2c_master_handle_t handle;
63 	struct k_sem lock;
64 	struct k_sem device_sync_sem;
65 	status_t callback_status;
66 #ifdef CONFIG_I2C_TARGET
67 	lpi2c_slave_handle_t target_handle;
68 	struct i2c_target_config *target_cfg;
69 	bool target_attached;
70 	bool first_tx;
71 	bool read_active;
72 	bool send_ack;
73 #endif
74 };
75 
mcux_lpi2c_configure(const struct device * dev,uint32_t dev_config_raw)76 static int mcux_lpi2c_configure(const struct device *dev,
77 				uint32_t dev_config_raw)
78 {
79 	const struct mcux_lpi2c_config *config = dev->config;
80 	struct mcux_lpi2c_data *data = dev->data;
81 	LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
82 	uint32_t clock_freq;
83 	uint32_t baudrate;
84 	int ret;
85 
86 	if (!(I2C_MODE_CONTROLLER & dev_config_raw)) {
87 		return -EINVAL;
88 	}
89 
90 	if (I2C_ADDR_10_BITS & dev_config_raw) {
91 		return -EINVAL;
92 	}
93 
94 	switch (I2C_SPEED_GET(dev_config_raw)) {
95 	case I2C_SPEED_STANDARD:
96 		baudrate = KHZ(100);
97 		break;
98 	case I2C_SPEED_FAST:
99 		baudrate = KHZ(400);
100 		break;
101 	case I2C_SPEED_FAST_PLUS:
102 		baudrate = MHZ(1);
103 		break;
104 	default:
105 		return -EINVAL;
106 	}
107 
108 	if (clock_control_get_rate(config->clock_dev, config->clock_subsys,
109 				   &clock_freq)) {
110 		return -EINVAL;
111 	}
112 
113 	ret = k_sem_take(&data->lock, K_FOREVER);
114 	if (ret) {
115 		return ret;
116 	}
117 
118 	LPI2C_MasterSetBaudRate(base, clock_freq, baudrate);
119 	k_sem_give(&data->lock);
120 
121 	return 0;
122 }
123 
mcux_lpi2c_master_transfer_callback(LPI2C_Type * base,lpi2c_master_handle_t * handle,status_t status,void * userData)124 static void mcux_lpi2c_master_transfer_callback(LPI2C_Type *base,
125 						lpi2c_master_handle_t *handle,
126 						status_t status, void *userData)
127 {
128 	struct mcux_lpi2c_data *data = userData;
129 
130 	ARG_UNUSED(handle);
131 	ARG_UNUSED(base);
132 
133 	data->callback_status = status;
134 	k_sem_give(&data->device_sync_sem);
135 }
136 
mcux_lpi2c_convert_flags(int msg_flags)137 static uint32_t mcux_lpi2c_convert_flags(int msg_flags)
138 {
139 	uint32_t flags = 0U;
140 
141 	if (!(msg_flags & I2C_MSG_STOP)) {
142 		flags |= kLPI2C_TransferNoStopFlag;
143 	}
144 
145 	if (msg_flags & I2C_MSG_RESTART) {
146 		flags |= kLPI2C_TransferRepeatedStartFlag;
147 	}
148 
149 	return flags;
150 }
151 
mcux_lpi2c_transfer(const struct device * dev,struct i2c_msg * msgs,uint8_t num_msgs,uint16_t addr)152 static int mcux_lpi2c_transfer(const struct device *dev, struct i2c_msg *msgs,
153 				   uint8_t num_msgs, uint16_t addr)
154 {
155 	const struct mcux_lpi2c_config *config = dev->config;
156 	struct mcux_lpi2c_data *data = dev->data;
157 	LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
158 	lpi2c_master_transfer_t transfer;
159 	status_t status;
160 	int ret = 0;
161 
162 	ret = k_sem_take(&data->lock, K_FOREVER);
163 	if (ret) {
164 		return ret;
165 	}
166 
167 	/* Iterate over all the messages */
168 	for (int i = 0; i < num_msgs; i++) {
169 		if (I2C_MSG_ADDR_10_BITS & msgs->flags) {
170 			ret = -ENOTSUP;
171 			break;
172 		}
173 
174 		/* Initialize the transfer descriptor */
175 		transfer.flags = mcux_lpi2c_convert_flags(msgs->flags);
176 
177 		/* Prevent the controller to send a start condition between
178 		 * messages, except if explicitly requested.
179 		 */
180 		if (i != 0 && !(msgs->flags & I2C_MSG_RESTART)) {
181 			transfer.flags |= kLPI2C_TransferNoStartFlag;
182 		}
183 
184 		transfer.slaveAddress = addr;
185 		transfer.direction = (msgs->flags & I2C_MSG_READ)
186 			? kLPI2C_Read : kLPI2C_Write;
187 		transfer.subaddress = 0;
188 		transfer.subaddressSize = 0;
189 		transfer.data = msgs->buf;
190 		transfer.dataSize = msgs->len;
191 
192 		/* Start the transfer */
193 		status = LPI2C_MasterTransferNonBlocking(base,
194 				&data->handle, &transfer);
195 
196 		/* Return an error if the transfer didn't start successfully
197 		 * e.g., if the bus was busy
198 		 */
199 		if (status != kStatus_Success) {
200 			LPI2C_MasterTransferAbort(base, &data->handle);
201 			ret = -EIO;
202 			break;
203 		}
204 
205 		/* Wait for the transfer to complete */
206 		k_sem_take(&data->device_sync_sem, K_FOREVER);
207 
208 		/* Return an error if the transfer didn't complete
209 		 * successfully. e.g., nak, timeout, lost arbitration
210 		 */
211 		if (data->callback_status != kStatus_Success) {
212 			LPI2C_MasterTransferAbort(base, &data->handle);
213 			ret = -EIO;
214 			break;
215 		}
216 		if (msgs->len == 0) {
217 			k_busy_wait(SCAN_DELAY_US(config->bitrate));
218 			if (0 != (base->MSR & LPI2C_MSR_NDF_MASK)) {
219 				LPI2C_MasterTransferAbort(base, &data->handle);
220 				ret = -EIO;
221 				break;
222 			}
223 		}
224 		/* Move to the next message */
225 		msgs++;
226 	}
227 
228 	k_sem_give(&data->lock);
229 
230 	return ret;
231 }
232 
233 #if CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY
mcux_lpi2c_bitbang_set_scl(void * io_context,int state)234 static void mcux_lpi2c_bitbang_set_scl(void *io_context, int state)
235 {
236 	const struct mcux_lpi2c_config *config = io_context;
237 
238 	gpio_pin_set_dt(&config->scl, state);
239 }
240 
mcux_lpi2c_bitbang_set_sda(void * io_context,int state)241 static void mcux_lpi2c_bitbang_set_sda(void *io_context, int state)
242 {
243 	const struct mcux_lpi2c_config *config = io_context;
244 
245 	gpio_pin_set_dt(&config->sda, state);
246 }
247 
mcux_lpi2c_bitbang_get_sda(void * io_context)248 static int mcux_lpi2c_bitbang_get_sda(void *io_context)
249 {
250 	const struct mcux_lpi2c_config *config = io_context;
251 
252 	return gpio_pin_get_dt(&config->sda) == 0 ? 0 : 1;
253 }
254 
mcux_lpi2c_recover_bus(const struct device * dev)255 static int mcux_lpi2c_recover_bus(const struct device *dev)
256 {
257 	const struct mcux_lpi2c_config *config = dev->config;
258 	struct mcux_lpi2c_data *data = dev->data;
259 	struct i2c_bitbang bitbang_ctx;
260 	struct i2c_bitbang_io bitbang_io = {
261 		.set_scl = mcux_lpi2c_bitbang_set_scl,
262 		.set_sda = mcux_lpi2c_bitbang_set_sda,
263 		.get_sda = mcux_lpi2c_bitbang_get_sda,
264 	};
265 	uint32_t bitrate_cfg;
266 	int error = 0;
267 
268 	if (!gpio_is_ready_dt(&config->scl)) {
269 		LOG_ERR("SCL GPIO device not ready");
270 		return -EIO;
271 	}
272 
273 	if (!gpio_is_ready_dt(&config->sda)) {
274 		LOG_ERR("SDA GPIO device not ready");
275 		return -EIO;
276 	}
277 
278 	k_sem_take(&data->lock, K_FOREVER);
279 
280 	error = gpio_pin_configure_dt(&config->scl, GPIO_OUTPUT_HIGH);
281 	if (error != 0) {
282 		LOG_ERR("failed to configure SCL GPIO (err %d)", error);
283 		goto restore;
284 	}
285 
286 	error = gpio_pin_configure_dt(&config->sda, GPIO_OUTPUT_HIGH);
287 	if (error != 0) {
288 		LOG_ERR("failed to configure SDA GPIO (err %d)", error);
289 		goto restore;
290 	}
291 
292 	i2c_bitbang_init(&bitbang_ctx, &bitbang_io, (void *)config);
293 
294 	bitrate_cfg = i2c_map_dt_bitrate(config->bitrate) | I2C_MODE_CONTROLLER;
295 	error = i2c_bitbang_configure(&bitbang_ctx, bitrate_cfg);
296 	if (error != 0) {
297 		LOG_ERR("failed to configure I2C bitbang (err %d)", error);
298 		goto restore;
299 	}
300 
301 	error = i2c_bitbang_recover_bus(&bitbang_ctx);
302 	if (error != 0) {
303 		LOG_ERR("failed to recover bus (err %d)", error);
304 		goto restore;
305 	}
306 
307 restore:
308 	(void)pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
309 
310 	k_sem_give(&data->lock);
311 
312 	return error;
313 }
314 #endif /* CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY */
315 
316 #ifdef CONFIG_I2C_TARGET
mcux_lpi2c_slave_irq_handler(const struct device * dev)317 static void mcux_lpi2c_slave_irq_handler(const struct device *dev)
318 {
319 	struct mcux_lpi2c_data *data = dev->data;
320 	LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
321 	const struct i2c_target_callbacks *target_cb = data->target_cfg->callbacks;
322 	int ret;
323 	uint32_t flags;
324 	uint8_t i2c_data;
325 
326 	/* Note- the HAL provides a callback-based I2C slave API, but
327 	 * the API expects the user to provide a transmit buffer of
328 	 * a fixed length at the first byte received, and will not signal
329 	 * the user callback until this buffer is exhausted. This does not
330 	 * work well with the Zephyr API, which requires callbacks for
331 	 * every byte. For these reason, we handle the LPI2C IRQ
332 	 * directly.
333 	 */
334 	flags = LPI2C_SlaveGetStatusFlags(base);
335 
336 	if (flags & kLPI2C_SlaveAddressValidFlag) {
337 		/* Read Slave address to clear flag */
338 		LPI2C_SlaveGetReceivedAddress(base);
339 		data->first_tx = true;
340 		/* Reset to sending ACK, in case we NAK'ed before */
341 		data->send_ack = true;
342 	}
343 
344 	if (flags & kLPI2C_SlaveRxReadyFlag) {
345 		/* RX data is available, read it and issue callback */
346 		i2c_data = (uint8_t)base->SRDR;
347 		if (data->first_tx) {
348 			data->first_tx = false;
349 			if (target_cb->write_requested) {
350 				ret = target_cb->write_requested(data->target_cfg);
351 				if (ret < 0) {
352 					/* NAK further bytes */
353 					data->send_ack = false;
354 				}
355 			}
356 		}
357 		if (target_cb->write_received) {
358 			ret = target_cb->write_received(data->target_cfg,
359 							i2c_data);
360 			if (ret < 0) {
361 				/* NAK further bytes */
362 				data->send_ack = false;
363 			}
364 		}
365 	}
366 
367 	if (flags & kLPI2C_SlaveTxReadyFlag) {
368 		/* Space is available in TX fifo, issue callback and write out */
369 		if (data->first_tx) {
370 			data->read_active = true;
371 			data->first_tx = false;
372 			if (target_cb->read_requested) {
373 				ret = target_cb->read_requested(data->target_cfg,
374 								&i2c_data);
375 				if (ret < 0) {
376 					/* Disable TX */
377 					data->read_active = false;
378 				} else {
379 					/* Send I2C data */
380 					base->STDR = i2c_data;
381 				}
382 			}
383 		} else if (data->read_active) {
384 			if (target_cb->read_processed) {
385 				ret = target_cb->read_processed(data->target_cfg,
386 								&i2c_data);
387 				if (ret < 0) {
388 					/* Disable TX */
389 					data->read_active = false;
390 				} else {
391 					/* Send I2C data */
392 					base->STDR = i2c_data;
393 				}
394 			}
395 		}
396 	}
397 
398 	if (flags & kLPI2C_SlaveStopDetectFlag) {
399 		LPI2C_SlaveClearStatusFlags(base, flags);
400 		if (target_cb->stop) {
401 			target_cb->stop(data->target_cfg);
402 		}
403 	}
404 
405 	if (flags & kLPI2C_SlaveTransmitAckFlag) {
406 		LPI2C_SlaveTransmitAck(base, data->send_ack);
407 	}
408 }
409 
mcux_lpi2c_target_register(const struct device * dev,struct i2c_target_config * target_config)410 static int mcux_lpi2c_target_register(const struct device *dev,
411 					  struct i2c_target_config *target_config)
412 {
413 	const struct mcux_lpi2c_config *config = dev->config;
414 	struct mcux_lpi2c_data *data = dev->data;
415 	LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
416 	lpi2c_slave_config_t slave_config;
417 	uint32_t clock_freq;
418 
419 	LPI2C_MasterDeinit(base);
420 
421 	/* Get the clock frequency */
422 	if (clock_control_get_rate(config->clock_dev, config->clock_subsys,
423 				   &clock_freq)) {
424 		return -EINVAL;
425 	}
426 
427 	if (!target_config) {
428 		return -EINVAL;
429 	}
430 
431 	if (data->target_attached) {
432 		return -EBUSY;
433 	}
434 
435 	data->target_attached = true;
436 	data->target_cfg = target_config;
437 	data->first_tx = false;
438 
439 	LPI2C_SlaveGetDefaultConfig(&slave_config);
440 	slave_config.address0 = target_config->address;
441 	/* Note- this setting enables clock stretching to allow the
442 	 * slave to respond to each byte with an ACK/NAK.
443 	 * this behavior may cause issues with some I2C controllers.
444 	 */
445 	slave_config.sclStall.enableAck = true;
446 	LPI2C_SlaveInit(base, &slave_config, clock_freq);
447 	/* Clear all flags. */
448 	LPI2C_SlaveClearStatusFlags(base, (uint32_t)kLPI2C_SlaveClearFlags);
449 	/* Enable interrupt */
450 	LPI2C_SlaveEnableInterrupts(base,
451 					(kLPI2C_SlaveTxReadyFlag |
452 					kLPI2C_SlaveRxReadyFlag |
453 					kLPI2C_SlaveStopDetectFlag |
454 					kLPI2C_SlaveAddressValidFlag |
455 					kLPI2C_SlaveTransmitAckFlag));
456 	return 0;
457 }
458 
mcux_lpi2c_target_unregister(const struct device * dev,struct i2c_target_config * target_config)459 static int mcux_lpi2c_target_unregister(const struct device *dev,
460 					struct i2c_target_config *target_config)
461 {
462 	struct mcux_lpi2c_data *data = dev->data;
463 	LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
464 
465 	if (!data->target_attached) {
466 		return -EINVAL;
467 	}
468 
469 	data->target_cfg = NULL;
470 	data->target_attached = false;
471 
472 	LPI2C_SlaveDeinit(base);
473 
474 	return 0;
475 }
476 #endif /* CONFIG_I2C_TARGET */
477 
mcux_lpi2c_isr(const struct device * dev)478 static void mcux_lpi2c_isr(const struct device *dev)
479 {
480 	struct mcux_lpi2c_data *data = dev->data;
481 	LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
482 
483  #ifdef CONFIG_I2C_TARGET
484 	if (data->target_attached) {
485 		mcux_lpi2c_slave_irq_handler(dev);
486 	}
487 #endif /* CONFIG_I2C_TARGET */
488 #if CONFIG_HAS_MCUX_FLEXCOMM
489 	LPI2C_MasterTransferHandleIRQ(LPI2C_GetInstance(base), &data->handle);
490 #else
491 	LPI2C_MasterTransferHandleIRQ(base, &data->handle);
492 #endif
493 }
494 
mcux_lpi2c_init(const struct device * dev)495 static int mcux_lpi2c_init(const struct device *dev)
496 {
497 	const struct mcux_lpi2c_config *config = dev->config;
498 	struct mcux_lpi2c_data *data = dev->data;
499 	LPI2C_Type *base;
500 	uint32_t clock_freq, bitrate_cfg;
501 	lpi2c_master_config_t master_config;
502 	int error;
503 
504 	DEVICE_MMIO_NAMED_MAP(dev, reg_base, K_MEM_CACHE_NONE | K_MEM_DIRECT_MAP);
505 
506 	base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
507 
508 	k_sem_init(&data->lock, 1, 1);
509 	k_sem_init(&data->device_sync_sem, 0, K_SEM_MAX_LIMIT);
510 
511 	if (!device_is_ready(config->clock_dev)) {
512 		LOG_ERR("clock control device not ready");
513 		return -ENODEV;
514 	}
515 
516 	error = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
517 	if (error) {
518 		return error;
519 	}
520 
521 	if (clock_control_get_rate(config->clock_dev, config->clock_subsys,
522 				   &clock_freq)) {
523 		return -EINVAL;
524 	}
525 
526 	LPI2C_MasterGetDefaultConfig(&master_config);
527 	master_config.busIdleTimeout_ns = config->bus_idle_timeout_ns;
528 	LPI2C_MasterInit(base, &master_config, clock_freq);
529 	LPI2C_MasterTransferCreateHandle(base, &data->handle,
530 					 mcux_lpi2c_master_transfer_callback,
531 					 data);
532 
533 	bitrate_cfg = i2c_map_dt_bitrate(config->bitrate);
534 
535 	error = mcux_lpi2c_configure(dev, I2C_MODE_CONTROLLER | bitrate_cfg);
536 	if (error) {
537 		return error;
538 	}
539 #if CONFIG_NXP_LP_FLEXCOMM
540 	/* When using LP Flexcomm driver, register the interrupt handler
541 	 * so we receive notification from the LP Flexcomm interrupt handler.
542 	 */
543 	nxp_lp_flexcomm_setirqhandler(config->parent_dev, dev,
544 				      LP_FLEXCOMM_PERIPH_LPI2C, mcux_lpi2c_isr);
545 #else
546 	/* Interrupt is managed by this driver */
547 	config->irq_config_func(dev);
548 #endif
549 
550 	return 0;
551 }
552 
553 static DEVICE_API(i2c, mcux_lpi2c_driver_api) = {
554 	.configure = mcux_lpi2c_configure,
555 	.transfer = mcux_lpi2c_transfer,
556 #if CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY
557 	.recover_bus = mcux_lpi2c_recover_bus,
558 #endif /* CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY */
559 #if CONFIG_I2C_TARGET
560 	.target_register = mcux_lpi2c_target_register,
561 	.target_unregister = mcux_lpi2c_target_unregister,
562 #endif /* CONFIG_I2C_TARGET */
563 };
564 
565 #if CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY
566 #define I2C_MCUX_LPI2C_SCL_INIT(n) .scl = GPIO_DT_SPEC_INST_GET_OR(n, scl_gpios, {0}),
567 #define I2C_MCUX_LPI2C_SDA_INIT(n) .sda = GPIO_DT_SPEC_INST_GET_OR(n, sda_gpios, {0}),
568 #else
569 #define I2C_MCUX_LPI2C_SCL_INIT(n)
570 #define I2C_MCUX_LPI2C_SDA_INIT(n)
571 #endif /* CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY */
572 
573 #define I2C_MCUX_LPI2C_MODULE_IRQ_CONNECT(n)				\
574 	do {								\
575 		IRQ_CONNECT(DT_INST_IRQN(n),				\
576 			DT_INST_IRQ(n, priority),			\
577 			mcux_lpi2c_isr,					\
578 			DEVICE_DT_INST_GET(n), 0);			\
579 		irq_enable(DT_INST_IRQN(n));				\
580 	} while (false)
581 
582 #define I2C_MCUX_LPI2C_MODULE_IRQ(n)					\
583 	IF_ENABLED(DT_INST_IRQ_HAS_IDX(n, 0),				\
584 		(I2C_MCUX_LPI2C_MODULE_IRQ_CONNECT(n)))
585 
586 #ifdef CONFIG_NXP_LP_FLEXCOMM
587 #define PARENT_DEV(n)							\
588 	.parent_dev = DEVICE_DT_GET(DT_INST_PARENT(n)),
589 #else
590 #define PARENT_DEV(n)
591 #endif /* CONFIG_NXP_LP_FLEXCOMM */
592 
593 #define I2C_MCUX_LPI2C_INIT(n)						\
594 	PINCTRL_DT_INST_DEFINE(n);					\
595 									\
596 	static void mcux_lpi2c_config_func_##n(const struct device *dev); \
597 									\
598 	static const struct mcux_lpi2c_config mcux_lpi2c_config_##n = {	\
599 		DEVICE_MMIO_NAMED_ROM_INIT(reg_base, DT_DRV_INST(n)),	\
600 		PARENT_DEV(n)						\
601 		.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)),	\
602 		.clock_subsys =						\
603 			(clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name),\
604 		.irq_config_func = mcux_lpi2c_config_func_##n,		\
605 		.bitrate = DT_INST_PROP(n, clock_frequency),		\
606 		.pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n),		\
607 		I2C_MCUX_LPI2C_SCL_INIT(n)				\
608 		I2C_MCUX_LPI2C_SDA_INIT(n)				\
609 		.bus_idle_timeout_ns =					\
610 			UTIL_AND(DT_INST_NODE_HAS_PROP(n, bus_idle_timeout),\
611 				 DT_INST_PROP(n, bus_idle_timeout)),	\
612 	};								\
613 									\
614 	static struct mcux_lpi2c_data mcux_lpi2c_data_##n;		\
615 									\
616 	I2C_DEVICE_DT_INST_DEFINE(n, mcux_lpi2c_init, NULL,		\
617 				&mcux_lpi2c_data_##n,			\
618 				&mcux_lpi2c_config_##n, POST_KERNEL,	\
619 				CONFIG_I2C_INIT_PRIORITY,			\
620 				&mcux_lpi2c_driver_api);			\
621 									\
622 	static void mcux_lpi2c_config_func_##n(const struct device *dev) \
623 	{								\
624 		I2C_MCUX_LPI2C_MODULE_IRQ(n);				\
625 	}
626 
627 DT_INST_FOREACH_STATUS_OKAY(I2C_MCUX_LPI2C_INIT)
628