1 /*
2  * Copyright (c) 2016 Freescale Semiconductor, Inc.
3  * Copyright 2019-2023, NXP
4  * Copyright (c) 2022 Vestas Wind Systems A/S
5  *
6  * SPDX-License-Identifier: Apache-2.0
7  */
8 
9 #define DT_DRV_COMPAT nxp_lpi2c
10 
11 #include <errno.h>
12 #include <zephyr/drivers/i2c.h>
13 #include <zephyr/drivers/clock_control.h>
14 #include <zephyr/kernel.h>
15 #include <zephyr/irq.h>
16 #include <fsl_lpi2c.h>
17 #if CONFIG_NXP_LP_FLEXCOMM
18 #include <zephyr/drivers/mfd/nxp_lp_flexcomm.h>
19 #endif
20 
21 #include <zephyr/drivers/pinctrl.h>
22 
23 #ifdef CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY
24 #include "i2c_bitbang.h"
25 #include <zephyr/drivers/gpio.h>
26 #endif /* CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY */
27 
28 #include <zephyr/logging/log.h>
29 LOG_MODULE_REGISTER(mcux_lpi2c);
30 
31 
32 #include "i2c-priv.h"
33 /* Wait for the duration of 12 bits to detect a NAK after a bus
34  * address scan.  (10 appears sufficient, 20% safety factor.)
35  */
36 #define SCAN_DELAY_US(baudrate) (12 * USEC_PER_SEC / baudrate)
37 
38 /* Required by DEVICE_MMIO_NAMED_* macros */
39 #define DEV_CFG(_dev) \
40 	((const struct mcux_lpi2c_config *)(_dev)->config)
41 #define DEV_DATA(_dev) ((struct mcux_lpi2c_data *)(_dev)->data)
42 
43 struct mcux_lpi2c_config {
44 	DEVICE_MMIO_NAMED_ROM(reg_base);
45 	const struct device *clock_dev;
46 	clock_control_subsys_t clock_subsys;
47 	void (*irq_config_func)(const struct device *dev);
48 	uint32_t bitrate;
49 	uint32_t bus_idle_timeout_ns;
50 	const struct pinctrl_dev_config *pincfg;
51 #ifdef CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY
52 	struct gpio_dt_spec scl;
53 	struct gpio_dt_spec sda;
54 #endif /* CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY */
55 };
56 
57 struct mcux_lpi2c_data {
58 	DEVICE_MMIO_NAMED_RAM(reg_base);
59 	lpi2c_master_handle_t handle;
60 	struct k_sem lock;
61 	struct k_sem device_sync_sem;
62 	status_t callback_status;
63 #ifdef CONFIG_I2C_TARGET
64 	lpi2c_slave_handle_t target_handle;
65 	struct i2c_target_config *target_cfg;
66 	bool target_attached;
67 	bool first_tx;
68 	bool read_active;
69 	bool send_ack;
70 #endif
71 };
72 
mcux_lpi2c_configure(const struct device * dev,uint32_t dev_config_raw)73 static int mcux_lpi2c_configure(const struct device *dev,
74 				uint32_t dev_config_raw)
75 {
76 	const struct mcux_lpi2c_config *config = dev->config;
77 	struct mcux_lpi2c_data *data = dev->data;
78 	LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
79 	uint32_t clock_freq;
80 	uint32_t baudrate;
81 	int ret;
82 
83 	if (!(I2C_MODE_CONTROLLER & dev_config_raw)) {
84 		return -EINVAL;
85 	}
86 
87 	if (I2C_ADDR_10_BITS & dev_config_raw) {
88 		return -EINVAL;
89 	}
90 
91 	switch (I2C_SPEED_GET(dev_config_raw)) {
92 	case I2C_SPEED_STANDARD:
93 		baudrate = KHZ(100);
94 		break;
95 	case I2C_SPEED_FAST:
96 		baudrate = KHZ(400);
97 		break;
98 	case I2C_SPEED_FAST_PLUS:
99 		baudrate = MHZ(1);
100 		break;
101 	default:
102 		return -EINVAL;
103 	}
104 
105 	if (clock_control_get_rate(config->clock_dev, config->clock_subsys,
106 				   &clock_freq)) {
107 		return -EINVAL;
108 	}
109 
110 	ret = k_sem_take(&data->lock, K_FOREVER);
111 	if (ret) {
112 		return ret;
113 	}
114 
115 	LPI2C_MasterSetBaudRate(base, clock_freq, baudrate);
116 	k_sem_give(&data->lock);
117 
118 	return 0;
119 }
120 
mcux_lpi2c_master_transfer_callback(LPI2C_Type * base,lpi2c_master_handle_t * handle,status_t status,void * userData)121 static void mcux_lpi2c_master_transfer_callback(LPI2C_Type *base,
122 						lpi2c_master_handle_t *handle,
123 						status_t status, void *userData)
124 {
125 	struct mcux_lpi2c_data *data = userData;
126 
127 	ARG_UNUSED(handle);
128 	ARG_UNUSED(base);
129 
130 	data->callback_status = status;
131 	k_sem_give(&data->device_sync_sem);
132 }
133 
mcux_lpi2c_convert_flags(int msg_flags)134 static uint32_t mcux_lpi2c_convert_flags(int msg_flags)
135 {
136 	uint32_t flags = 0U;
137 
138 	if (!(msg_flags & I2C_MSG_STOP)) {
139 		flags |= kLPI2C_TransferNoStopFlag;
140 	}
141 
142 	if (msg_flags & I2C_MSG_RESTART) {
143 		flags |= kLPI2C_TransferRepeatedStartFlag;
144 	}
145 
146 	return flags;
147 }
148 
mcux_lpi2c_transfer(const struct device * dev,struct i2c_msg * msgs,uint8_t num_msgs,uint16_t addr)149 static int mcux_lpi2c_transfer(const struct device *dev, struct i2c_msg *msgs,
150 				   uint8_t num_msgs, uint16_t addr)
151 {
152 	const struct mcux_lpi2c_config *config = dev->config;
153 	struct mcux_lpi2c_data *data = dev->data;
154 	LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
155 	lpi2c_master_transfer_t transfer;
156 	status_t status;
157 	int ret = 0;
158 
159 	ret = k_sem_take(&data->lock, K_FOREVER);
160 	if (ret) {
161 		return ret;
162 	}
163 
164 	/* Iterate over all the messages */
165 	for (int i = 0; i < num_msgs; i++) {
166 		if (I2C_MSG_ADDR_10_BITS & msgs->flags) {
167 			ret = -ENOTSUP;
168 			break;
169 		}
170 
171 		/* Initialize the transfer descriptor */
172 		transfer.flags = mcux_lpi2c_convert_flags(msgs->flags);
173 
174 		/* Prevent the controller to send a start condition between
175 		 * messages, except if explicitly requested.
176 		 */
177 		if (i != 0 && !(msgs->flags & I2C_MSG_RESTART)) {
178 			transfer.flags |= kLPI2C_TransferNoStartFlag;
179 		}
180 
181 		transfer.slaveAddress = addr;
182 		transfer.direction = (msgs->flags & I2C_MSG_READ)
183 			? kLPI2C_Read : kLPI2C_Write;
184 		transfer.subaddress = 0;
185 		transfer.subaddressSize = 0;
186 		transfer.data = msgs->buf;
187 		transfer.dataSize = msgs->len;
188 
189 		/* Start the transfer */
190 		status = LPI2C_MasterTransferNonBlocking(base,
191 				&data->handle, &transfer);
192 
193 		/* Return an error if the transfer didn't start successfully
194 		 * e.g., if the bus was busy
195 		 */
196 		if (status != kStatus_Success) {
197 			LPI2C_MasterTransferAbort(base, &data->handle);
198 			ret = -EIO;
199 			break;
200 		}
201 
202 		/* Wait for the transfer to complete */
203 		k_sem_take(&data->device_sync_sem, K_FOREVER);
204 
205 		/* Return an error if the transfer didn't complete
206 		 * successfully. e.g., nak, timeout, lost arbitration
207 		 */
208 		if (data->callback_status != kStatus_Success) {
209 			LPI2C_MasterTransferAbort(base, &data->handle);
210 			ret = -EIO;
211 			break;
212 		}
213 		if (msgs->len == 0) {
214 			k_busy_wait(SCAN_DELAY_US(config->bitrate));
215 			if (0 != (base->MSR & LPI2C_MSR_NDF_MASK)) {
216 				LPI2C_MasterTransferAbort(base, &data->handle);
217 				ret = -EIO;
218 				break;
219 			}
220 		}
221 		/* Move to the next message */
222 		msgs++;
223 	}
224 
225 	k_sem_give(&data->lock);
226 
227 	return ret;
228 }
229 
230 #if CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY
mcux_lpi2c_bitbang_set_scl(void * io_context,int state)231 static void mcux_lpi2c_bitbang_set_scl(void *io_context, int state)
232 {
233 	const struct mcux_lpi2c_config *config = io_context;
234 
235 	gpio_pin_set_dt(&config->scl, state);
236 }
237 
mcux_lpi2c_bitbang_set_sda(void * io_context,int state)238 static void mcux_lpi2c_bitbang_set_sda(void *io_context, int state)
239 {
240 	const struct mcux_lpi2c_config *config = io_context;
241 
242 	gpio_pin_set_dt(&config->sda, state);
243 }
244 
mcux_lpi2c_bitbang_get_sda(void * io_context)245 static int mcux_lpi2c_bitbang_get_sda(void *io_context)
246 {
247 	const struct mcux_lpi2c_config *config = io_context;
248 
249 	return gpio_pin_get_dt(&config->sda) == 0 ? 0 : 1;
250 }
251 
mcux_lpi2c_recover_bus(const struct device * dev)252 static int mcux_lpi2c_recover_bus(const struct device *dev)
253 {
254 	const struct mcux_lpi2c_config *config = dev->config;
255 	struct mcux_lpi2c_data *data = dev->data;
256 	struct i2c_bitbang bitbang_ctx;
257 	struct i2c_bitbang_io bitbang_io = {
258 		.set_scl = mcux_lpi2c_bitbang_set_scl,
259 		.set_sda = mcux_lpi2c_bitbang_set_sda,
260 		.get_sda = mcux_lpi2c_bitbang_get_sda,
261 	};
262 	uint32_t bitrate_cfg;
263 	int error = 0;
264 
265 	if (!gpio_is_ready_dt(&config->scl)) {
266 		LOG_ERR("SCL GPIO device not ready");
267 		return -EIO;
268 	}
269 
270 	if (!gpio_is_ready_dt(&config->sda)) {
271 		LOG_ERR("SDA GPIO device not ready");
272 		return -EIO;
273 	}
274 
275 	k_sem_take(&data->lock, K_FOREVER);
276 
277 	error = gpio_pin_configure_dt(&config->scl, GPIO_OUTPUT_HIGH);
278 	if (error != 0) {
279 		LOG_ERR("failed to configure SCL GPIO (err %d)", error);
280 		goto restore;
281 	}
282 
283 	error = gpio_pin_configure_dt(&config->sda, GPIO_OUTPUT_HIGH);
284 	if (error != 0) {
285 		LOG_ERR("failed to configure SDA GPIO (err %d)", error);
286 		goto restore;
287 	}
288 
289 	i2c_bitbang_init(&bitbang_ctx, &bitbang_io, (void *)config);
290 
291 	bitrate_cfg = i2c_map_dt_bitrate(config->bitrate) | I2C_MODE_CONTROLLER;
292 	error = i2c_bitbang_configure(&bitbang_ctx, bitrate_cfg);
293 	if (error != 0) {
294 		LOG_ERR("failed to configure I2C bitbang (err %d)", error);
295 		goto restore;
296 	}
297 
298 	error = i2c_bitbang_recover_bus(&bitbang_ctx);
299 	if (error != 0) {
300 		LOG_ERR("failed to recover bus (err %d)", error);
301 		goto restore;
302 	}
303 
304 restore:
305 	(void)pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
306 
307 	k_sem_give(&data->lock);
308 
309 	return error;
310 }
311 #endif /* CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY */
312 
313 #ifdef CONFIG_I2C_TARGET
mcux_lpi2c_slave_irq_handler(const struct device * dev)314 static void mcux_lpi2c_slave_irq_handler(const struct device *dev)
315 {
316 	struct mcux_lpi2c_data *data = dev->data;
317 	LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
318 	const struct i2c_target_callbacks *target_cb = data->target_cfg->callbacks;
319 	int ret;
320 	uint32_t flags;
321 	uint8_t i2c_data;
322 
323 	/* Note- the HAL provides a callback-based I2C slave API, but
324 	 * the API expects the user to provide a transmit buffer of
325 	 * a fixed length at the first byte received, and will not signal
326 	 * the user callback until this buffer is exhausted. This does not
327 	 * work well with the Zephyr API, which requires callbacks for
328 	 * every byte. For these reason, we handle the LPI2C IRQ
329 	 * directly.
330 	 */
331 	flags = LPI2C_SlaveGetStatusFlags(base);
332 
333 	if (flags & kLPI2C_SlaveAddressValidFlag) {
334 		/* Read Slave address to clear flag */
335 		LPI2C_SlaveGetReceivedAddress(base);
336 		data->first_tx = true;
337 		/* Reset to sending ACK, in case we NAK'ed before */
338 		data->send_ack = true;
339 	}
340 
341 	if (flags & kLPI2C_SlaveRxReadyFlag) {
342 		/* RX data is available, read it and issue callback */
343 		i2c_data = (uint8_t)base->SRDR;
344 		if (data->first_tx) {
345 			data->first_tx = false;
346 			if (target_cb->write_requested) {
347 				ret = target_cb->write_requested(data->target_cfg);
348 				if (ret < 0) {
349 					/* NAK further bytes */
350 					data->send_ack = false;
351 				}
352 			}
353 		}
354 		if (target_cb->write_received) {
355 			ret = target_cb->write_received(data->target_cfg,
356 							i2c_data);
357 			if (ret < 0) {
358 				/* NAK further bytes */
359 				data->send_ack = false;
360 			}
361 		}
362 	}
363 
364 	if (flags & kLPI2C_SlaveTxReadyFlag) {
365 		/* Space is available in TX fifo, issue callback and write out */
366 		if (data->first_tx) {
367 			data->read_active = true;
368 			data->first_tx = false;
369 			if (target_cb->read_requested) {
370 				ret = target_cb->read_requested(data->target_cfg,
371 								&i2c_data);
372 				if (ret < 0) {
373 					/* Disable TX */
374 					data->read_active = false;
375 				} else {
376 					/* Send I2C data */
377 					base->STDR = i2c_data;
378 				}
379 			}
380 		} else if (data->read_active) {
381 			if (target_cb->read_processed) {
382 				ret = target_cb->read_processed(data->target_cfg,
383 								&i2c_data);
384 				if (ret < 0) {
385 					/* Disable TX */
386 					data->read_active = false;
387 				} else {
388 					/* Send I2C data */
389 					base->STDR = i2c_data;
390 				}
391 			}
392 		}
393 	}
394 
395 	if (flags & kLPI2C_SlaveStopDetectFlag) {
396 		LPI2C_SlaveClearStatusFlags(base, flags);
397 		if (target_cb->stop) {
398 			target_cb->stop(data->target_cfg);
399 		}
400 	}
401 
402 	if (flags & kLPI2C_SlaveTransmitAckFlag) {
403 		LPI2C_SlaveTransmitAck(base, data->send_ack);
404 	}
405 }
406 
mcux_lpi2c_target_register(const struct device * dev,struct i2c_target_config * target_config)407 static int mcux_lpi2c_target_register(const struct device *dev,
408 					  struct i2c_target_config *target_config)
409 {
410 	const struct mcux_lpi2c_config *config = dev->config;
411 	struct mcux_lpi2c_data *data = dev->data;
412 	LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
413 	lpi2c_slave_config_t slave_config;
414 	uint32_t clock_freq;
415 
416 	LPI2C_MasterDeinit(base);
417 
418 	/* Get the clock frequency */
419 	if (clock_control_get_rate(config->clock_dev, config->clock_subsys,
420 				   &clock_freq)) {
421 		return -EINVAL;
422 	}
423 
424 	if (!target_config) {
425 		return -EINVAL;
426 	}
427 
428 	if (data->target_attached) {
429 		return -EBUSY;
430 	}
431 
432 	data->target_attached = true;
433 	data->target_cfg = target_config;
434 	data->first_tx = false;
435 
436 	LPI2C_SlaveGetDefaultConfig(&slave_config);
437 	slave_config.address0 = target_config->address;
438 	/* Note- this setting enables clock stretching to allow the
439 	 * slave to respond to each byte with an ACK/NAK.
440 	 * this behavior may cause issues with some I2C controllers.
441 	 */
442 	slave_config.sclStall.enableAck = true;
443 	LPI2C_SlaveInit(base, &slave_config, clock_freq);
444 	/* Clear all flags. */
445 	LPI2C_SlaveClearStatusFlags(base, (uint32_t)kLPI2C_SlaveClearFlags);
446 	/* Enable interrupt */
447 	LPI2C_SlaveEnableInterrupts(base,
448 					(kLPI2C_SlaveTxReadyFlag |
449 					kLPI2C_SlaveRxReadyFlag |
450 					kLPI2C_SlaveStopDetectFlag |
451 					kLPI2C_SlaveAddressValidFlag |
452 					kLPI2C_SlaveTransmitAckFlag));
453 	return 0;
454 }
455 
mcux_lpi2c_target_unregister(const struct device * dev,struct i2c_target_config * target_config)456 static int mcux_lpi2c_target_unregister(const struct device *dev,
457 					struct i2c_target_config *target_config)
458 {
459 	struct mcux_lpi2c_data *data = dev->data;
460 	LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
461 
462 	if (!data->target_attached) {
463 		return -EINVAL;
464 	}
465 
466 	data->target_cfg = NULL;
467 	data->target_attached = false;
468 
469 	LPI2C_SlaveDeinit(base);
470 
471 	return 0;
472 }
473 #endif /* CONFIG_I2C_TARGET */
474 
mcux_lpi2c_isr(const struct device * dev)475 static void mcux_lpi2c_isr(const struct device *dev)
476 {
477 	struct mcux_lpi2c_data *data = dev->data;
478 	LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
479 
480  #ifdef CONFIG_I2C_TARGET
481 	if (data->target_attached) {
482 		mcux_lpi2c_slave_irq_handler(dev);
483 	}
484 #endif /* CONFIG_I2C_TARGET */
485 #if CONFIG_HAS_MCUX_FLEXCOMM
486 	LPI2C_MasterTransferHandleIRQ(LPI2C_GetInstance(base), &data->handle);
487 #else
488 	LPI2C_MasterTransferHandleIRQ(base, &data->handle);
489 #endif
490 }
491 
mcux_lpi2c_init(const struct device * dev)492 static int mcux_lpi2c_init(const struct device *dev)
493 {
494 	const struct mcux_lpi2c_config *config = dev->config;
495 	struct mcux_lpi2c_data *data = dev->data;
496 	LPI2C_Type *base;
497 	uint32_t clock_freq, bitrate_cfg;
498 	lpi2c_master_config_t master_config;
499 	int error;
500 
501 	DEVICE_MMIO_NAMED_MAP(dev, reg_base, K_MEM_CACHE_NONE | K_MEM_DIRECT_MAP);
502 
503 	base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
504 
505 	k_sem_init(&data->lock, 1, 1);
506 	k_sem_init(&data->device_sync_sem, 0, K_SEM_MAX_LIMIT);
507 
508 	if (!device_is_ready(config->clock_dev)) {
509 		LOG_ERR("clock control device not ready");
510 		return -ENODEV;
511 	}
512 
513 	error = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
514 	if (error) {
515 		return error;
516 	}
517 
518 	if (clock_control_get_rate(config->clock_dev, config->clock_subsys,
519 				   &clock_freq)) {
520 		return -EINVAL;
521 	}
522 
523 	LPI2C_MasterGetDefaultConfig(&master_config);
524 	master_config.busIdleTimeout_ns = config->bus_idle_timeout_ns;
525 	LPI2C_MasterInit(base, &master_config, clock_freq);
526 	LPI2C_MasterTransferCreateHandle(base, &data->handle,
527 					 mcux_lpi2c_master_transfer_callback,
528 					 data);
529 
530 	bitrate_cfg = i2c_map_dt_bitrate(config->bitrate);
531 
532 	error = mcux_lpi2c_configure(dev, I2C_MODE_CONTROLLER | bitrate_cfg);
533 	if (error) {
534 		return error;
535 	}
536 
537 	config->irq_config_func(dev);
538 
539 	return 0;
540 }
541 
542 static DEVICE_API(i2c, mcux_lpi2c_driver_api) = {
543 	.configure = mcux_lpi2c_configure,
544 	.transfer = mcux_lpi2c_transfer,
545 #if CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY
546 	.recover_bus = mcux_lpi2c_recover_bus,
547 #endif /* CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY */
548 #if CONFIG_I2C_TARGET
549 	.target_register = mcux_lpi2c_target_register,
550 	.target_unregister = mcux_lpi2c_target_unregister,
551 #endif /* CONFIG_I2C_TARGET */
552 };
553 
554 #if CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY
555 #define I2C_MCUX_LPI2C_SCL_INIT(n) .scl = GPIO_DT_SPEC_INST_GET_OR(n, scl_gpios, {0}),
556 #define I2C_MCUX_LPI2C_SDA_INIT(n) .sda = GPIO_DT_SPEC_INST_GET_OR(n, sda_gpios, {0}),
557 #else
558 #define I2C_MCUX_LPI2C_SCL_INIT(n)
559 #define I2C_MCUX_LPI2C_SDA_INIT(n)
560 #endif /* CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY */
561 
562 #define I2C_MCUX_LPI2C_MODULE_IRQ_CONNECT(n)				\
563 	do {								\
564 		IRQ_CONNECT(DT_INST_IRQN(n),				\
565 			DT_INST_IRQ(n, priority),			\
566 			mcux_lpi2c_isr,					\
567 			DEVICE_DT_INST_GET(n), 0);			\
568 		irq_enable(DT_INST_IRQN(n));				\
569 	} while (false)
570 
571 #define I2C_MCUX_LPI2C_MODULE_IRQ(n)					\
572 	IF_ENABLED(DT_INST_IRQ_HAS_IDX(n, 0),				\
573 		(I2C_MCUX_LPI2C_MODULE_IRQ_CONNECT(n)))
574 
575 /* When using LP Flexcomm driver, register the interrupt handler
576  * so we receive notification from the LP Flexcomm interrupt handler.
577  */
578 #define I2C_MCUX_LPI2C_LPFLEXCOMM_IRQ_FUNC(n)				\
579 	nxp_lp_flexcomm_setirqhandler(DEVICE_DT_GET(DT_INST_PARENT(n)), \
580 					DEVICE_DT_INST_GET(n),		\
581 					LP_FLEXCOMM_PERIPH_LPI2C,	\
582 					mcux_lpi2c_isr)
583 
584 #define I2C_MCUX_LPI2C_IRQ_SETUP_FUNC(n)				\
585 	COND_CODE_1(DT_NODE_HAS_COMPAT(DT_INST_PARENT(n),		\
586 					nxp_lp_flexcomm),		\
587 		    (I2C_MCUX_LPI2C_LPFLEXCOMM_IRQ_FUNC(n)),		\
588 		    (I2C_MCUX_LPI2C_MODULE_IRQ(n)))			\
589 
590 #define I2C_MCUX_LPI2C_INIT(n)						\
591 	PINCTRL_DT_INST_DEFINE(n);					\
592 									\
593 	static void mcux_lpi2c_config_func_##n(const struct device *dev)\
594 	{								\
595 		I2C_MCUX_LPI2C_IRQ_SETUP_FUNC(n);			\
596 	}								\
597 									\
598 	static const struct mcux_lpi2c_config mcux_lpi2c_config_##n = {	\
599 		DEVICE_MMIO_NAMED_ROM_INIT(reg_base, DT_DRV_INST(n)),	\
600 		.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)),	\
601 		.clock_subsys =						\
602 			(clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name),\
603 		.irq_config_func = mcux_lpi2c_config_func_##n,		\
604 		.bitrate = DT_INST_PROP(n, clock_frequency),		\
605 		.pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n),		\
606 		I2C_MCUX_LPI2C_SCL_INIT(n)				\
607 		I2C_MCUX_LPI2C_SDA_INIT(n)				\
608 		.bus_idle_timeout_ns =					\
609 			UTIL_AND(DT_INST_NODE_HAS_PROP(n, bus_idle_timeout),\
610 				 DT_INST_PROP(n, bus_idle_timeout)),	\
611 	};								\
612 									\
613 	static struct mcux_lpi2c_data mcux_lpi2c_data_##n;		\
614 									\
615 	I2C_DEVICE_DT_INST_DEFINE(n, mcux_lpi2c_init, NULL,		\
616 				&mcux_lpi2c_data_##n,			\
617 				&mcux_lpi2c_config_##n, POST_KERNEL,	\
618 				CONFIG_I2C_INIT_PRIORITY,		\
619 				&mcux_lpi2c_driver_api);
620 
621 DT_INST_FOREACH_STATUS_OKAY(I2C_MCUX_LPI2C_INIT)
622