1 /*
2  * Copyright (c) 2016 BayLibre, SAS
3  * Copyright (c) 2017 Linaro Ltd
4  *
5  * SPDX-License-Identifier: Apache-2.0
6  *
7  */
8 
9 #ifndef ZEPHYR_DRIVERS_I2C_I2C_LL_STM32_H_
10 #define ZEPHYR_DRIVERS_I2C_I2C_LL_STM32_H_
11 
12 #include <zephyr/drivers/i2c/stm32.h>
13 
14 #ifdef CONFIG_I2C_STM32_BUS_RECOVERY
15 #include <zephyr/drivers/gpio.h>
16 #endif /* CONFIG_I2C_STM32_BUS_RECOVERY */
17 
18 typedef void (*irq_config_func_t)(const struct device *port);
19 
20 #if DT_HAS_COMPAT_STATUS_OKAY(st_stm32_i2c_v2)
21 /**
22  * @brief structure to convey optional i2c timings settings
23  */
24 struct i2c_config_timing {
25 	/* i2c peripheral clock in Hz */
26 	uint32_t periph_clock;
27 	/* i2c bus speed in Hz */
28 	uint32_t i2c_speed;
29 	/* I2C_TIMINGR register value of i2c v2 peripheral */
30 	uint32_t timing_setting;
31 };
32 #endif
33 
34 struct i2c_stm32_config {
35 #ifdef CONFIG_I2C_STM32_INTERRUPT
36 	irq_config_func_t irq_config_func;
37 #endif
38 #ifdef CONFIG_I2C_STM32_BUS_RECOVERY
39 	struct gpio_dt_spec scl;
40 	struct gpio_dt_spec sda;
41 #endif /* CONFIG_I2C_STM32_BUS_RECOVERY */
42 	const struct stm32_pclken *pclken;
43 	size_t pclk_len;
44 	I2C_TypeDef *i2c;
45 	uint32_t bitrate;
46 	const struct pinctrl_dev_config *pcfg;
47 #if DT_HAS_COMPAT_STATUS_OKAY(st_stm32_i2c_v2)
48 	const struct i2c_config_timing *timings;
49 	size_t n_timings;
50 #endif
51 };
52 
53 struct i2c_stm32_data {
54 #ifdef CONFIG_I2C_STM32_INTERRUPT
55 	struct k_sem device_sync_sem;
56 #endif
57 	struct k_sem bus_mutex;
58 	uint32_t dev_config;
59 #if DT_HAS_COMPAT_STATUS_OKAY(st_stm32_i2c_v2)
60 	/* Store the current timing structure set by runtime config */
61 	struct i2c_config_timing current_timing;
62 #endif
63 #ifdef CONFIG_I2C_STM32_V1
64 	uint16_t slave_address;
65 #endif
66 	struct {
67 #ifdef CONFIG_I2C_STM32_V1
68 		unsigned int is_restart;
69 		unsigned int flags;
70 #endif
71 		unsigned int is_write;
72 		unsigned int is_arlo;
73 		unsigned int is_nack;
74 		unsigned int is_err;
75 		struct i2c_msg *msg;
76 		unsigned int len;
77 		uint8_t *buf;
78 	} current;
79 #ifdef CONFIG_I2C_TARGET
80 	bool master_active;
81 	struct i2c_target_config *slave_cfg;
82 #ifdef CONFIG_I2C_STM32_V2
83 	struct i2c_target_config *slave2_cfg;
84 #endif
85 	bool slave_attached;
86 #endif
87 	bool is_configured;
88 	bool smbalert_active;
89 	enum i2c_stm32_mode mode;
90 #ifdef CONFIG_SMBUS_STM32_SMBALERT
91 	i2c_stm32_smbalert_cb_func_t smbalert_cb_func;
92 	const struct device *smbalert_cb_dev;
93 #endif
94 };
95 
96 int32_t stm32_i2c_transaction(const struct device *dev,
97 			    struct i2c_msg msg, uint8_t *next_msg_flags,
98 			    uint16_t periph);
99 int32_t stm32_i2c_configure_timing(const struct device *dev, uint32_t clk);
100 int i2c_stm32_runtime_configure(const struct device *dev, uint32_t config);
101 int i2c_stm32_get_config(const struct device *dev, uint32_t *config);
102 
103 void stm32_i2c_event_isr(void *arg);
104 void stm32_i2c_error_isr(void *arg);
105 #ifdef CONFIG_I2C_STM32_COMBINED_INTERRUPT
106 void stm32_i2c_combined_isr(void *arg);
107 #endif
108 
109 #ifdef CONFIG_I2C_TARGET
110 int i2c_stm32_target_register(const struct device *dev, struct i2c_target_config *config);
111 int i2c_stm32_target_unregister(const struct device *dev, struct i2c_target_config *config);
112 #endif
113 
114 #endif	/* ZEPHYR_DRIVERS_I2C_I2C_LL_STM32_H_ */
115