1 /* 2 * Copyright (c) 2018 Alexander Wachter 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #include <soc.h> 8 #include <zephyr/drivers/hwinfo.h> 9 #include <string.h> 10 #include <hal/nrf_ficr.h> 11 #include <zephyr/sys/byteorder.h> 12 #ifndef CONFIG_BOARD_QEMU_CORTEX_M0 13 #include <helpers/nrfx_reset_reason.h> 14 #endif 15 #include <soc_secure.h> 16 struct nrf_uid { 17 uint32_t id[2]; 18 }; 19 z_impl_hwinfo_get_device_id(uint8_t * buffer,size_t length)20ssize_t z_impl_hwinfo_get_device_id(uint8_t *buffer, size_t length) 21 { 22 struct nrf_uid dev_id; 23 uint32_t deviceid[2]; 24 25 soc_secure_read_deviceid(deviceid); 26 27 dev_id.id[0] = sys_cpu_to_be32(deviceid[1]); 28 dev_id.id[1] = sys_cpu_to_be32(deviceid[0]); 29 30 if (length > sizeof(dev_id.id)) { 31 length = sizeof(dev_id.id); 32 } 33 34 memcpy(buffer, dev_id.id, length); 35 36 return length; 37 } 38 39 #ifndef CONFIG_BOARD_QEMU_CORTEX_M0 z_impl_hwinfo_get_reset_cause(uint32_t * cause)40int z_impl_hwinfo_get_reset_cause(uint32_t *cause) 41 { 42 uint32_t flags = 0; 43 44 uint32_t reason = nrfx_reset_reason_get(); 45 46 if (reason & NRFX_RESET_REASON_RESETPIN_MASK) { 47 flags |= RESET_PIN; 48 } 49 if (reason & NRFX_RESET_REASON_DOG_MASK) { 50 flags |= RESET_WATCHDOG; 51 } 52 if (reason & NRFX_RESET_REASON_LOCKUP_MASK) { 53 flags |= RESET_CPU_LOCKUP; 54 } 55 if (reason & NRFX_RESET_REASON_OFF_MASK) { 56 flags |= RESET_LOW_POWER_WAKE; 57 } 58 if (reason & NRFX_RESET_REASON_DIF_MASK) { 59 flags |= RESET_DEBUG; 60 } 61 62 #if !NRF_POWER_HAS_RESETREAS 63 if (reason & NRFX_RESET_REASON_CTRLAP_MASK) { 64 flags |= RESET_DEBUG; 65 } 66 if (reason & NRFX_RESET_REASON_DOG0_MASK) { 67 flags |= RESET_WATCHDOG; 68 } 69 if (reason & NRFX_RESET_REASON_DOG1_MASK) { 70 flags |= RESET_WATCHDOG; 71 } 72 if (reason & NRFX_RESETREAS_SREQ_MASK) { 73 flags |= RESET_SOFTWARE; 74 } 75 76 #if NRF_RESET_HAS_NETWORK 77 if (reason & NRFX_RESET_REASON_LSREQ_MASK) { 78 flags |= RESET_SOFTWARE; 79 } 80 if (reason & NRFX_RESET_REASON_LLOCKUP_MASK) { 81 flags |= RESET_CPU_LOCKUP; 82 } 83 if (reason & NRFX_RESET_REASON_LDOG_MASK) { 84 flags |= RESET_WATCHDOG; 85 } 86 if (reason & NRFX_RESET_REASON_LCTRLAP_MASK) { 87 flags |= RESET_DEBUG; 88 } 89 #endif 90 91 #else 92 if (reason & NRFX_RESET_REASON_SREQ_MASK) { 93 flags |= RESET_SOFTWARE; 94 } 95 #endif 96 97 *cause = flags; 98 99 return 0; 100 } 101 z_impl_hwinfo_clear_reset_cause(void)102int z_impl_hwinfo_clear_reset_cause(void) 103 { 104 uint32_t reason = -1; 105 106 nrfx_reset_reason_clear(reason); 107 108 return 0; 109 } 110 z_impl_hwinfo_get_supported_reset_cause(uint32_t * supported)111int z_impl_hwinfo_get_supported_reset_cause(uint32_t *supported) 112 { 113 *supported = (RESET_PIN 114 | RESET_WATCHDOG 115 | RESET_SOFTWARE 116 | RESET_CPU_LOCKUP 117 | RESET_LOW_POWER_WAKE 118 | RESET_DEBUG); 119 120 return 0; 121 } 122 #endif 123