1 /** 2 * \file 3 * 4 * \brief SPI related functionality declaration. 5 * 6 * Copyright (C) 2014 Atmel Corporation. All rights reserved. 7 * 8 * \asf_license_start 9 * 10 * \page License 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions are met: 14 * 15 * 1. Redistributions of source code must retain the above copyright notice, 16 * this list of conditions and the following disclaimer. 17 * 18 * 2. Redistributions in binary form must reproduce the above copyright notice, 19 * this list of conditions and the following disclaimer in the documentation 20 * and/or other materials provided with the distribution. 21 * 22 * 3. The name of Atmel may not be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * 4. This software may only be redistributed and used in connection with an 26 * Atmel microcontroller product. 27 * 28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 * 40 * \asf_license_stop 41 * 42 */ 43 44 #ifndef _HAL_SPI_M_SYNC_H_INCLUDED 45 #define _HAL_SPI_M_SYNC_H_INCLUDED 46 47 #include <hal_io.h> 48 #include <hpl_spi_m_sync.h> 49 50 /** 51 * \addtogroup doc_driver_hal_spi_master_sync 52 * 53 * @{ 54 */ 55 56 #ifdef __cplusplus 57 extern "C" { 58 #endif 59 60 /** \brief SPI HAL driver struct for polling mode 61 * 62 */ 63 struct spi_m_sync_descriptor { 64 /** SPI device instance */ 65 struct _spi_sync_dev dev; 66 /** I/O read/write */ 67 struct io_descriptor io; 68 /** Flags for HAL driver */ 69 uint16_t flags; 70 }; 71 72 /** \brief Initialize SPI HAL instance and hardware for polling mode 73 * 74 * Initialize SPI HAL with polling mode. 75 * 76 * \param[in] spi Pointer to the HAL SPI instance. 77 * \param[in] hw Pointer to the hardware base. 78 * 79 * \return Operation status. 80 * \retval ERR_NONE Success. 81 * \retval ERR_INVALID_DATA Error, initialized. 82 */ 83 int32_t spi_m_sync_init(struct spi_m_sync_descriptor *spi, void *const hw); 84 85 /** \brief Deinitialize the SPI HAL instance and hardware 86 * 87 * Abort transfer, disable and reset SPI, deinit software. 88 * 89 * \param[in] spi Pointer to the HAL SPI instance. 90 * 91 * \return Operation status. 92 * \retval ERR_NONE Success. 93 * \retval <0 Error code. 94 */ 95 void spi_m_sync_deinit(struct spi_m_sync_descriptor *spi); 96 97 /** \brief Enable SPI 98 * 99 * \param[in] spi Pointer to the HAL SPI instance. 100 * 101 * \return Operation status. 102 * \retval ERR_NONE Success. 103 * \retval <0 Error code. 104 */ 105 void spi_m_sync_enable(struct spi_m_sync_descriptor *spi); 106 107 /** \brief Disable SPI 108 * 109 * \param[in] spi Pointer to the HAL SPI instance. 110 * 111 * \return Operation status. 112 * \retval ERR_NONE Success. 113 * \retval <0 Error code. 114 */ 115 void spi_m_sync_disable(struct spi_m_sync_descriptor *spi); 116 117 /** \brief Set SPI baudrate 118 * 119 * Works if SPI is initialized as master, it sets the baudrate. 120 * 121 * \param[in] spi Pointer to the HAL SPI instance. 122 * \param[in] baud_val The target baudrate value 123 * (see "baudrate calculation" for calculating the value). 124 * 125 * \return Operation status. 126 * \retval ERR_NONE Success. 127 * \retval ERR_BUSY Busy 128 * \retval ERR_INVALID_ARG The baudrate is not supported. 129 */ 130 int32_t spi_m_sync_set_baudrate(struct spi_m_sync_descriptor *spi, const uint32_t baud_val); 131 132 /** \brief Set SPI mode 133 * 134 * Set the SPI transfer mode (\ref spi_transfer_mode), 135 * which controls the clock polarity and clock phase: 136 * - Mode 0: leading edge is rising edge, data sample on leading edge. 137 * - Mode 1: leading edge is rising edge, data sample on trailing edge. 138 * - Mode 2: leading edge is falling edge, data sample on leading edge. 139 * - Mode 3: leading edge is falling edge, data sample on trailing edge. 140 * 141 * \param[in] spi Pointer to the HAL SPI instance. 142 * \param[in] mode The mode (0~3). 143 * 144 * \return Operation status. 145 * \retval ERR_NONE Success. 146 * \retval ERR_BUSY Busy 147 * \retval ERR_INVALID_ARG The mode is not supported. 148 */ 149 int32_t spi_m_sync_set_mode(struct spi_m_sync_descriptor *spi, const enum spi_transfer_mode mode); 150 151 /** \brief Set SPI transfer character size in number of bits 152 * 153 * The character size (\ref spi_char_size) influence the way the data is 154 * sent/received. 155 * For char size <= 8-bit, data is stored byte by byte. 156 * For char size between 9-bit ~ 16-bit, data is stored in 2-byte length. 157 * Note that the default and recommended char size is 8-bit since it's 158 * supported by all system. 159 * 160 * \param[in] spi Pointer to the HAL SPI instance. 161 * \param[in] char_size The char size (~16, recommended 8). 162 * 163 * \return Operation status. 164 * \retval ERR_NONE Success. 165 * \retval ERR_BUSY Busy 166 * \retval ERR_INVALID_ARG The char size is not supported. 167 */ 168 int32_t spi_m_sync_set_char_size(struct spi_m_sync_descriptor *spi, const enum spi_char_size char_size); 169 170 /** \brief Set SPI transfer data order 171 * 172 * \param[in] spi Pointer to the HAL SPI instance. 173 * \param[in] dord The data order: send LSB/MSB first. 174 * 175 * \return Operation status. 176 * \retval ERR_NONE Success. 177 * \retval ERR_BUSY Busy 178 * \retval ERR_INVALID_ARG The data order is not supported. 179 */ 180 int32_t spi_m_sync_set_data_order(struct spi_m_sync_descriptor *spi, const enum spi_data_order dord); 181 182 /** \brief Perform the SPI data transfer (TX and RX) in polling way 183 * 184 * Activate CS, do TX and RX and deactivate CS. It blocks. 185 * 186 * \param[in, out] spi Pointer to the HAL SPI instance. 187 * \param[in] xfer Pointer to the transfer information (\ref spi_xfer). 188 * 189 * \retval size Success. 190 * \retval >=0 Timeout, with number of characters transferred. 191 * \retval ERR_BUSY SPI is busy 192 */ 193 int32_t spi_m_sync_transfer(struct spi_m_sync_descriptor *spi, const struct spi_xfer *xfer); 194 195 /** 196 * \brief Return the I/O descriptor for this SPI instance 197 * 198 * This function will return an I/O instance for this SPI driver instance. 199 * 200 * \param[in] spi An SPI master descriptor, which is used to communicate through 201 * SPI 202 * \param[in, out] io A pointer to an I/O descriptor pointer type 203 * 204 * \retval ERR_NONE 205 */ 206 int32_t spi_m_sync_get_io_descriptor(struct spi_m_sync_descriptor *const spi, struct io_descriptor **io); 207 208 /** \brief Retrieve the current driver version 209 * 210 * \return Current driver version. 211 */ 212 uint32_t spi_m_sync_get_version(void); 213 214 /**@}*/ 215 216 #ifdef __cplusplus 217 } 218 #endif 219 220 #endif /* ifndef _HAL_SPI_M_SYNC_H_INCLUDED */ 221
