1 /*
2  * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #pragma once
8 
9 #include <stdint.h>
10 #include <stdbool.h>
11 
12 #include "esp_err.h"
13 
14 #include "soc/soc_caps.h"
15 #include "hal/cpu_types.h"
16 #include "hal/cpu_ll.h"
17 
18 #ifdef __cplusplus
19 extern "C" {
20 #endif
21 
22 /**
23  * Return the ID of the core currently executing this code.
24  *
25  * @return core id [0..SOC_CPU_CORES_NUM - 1]
26  */
27 #define cpu_hal_get_core_id()           cpu_ll_get_core_id()
28 
29 /**
30  * Get the current value of the stack pointer.
31  *
32  * @return the current stack pointer
33  */
34 #define cpu_hal_get_sp()                cpu_ll_get_sp()
35 
36 /**
37  * Get the current value of the internal counter that increments
38  * every processor-clock cycle.
39  *
40  * @return cycle count; returns 0 if not supported
41  */
42 #define cpu_hal_get_cycle_count()       cpu_ll_get_cycle_count()
43 
44 /**
45  * Set the given value into the internal counter that increments
46  * every processor-clock cycle.
47  */
48 #define cpu_hal_set_cycle_count(val)       cpu_ll_set_cycle_count(val)
49 
50 /**
51  * Check if some form of debugger is attached to CPU.
52  *
53  * @return true debugger is attached
54  * @return false no debugger is attached/ no support for debuggers
55  */
56 #define cpu_hal_is_debugger_attached()  cpu_ll_is_debugger_attached()
57 
58 /**
59  * Init HW loop status.
60  */
61 #define cpu_hal_init_hwloop()           cpu_ll_init_hwloop()
62 
63 /**
64  * Trigger a call to debugger.
65  */
66 #define cpu_hal_break()                 cpu_ll_break()
67 
68 /**
69  * Wait for interrupt.
70  */
71 #define cpu_hal_waiti()                 cpu_ll_waiti()
72 
73 /**
74  * Trigger a syscall.
75  */
76 #define cpu_hal_syscall(sys_nr, arg1, arg2, arg3, arg4, ret_errno)                 cpu_ll_syscall(sys_nr, arg1, arg2, arg3, arg4, ret_errno)
77 
78 #if SOC_CPU_BREAKPOINTS_NUM > 0
79 
80 /**
81  * Set and enable breakpoint at an instruction address.
82  *
83  * @note Overwrites previously set breakpoint with same breakpoint ID.
84  *
85  * @param id breakpoint to set [0..SOC_CPU_BREAKPOINTS_NUM - 1]
86  * @param addr address to set a breakpoint on
87  */
88 void cpu_hal_set_breakpoint(int id, const void* addr);
89 
90 /**
91  * Clear and disable breakpoint.
92  *
93  * @param id breakpoint to clear [0..SOC_CPU_BREAKPOINTS_NUM - 1]
94  */
95 void cpu_hal_clear_breakpoint(int id);
96 
97 #endif // SOC_CPU_BREAKPOINTS_NUM > 0
98 
99 #if SOC_CPU_WATCHPOINTS_NUM > 0
100 
101 /**
102  * Set and enable a watchpoint, specifying the memory range and trigger operation.
103  *
104  * @param id watchpoint to set [0..SOC_CPU_WATCHPOINTS_NUM - 1]
105  * @param addr starting address
106  * @param size number of bytes from starting address to watch
107  * @param trigger operation on specified memory range that triggers the watchpoint (read, write, read/write)
108  */
109 void cpu_hal_set_watchpoint(int id, const void* addr, size_t size, watchpoint_trigger_t trigger);
110 
111 /**
112  * Clear and disable watchpoint.
113  *
114  * @param id watchpoint to clear [0..SOC_CPU_WATCHPOINTS_NUM - 1]
115  */
116 void cpu_hal_clear_watchpoint(int id);
117 
118 #endif // SOC_CPU_WATCHPOINTS_NUM > 0
119 
120 /**
121  * Set exception vector table base address.
122  *
123  * @param base address to move the exception vector table to
124  */
125 void cpu_hal_set_vecbase(const void* base);
126 
127 #ifdef __cplusplus
128 }
129 #endif
130