1 /*
2 * Copyright (c) 2023 Nuvoton Technology Corporation.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #define DT_DRV_COMPAT nuvoton_numaker_gpio
8
9 #include <zephyr/kernel.h>
10 #include <zephyr/device.h>
11 #include <zephyr/drivers/gpio.h>
12 #include <zephyr/drivers/clock_control.h>
13 #include <zephyr/drivers/clock_control/clock_control_numaker.h>
14 #include <zephyr/drivers/gpio/gpio_utils.h>
15 #include <zephyr/logging/log.h>
16 #include <NuMicro.h>
17
18 #define NU_MFP_POS(pinindex) ((pinindex % 4) * 8)
19
20 LOG_MODULE_REGISTER(gpio_numaker, LOG_LEVEL_ERR);
21
22 struct gpio_numaker_config {
23 struct gpio_driver_config common;
24 uint32_t reg;
25 uint32_t gpa_base;
26 uint32_t size;
27 uint32_t clk_modidx;
28 const struct device *clk_dev;
29 };
30
31 struct gpio_numaker_data {
32 struct gpio_driver_data common;
33 sys_slist_t callbacks;
34 };
35
gpio_numaker_configure(const struct device * dev,gpio_pin_t pin,gpio_flags_t flags)36 static int gpio_numaker_configure(const struct device *dev, gpio_pin_t pin, gpio_flags_t flags)
37 {
38 const struct gpio_numaker_config *config = dev->config;
39 struct gpio_numaker_data *data = dev->data;
40 GPIO_T *gpio_base = (GPIO_T *)config->reg;
41 uint32_t pinMfpMask = (0x1f << NU_MFP_POS(pin));
42 uint32_t pinMask = BIT(pin); /* mask for pin index --> (0x01 << pin) */
43 uint32_t port_index;
44 uint32_t *GPx_MFPx;
45 uint32_t pinMfpGpio;
46 int err = 0;
47
48 ARG_UNUSED(data);
49
50 /* Check for an invalid pin number */
51 if (pin > 15) {
52 return -EINVAL;
53 }
54
55 /* Configure GPIO direction */
56 switch (flags & GPIO_DIR_MASK) {
57 case GPIO_INPUT:
58 GPIO_SetMode(gpio_base, pinMask, GPIO_MODE_INPUT);
59 break;
60 case GPIO_OUTPUT:
61 GPIO_SetMode(gpio_base, pinMask, GPIO_MODE_OUTPUT);
62 break;
63 case (GPIO_INPUT | GPIO_OUTPUT):
64 GPIO_SetMode(gpio_base, pinMask, GPIO_MODE_QUASI);
65 break;
66 default:
67 err = -ENOTSUP;
68 goto move_exit;
69 }
70
71 if (flags & GPIO_LINE_OPEN_DRAIN) {
72 GPIO_SetMode(gpio_base, pinMask, GPIO_MODE_OPEN_DRAIN);
73 }
74
75 /* Set Multi-function, default is GPIO */
76 port_index = (config->reg - config->gpa_base) / config->size;
77 GPx_MFPx = ((uint32_t *)&SYS->GPA_MFP0) + port_index * 4 + (pin / 4);
78 pinMfpGpio = 0x00UL;
79 /*
80 * E.g.: SYS->GPA_MFP0 = (SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA0MFP_Msk) ) |
81 * SYS_GPA_MFP0_PA0MFP_GPIO;
82 */
83 *GPx_MFPx = (*GPx_MFPx & (~pinMfpMask)) | pinMfpGpio;
84
85 /* Set pull control as pull-up, pull-down or pull-disable */
86 if ((flags & GPIO_PULL_UP) != 0) {
87 GPIO_SetPullCtl(gpio_base, pinMask, GPIO_PUSEL_PULL_UP);
88 } else if ((flags & GPIO_PULL_DOWN) != 0) {
89 GPIO_SetPullCtl(gpio_base, pinMask, GPIO_PUSEL_PULL_DOWN);
90 } else {
91 GPIO_SetPullCtl(gpio_base, pinMask, GPIO_PUSEL_DISABLE);
92 }
93
94 /* Set Init Level 0:low 1:high */
95 if ((flags & GPIO_OUTPUT_INIT_HIGH) != 0) {
96 gpio_base->DOUT |= pinMask;
97 } else if ((flags & GPIO_OUTPUT_INIT_LOW) != 0) {
98 gpio_base->DOUT &= ~pinMask;
99 }
100
101 move_exit:
102 return err;
103 }
104
gpio_numaker_port_get_raw(const struct device * dev,uint32_t * value)105 static int gpio_numaker_port_get_raw(const struct device *dev, uint32_t *value)
106 {
107 const struct gpio_numaker_config *config = dev->config;
108 GPIO_T *gpio_base = (GPIO_T *)config->reg;
109
110 /* Get raw bits of GPIO PIN data */
111 *value = gpio_base->PIN;
112
113 return 0;
114 }
115
gpio_numaker_port_set_masked_raw(const struct device * dev,uint32_t mask,uint32_t value)116 static int gpio_numaker_port_set_masked_raw(const struct device *dev, uint32_t mask, uint32_t value)
117 {
118 const struct gpio_numaker_config *config = dev->config;
119 GPIO_T *gpio_base = (GPIO_T *)config->reg;
120
121 gpio_base->DOUT = (gpio_base->DOUT & ~mask) | (mask & value);
122
123 return 0;
124 }
125
gpio_numaker_port_set_bits_raw(const struct device * dev,uint32_t mask)126 static int gpio_numaker_port_set_bits_raw(const struct device *dev, uint32_t mask)
127 {
128 const struct gpio_numaker_config *config = dev->config;
129 GPIO_T *gpio_base = (GPIO_T *)config->reg;
130
131 /* Set raw bits of GPIO output data */
132 gpio_base->DOUT |= mask;
133
134 return 0;
135 }
136
gpio_numaker_port_clear_bits_raw(const struct device * dev,gpio_port_pins_t mask)137 static int gpio_numaker_port_clear_bits_raw(const struct device *dev, gpio_port_pins_t mask)
138 {
139 const struct gpio_numaker_config *config = dev->config;
140 GPIO_T *gpio_base = (GPIO_T *)config->reg;
141
142 /* Clear raw bits of GPIO data */
143 gpio_base->DOUT &= ~mask;
144
145 return 0;
146 }
147
gpio_numaker_port_toggle_bits(const struct device * dev,gpio_port_pins_t mask)148 static int gpio_numaker_port_toggle_bits(const struct device *dev, gpio_port_pins_t mask)
149 {
150 const struct gpio_numaker_config *config = dev->config;
151 GPIO_T *gpio_base = (GPIO_T *)config->reg;
152
153 /* Toggle raw bits of GPIO data */
154 gpio_base->DOUT ^= mask;
155
156 return 0;
157 }
158
gpio_numaker_pin_interrupt_configure(const struct device * dev,gpio_pin_t pin,enum gpio_int_mode mode,enum gpio_int_trig trig)159 static int gpio_numaker_pin_interrupt_configure(const struct device *dev, gpio_pin_t pin,
160 enum gpio_int_mode mode, enum gpio_int_trig trig)
161 {
162 const struct gpio_numaker_config *config = dev->config;
163 GPIO_T *gpio_base = (GPIO_T *)config->reg;
164 uint32_t intAttr;
165
166 if (mode == GPIO_INT_MODE_DISABLED) {
167 GPIO_DisableInt(gpio_base, pin);
168 /* Clear the port int status */
169 gpio_base->INTSRC &= BIT(pin);
170 } else {
171 switch (trig) {
172 case GPIO_INT_TRIG_LOW:
173 intAttr = ((mode == GPIO_INT_MODE_EDGE) ? GPIO_INT_FALLING : GPIO_INT_LOW);
174 break;
175 case GPIO_INT_TRIG_HIGH:
176 intAttr = ((mode == GPIO_INT_MODE_EDGE) ? GPIO_INT_RISING : GPIO_INT_HIGH);
177 break;
178 case GPIO_INT_TRIG_BOTH:
179 if (mode != GPIO_INT_MODE_EDGE) {
180 return -ENOTSUP;
181 }
182 intAttr = GPIO_INT_BOTH_EDGE;
183 break;
184 default:
185 return -ENOTSUP;
186 }
187 GPIO_EnableInt(gpio_base, pin, intAttr);
188 }
189
190 return 0;
191 }
192
gpio_numaker_manage_callback(const struct device * dev,struct gpio_callback * callback,bool set)193 static int gpio_numaker_manage_callback(const struct device *dev, struct gpio_callback *callback,
194 bool set)
195 {
196 struct gpio_numaker_data *data = dev->data;
197
198 return gpio_manage_callback(&data->callbacks, callback, set);
199 }
200
201 static DEVICE_API(gpio, gpio_numaker_api) = {
202 .pin_configure = gpio_numaker_configure,
203 .port_get_raw = gpio_numaker_port_get_raw,
204 .port_set_masked_raw = gpio_numaker_port_set_masked_raw,
205 .port_set_bits_raw = gpio_numaker_port_set_bits_raw,
206 .port_clear_bits_raw = gpio_numaker_port_clear_bits_raw,
207 .port_toggle_bits = gpio_numaker_port_toggle_bits,
208 .pin_interrupt_configure = gpio_numaker_pin_interrupt_configure,
209 .manage_callback = gpio_numaker_manage_callback};
210
gpio_numaker_isr(const struct device * dev)211 static void gpio_numaker_isr(const struct device *dev)
212 {
213 const struct gpio_numaker_config *config = dev->config;
214 struct gpio_numaker_data *data = dev->data;
215 GPIO_T *gpio_base = (GPIO_T *)config->reg;
216 uint32_t int_status;
217
218 /* Get the int status */
219 int_status = gpio_base->INTSRC;
220
221 /* Clear the port int status */
222 gpio_base->INTSRC = int_status;
223
224 gpio_fire_callbacks(&data->callbacks, dev, int_status);
225 }
226
227 #define CLOCK_CTRL_INIT(n) .clk_dev = DEVICE_DT_GET(DT_PARENT(DT_INST_CLOCKS_CTLR(n))),
228
229 #define GPIO_NUMAKER_IRQ_INIT(n) \
230 do { \
231 IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), gpio_numaker_isr, \
232 DEVICE_DT_INST_GET(n), 0); \
233 \
234 irq_enable(DT_INST_IRQN(n)); \
235 } while (0)
236
237 #define GPIO_NUMAKER_DEFINE(n) \
238 static const struct gpio_numaker_config gpio_numaker_config##n = { \
239 .common = { \
240 .port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(n), \
241 }, \
242 .reg = DT_INST_REG_ADDR(n), \
243 .gpa_base = DT_REG_ADDR(DT_NODELABEL(gpioa)), \
244 .size = DT_REG_SIZE(DT_NODELABEL(gpioa)), \
245 .clk_modidx = DT_INST_CLOCKS_CELL(n, clock_module_index), \
246 CLOCK_CTRL_INIT(n)}; \
247 \
248 static struct gpio_numaker_data gpio_numaker_data##n; \
249 \
250 static int gpio_numaker_init##n(const struct device *dev) \
251 { \
252 const struct gpio_numaker_config *config = dev->config; \
253 struct numaker_scc_subsys scc_subsys; \
254 int err; \
255 \
256 SYS_UnlockReg(); \
257 memset(&scc_subsys, 0x00, sizeof(scc_subsys)); \
258 scc_subsys.subsys_id = NUMAKER_SCC_SUBSYS_ID_PCC; \
259 scc_subsys.pcc.clk_modidx = config->clk_modidx; \
260 err = clock_control_on(config->clk_dev, (clock_control_subsys_t)&scc_subsys); \
261 if (err == 0) { \
262 IF_ENABLED(DT_INST_IRQ_HAS_IDX(n, 0), (GPIO_NUMAKER_IRQ_INIT(n);)) \
263 } \
264 \
265 SYS_LockReg(); \
266 return err; \
267 } \
268 DEVICE_DT_INST_DEFINE(n, gpio_numaker_init##n, NULL, &gpio_numaker_data##n, \
269 &gpio_numaker_config##n, PRE_KERNEL_1, CONFIG_GPIO_INIT_PRIORITY, \
270 &gpio_numaker_api);
271
272 DT_INST_FOREACH_STATUS_OKAY(GPIO_NUMAKER_DEFINE)
273
