1 /*
2 *
3 * Copyright (c) 2021 metraTec GmbH
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8 /**
9 * @file Driver for MPC23xxx I2C/SPI-based GPIO driver.
10 */
11
12 #include <errno.h>
13 #include <zephyr/kernel.h>
14 #include <zephyr/device.h>
15 #include <zephyr/sys/byteorder.h>
16 #include <zephyr/sys/util.h>
17 #include <zephyr/drivers/gpio.h>
18
19 #include <zephyr/drivers/gpio/gpio_utils.h>
20 #include "gpio_mcp23xxx.h"
21
22 #define LOG_LEVEL CONFIG_GPIO_LOG_LEVEL
23 #include <zephyr/logging/log.h>
24 LOG_MODULE_REGISTER(gpio_mcp23xxx);
25
26 #define MCP23XXX_RESET_TIME_US 1
27
28 /**
29 * @brief Reads given register from mcp23xxx.
30 *
31 * The registers of the mcp23x0x consist of one 8 bit port.
32 * The registers of the mcp23x1x consist of two 8 bit ports.
33 *
34 * @param dev The mcp23xxx device.
35 * @param reg The register to be read.
36 * @param buf The buffer to read data to.
37 * @return 0 if successful.
38 * Otherwise <0 will be returned.
39 */
read_port_regs(const struct device * dev,uint8_t reg,uint16_t * buf)40 static int read_port_regs(const struct device *dev, uint8_t reg, uint16_t *buf)
41 {
42 const struct mcp23xxx_config *config = dev->config;
43
44 if (config->ngpios == 16U) {
45 reg *= 2;
46 }
47
48 return config->read_fn(dev, reg, buf);
49 }
50
51 /**
52 * @brief Writes registers of the mcp23xxx.
53 *
54 * On the mcp23x08 one 8 bit port will be written.
55 * On the mcp23x17 two 8 bit ports will be written.
56 *
57 * @param dev The mcp23xxx device.
58 * @param reg Register to be written.
59 * @param buf The new register value.
60 *
61 * @return 0 if successful. Otherwise <0 will be returned.
62 */
write_port_regs(const struct device * dev,uint8_t reg,uint16_t value)63 static int write_port_regs(const struct device *dev, uint8_t reg, uint16_t value)
64 {
65 const struct mcp23xxx_config *config = dev->config;
66
67 if (config->ngpios == 16U) {
68 reg *= 2;
69 }
70
71 return config->write_fn(dev, reg, value);
72 }
73
74 /**
75 * @brief Writes to the IOCON register of the mcp23xxx.
76 *
77 * IOCON is the only register that is not 16 bits wide on 16-pin devices; instead, it is mirrored in
78 * two adjacent memory locations. Because the underlying `write_fn` always does a 16-bit write for
79 * 16-pin devices, make sure we write the same value to both IOCON locations.
80 *
81 * @param dev The mcp23xxx device.
82 * @param value the IOCON value to write
83 *
84 * @return 0 if successful. Otherwise <0 will be returned.
85 */
write_iocon(const struct device * dev,uint8_t value)86 static int write_iocon(const struct device *dev, uint8_t value)
87 {
88 struct mcp23xxx_drv_data *drv_data = dev->data;
89
90 uint16_t extended_value = value | (value << 8);
91 int ret = write_port_regs(dev, REG_IOCON, extended_value);
92
93 if (ret == 0) {
94 drv_data->reg_cache.iocon = extended_value;
95 }
96
97 return ret;
98 }
99
100 /**
101 * @brief Setup the pin direction.
102 *
103 * @param dev The mcp23xxx device.
104 * @param pin The pin number.
105 * @param flags Flags of pin or port.
106 * @return 0 if successful. Otherwise <0 will be returned.
107 */
setup_pin_dir(const struct device * dev,uint32_t pin,int flags)108 static int setup_pin_dir(const struct device *dev, uint32_t pin, int flags)
109 {
110 struct mcp23xxx_drv_data *drv_data = dev->data;
111 uint16_t dir = drv_data->reg_cache.iodir;
112 uint16_t output = drv_data->reg_cache.gpio;
113 int ret;
114
115 if ((flags & GPIO_OUTPUT) != 0U) {
116 if ((flags & GPIO_OUTPUT_INIT_HIGH) != 0U) {
117 output |= BIT(pin);
118 } else if ((flags & GPIO_OUTPUT_INIT_LOW) != 0U) {
119 output &= ~BIT(pin);
120 }
121 dir &= ~BIT(pin);
122 } else {
123 dir |= BIT(pin);
124 }
125
126 ret = write_port_regs(dev, REG_GPIO, output);
127 if (ret != 0) {
128 return ret;
129 }
130
131 drv_data->reg_cache.gpio = output;
132
133 ret = write_port_regs(dev, REG_IODIR, dir);
134 if (ret == 0) {
135 drv_data->reg_cache.iodir = dir;
136 }
137
138 return ret;
139 }
140
141 /**
142 * @brief Setup pin pull up/pull down.
143 *
144 * @param dev The mcp23xxx device.
145 * @param pin The pin number.
146 * @param flags Flags of pin or port.
147 * @return 0 if successful. Otherwise <0 will be returned.
148 */
setup_pin_pull(const struct device * dev,uint32_t pin,int flags)149 static int setup_pin_pull(const struct device *dev, uint32_t pin, int flags)
150 {
151 struct mcp23xxx_drv_data *drv_data = dev->data;
152 uint16_t port;
153 int ret;
154
155 port = drv_data->reg_cache.gppu;
156
157 if ((flags & GPIO_PULL_DOWN) != 0U) {
158 return -ENOTSUP;
159 }
160
161 WRITE_BIT(port, pin, (flags & GPIO_PULL_UP) != 0);
162
163 ret = write_port_regs(dev, REG_GPPU, port);
164 if (ret == 0) {
165 drv_data->reg_cache.gppu = port;
166 }
167
168 return ret;
169 }
170
mcp23xxx_pin_cfg(const struct device * dev,gpio_pin_t pin,gpio_flags_t flags)171 static int mcp23xxx_pin_cfg(const struct device *dev, gpio_pin_t pin, gpio_flags_t flags)
172 {
173 struct mcp23xxx_drv_data *drv_data = dev->data;
174 int ret;
175
176 if (k_is_in_isr()) {
177 return -EWOULDBLOCK;
178 }
179
180 k_sem_take(&drv_data->lock, K_FOREVER);
181
182 if ((flags & GPIO_SINGLE_ENDED) != 0U) {
183 ret = -ENOTSUP;
184 goto done;
185 }
186
187 ret = setup_pin_dir(dev, pin, flags);
188 if (ret < 0) {
189 LOG_ERR("Error setting pin direction (%d)", ret);
190 goto done;
191 }
192
193 ret = setup_pin_pull(dev, pin, flags);
194 if (ret < 0) {
195 LOG_ERR("Error setting pin pull up/pull down (%d)", ret);
196 goto done;
197 }
198
199 done:
200 k_sem_give(&drv_data->lock);
201 return ret;
202 }
203
mcp23xxx_port_get_raw(const struct device * dev,uint32_t * value)204 static int mcp23xxx_port_get_raw(const struct device *dev, uint32_t *value)
205 {
206 struct mcp23xxx_drv_data *drv_data = dev->data;
207 uint16_t buf;
208 int ret;
209
210 if (k_is_in_isr()) {
211 return -EWOULDBLOCK;
212 }
213
214 k_sem_take(&drv_data->lock, K_FOREVER);
215
216 ret = read_port_regs(dev, REG_GPIO, &buf);
217 if (ret == 0) {
218 *value = buf;
219 }
220
221 k_sem_give(&drv_data->lock);
222 return ret;
223 }
224
mcp23xxx_port_set_masked_raw(const struct device * dev,uint32_t mask,uint32_t value)225 static int mcp23xxx_port_set_masked_raw(const struct device *dev, uint32_t mask, uint32_t value)
226 {
227 struct mcp23xxx_drv_data *drv_data = dev->data;
228 uint16_t buf;
229 int ret;
230
231 if (k_is_in_isr()) {
232 return -EWOULDBLOCK;
233 }
234
235 k_sem_take(&drv_data->lock, K_FOREVER);
236
237 buf = drv_data->reg_cache.gpio;
238 buf = (buf & ~mask) | (mask & value);
239
240 ret = write_port_regs(dev, REG_GPIO, buf);
241 if (ret == 0) {
242 drv_data->reg_cache.gpio = buf;
243 }
244
245 k_sem_give(&drv_data->lock);
246 return ret;
247 }
248
mcp23xxx_port_set_bits_raw(const struct device * dev,uint32_t mask)249 static int mcp23xxx_port_set_bits_raw(const struct device *dev, uint32_t mask)
250 {
251 return mcp23xxx_port_set_masked_raw(dev, mask, mask);
252 }
253
mcp23xxx_port_clear_bits_raw(const struct device * dev,uint32_t mask)254 static int mcp23xxx_port_clear_bits_raw(const struct device *dev, uint32_t mask)
255 {
256 return mcp23xxx_port_set_masked_raw(dev, mask, 0);
257 }
258
mcp23xxx_port_toggle_bits(const struct device * dev,uint32_t mask)259 static int mcp23xxx_port_toggle_bits(const struct device *dev, uint32_t mask)
260 {
261 struct mcp23xxx_drv_data *drv_data = dev->data;
262 uint16_t buf;
263 int ret;
264
265 if (k_is_in_isr()) {
266 return -EWOULDBLOCK;
267 }
268
269 k_sem_take(&drv_data->lock, K_FOREVER);
270
271 buf = drv_data->reg_cache.gpio;
272 buf ^= mask;
273
274 ret = write_port_regs(dev, REG_GPIO, buf);
275 if (ret == 0) {
276 drv_data->reg_cache.gpio = buf;
277 }
278
279 k_sem_give(&drv_data->lock);
280
281 return ret;
282 }
283
mcp23xxx_pin_interrupt_configure(const struct device * dev,gpio_pin_t pin,enum gpio_int_mode mode,enum gpio_int_trig trig)284 static int mcp23xxx_pin_interrupt_configure(const struct device *dev, gpio_pin_t pin,
285 enum gpio_int_mode mode, enum gpio_int_trig trig)
286 {
287 struct mcp23xxx_drv_data *drv_data = dev->data;
288 const struct mcp23xxx_config *config = dev->config;
289
290 if (!config->gpio_int.port) {
291 return -ENOTSUP;
292 }
293
294 if (k_is_in_isr()) {
295 return -EWOULDBLOCK;
296 }
297
298 k_sem_take(&drv_data->lock, K_FOREVER);
299
300 uint16_t gpinten = drv_data->reg_cache.gpinten;
301 uint16_t defval = drv_data->reg_cache.defval;
302 uint16_t intcon = drv_data->reg_cache.intcon;
303
304 int ret;
305
306 switch (mode) {
307 case GPIO_INT_MODE_DISABLED:
308 gpinten &= ~BIT(pin);
309 break;
310
311 case GPIO_INT_MODE_LEVEL:
312 gpinten |= BIT(pin);
313 intcon |= BIT(pin);
314
315 switch (trig) {
316 case GPIO_INT_TRIG_LOW:
317 defval |= BIT(pin);
318 break;
319 case GPIO_INT_TRIG_HIGH:
320 defval &= ~BIT(pin);
321 break;
322 case GPIO_INT_TRIG_BOTH:
323 /* can't happen */
324 ret = -ENOTSUP;
325 goto done;
326 }
327 break;
328
329 case GPIO_INT_MODE_EDGE:
330 gpinten |= BIT(pin);
331 intcon &= ~BIT(pin);
332
333 switch (trig) {
334 case GPIO_INT_TRIG_LOW:
335 drv_data->rising_edge_ints &= ~BIT(pin);
336 drv_data->falling_edge_ints |= BIT(pin);
337 break;
338 case GPIO_INT_TRIG_HIGH:
339 drv_data->rising_edge_ints |= BIT(pin);
340 drv_data->falling_edge_ints &= ~BIT(pin);
341 break;
342 case GPIO_INT_TRIG_BOTH:
343 drv_data->rising_edge_ints |= BIT(pin);
344 drv_data->falling_edge_ints |= BIT(pin);
345 break;
346 }
347 break;
348 }
349
350 ret = write_port_regs(dev, REG_GPINTEN, gpinten);
351 if (ret != 0) {
352 goto done;
353 }
354 drv_data->reg_cache.gpinten = gpinten;
355
356 ret = write_port_regs(dev, REG_DEFVAL, defval);
357 if (ret != 0) {
358 goto done;
359 }
360 drv_data->reg_cache.defval = defval;
361
362 ret = write_port_regs(dev, REG_INTCON, intcon);
363 if (ret != 0) {
364 goto done;
365 }
366 drv_data->reg_cache.intcon = intcon;
367
368 done:
369 k_sem_give(&drv_data->lock);
370
371 return ret;
372 }
373
mcp23xxx_manage_callback(const struct device * dev,struct gpio_callback * callback,bool set)374 static int mcp23xxx_manage_callback(const struct device *dev, struct gpio_callback *callback,
375 bool set)
376 {
377 struct mcp23xxx_drv_data *drv_data = dev->data;
378 const struct mcp23xxx_config *config = dev->config;
379
380 if (!config->gpio_int.port) {
381 return -ENOTSUP;
382 }
383
384 if (k_is_in_isr()) {
385 return -EWOULDBLOCK;
386 }
387
388 k_sem_take(&drv_data->lock, K_FOREVER);
389
390 int ret = gpio_manage_callback(&drv_data->callbacks, callback, set);
391
392 k_sem_give(&drv_data->lock);
393
394 return ret;
395 }
396
mcp23xxx_work_handler(struct k_work * work)397 static void mcp23xxx_work_handler(struct k_work *work)
398 {
399 struct mcp23xxx_drv_data *drv_data = CONTAINER_OF(work, struct mcp23xxx_drv_data, work);
400 const struct device *dev = drv_data->dev;
401
402 int ret;
403
404 k_sem_take(&drv_data->lock, K_FOREVER);
405
406 uint16_t intf;
407
408 ret = read_port_regs(dev, REG_INTF, &intf);
409 if (ret != 0) {
410 LOG_ERR("Failed to read INTF");
411 goto fail;
412 }
413
414 if (!intf) {
415 /* Probable causes:
416 * - REG_GPIO was read from somewhere else before the interrupt handler had a chance
417 * to run
418 * - Even though the datasheet says differently, reading INTCAP while a level
419 * interrupt is active briefly (~2ns) causes the interrupt line to go high and
420 * low again. This causes a second ISR to be scheduled, which then won't
421 * find any active interrupts if the callback has disabled the level interrupt.
422 */
423 LOG_ERR("Spurious interrupt");
424 goto fail;
425 }
426
427 uint16_t intcap;
428
429 /* Read INTCAP to acknowledge the interrupt */
430 ret = read_port_regs(dev, REG_INTCAP, &intcap);
431 if (ret != 0) {
432 LOG_ERR("Failed to read INTCAP");
433 goto fail;
434 }
435
436 /* mcp23xxx does not support single-edge interrupts in hardware, filter them out manually */
437 uint16_t level_ints = drv_data->reg_cache.gpinten & drv_data->reg_cache.intcon;
438
439 intf &= level_ints | (intcap & drv_data->rising_edge_ints) |
440 (~intcap & drv_data->falling_edge_ints);
441
442 k_sem_give(&drv_data->lock);
443 gpio_fire_callbacks(&drv_data->callbacks, dev, intf);
444 return;
445
446 fail:
447 k_sem_give(&drv_data->lock);
448 }
449
mcp23xxx_int_gpio_handler(const struct device * port,struct gpio_callback * cb,gpio_port_pins_t pins)450 static void mcp23xxx_int_gpio_handler(const struct device *port, struct gpio_callback *cb,
451 gpio_port_pins_t pins)
452 {
453 struct mcp23xxx_drv_data *drv_data =
454 CONTAINER_OF(cb, struct mcp23xxx_drv_data, int_gpio_cb);
455
456 k_work_submit(&drv_data->work);
457 }
458
459 const struct gpio_driver_api gpio_mcp23xxx_api_table = {
460 .pin_configure = mcp23xxx_pin_cfg,
461 .port_get_raw = mcp23xxx_port_get_raw,
462 .port_set_masked_raw = mcp23xxx_port_set_masked_raw,
463 .port_set_bits_raw = mcp23xxx_port_set_bits_raw,
464 .port_clear_bits_raw = mcp23xxx_port_clear_bits_raw,
465 .port_toggle_bits = mcp23xxx_port_toggle_bits,
466 .pin_interrupt_configure = mcp23xxx_pin_interrupt_configure,
467 .manage_callback = mcp23xxx_manage_callback,
468 };
469
470 /**
471 * @brief Initialization function of MCP23XXX
472 *
473 * @param dev Device struct.
474 * @return 0 if successful. Otherwise <0 is returned.
475 */
gpio_mcp23xxx_init(const struct device * dev)476 int gpio_mcp23xxx_init(const struct device *dev)
477 {
478 const struct mcp23xxx_config *config = dev->config;
479 struct mcp23xxx_drv_data *drv_data = dev->data;
480 int err;
481
482 if (config->ngpios != 8U && config->ngpios != 16U) {
483 LOG_ERR("Invalid value ngpios=%u. Expected 8 or 16!", config->ngpios);
484 return -EINVAL;
485 }
486
487 err = config->bus_fn(dev);
488 if (err < 0) {
489 return err;
490 }
491
492 k_sem_init(&drv_data->lock, 0, 1);
493
494 /* If the RESET line is available, pulse it. */
495 if (config->gpio_reset.port) {
496 err = gpio_pin_configure_dt(&config->gpio_reset, GPIO_OUTPUT_ACTIVE);
497 if (err != 0) {
498 LOG_ERR("Failed to configure RESET line: %d", err);
499 return -EIO;
500 }
501
502 k_usleep(MCP23XXX_RESET_TIME_US);
503
504 err = gpio_pin_set_dt(&config->gpio_reset, 0);
505 if (err != 0) {
506 LOG_ERR("Failed to deactivate RESET line: %d", err);
507 return -EIO;
508 }
509 }
510
511 /* If the INT line is available, configure the callback for it. */
512 if (config->gpio_int.port) {
513 if (config->ngpios == 16) {
514 /* send both ports' interrupts through one IRQ pin */
515 err = write_iocon(dev, REG_IOCON_MIRROR);
516
517 if (err != 0) {
518 LOG_ERR("Failed to enable mirrored IRQ pins: %d", err);
519 return -EIO;
520 }
521 }
522
523 if (!gpio_is_ready_dt(&config->gpio_int)) {
524 LOG_ERR("INT port is not ready");
525 return -ENODEV;
526 }
527
528 drv_data->dev = dev;
529 k_work_init(&drv_data->work, mcp23xxx_work_handler);
530
531 err = gpio_pin_configure_dt(&config->gpio_int, GPIO_INPUT);
532 if (err != 0) {
533 LOG_ERR("Failed to configure INT line: %d", err);
534 return -EIO;
535 }
536
537 gpio_init_callback(&drv_data->int_gpio_cb, mcp23xxx_int_gpio_handler,
538 BIT(config->gpio_int.pin));
539 err = gpio_add_callback(config->gpio_int.port, &drv_data->int_gpio_cb);
540 if (err != 0) {
541 LOG_ERR("Failed to add INT callback: %d", err);
542 return -EIO;
543 }
544
545 err = gpio_pin_interrupt_configure_dt(&config->gpio_int, GPIO_INT_EDGE_TO_ACTIVE);
546 if (err != 0) {
547 LOG_ERR("Failed to configure INT interrupt: %d", err);
548 return -EIO;
549 }
550 }
551
552 k_sem_give(&drv_data->lock);
553
554 return 0;
555 }
556
