1 /*******************************************************************************
2  * Copyright 2019-2021 Microchip FPGA Embedded Systems Solutions.
3  *
4  * SPDX-License-Identifier: MIT
5  *
6  * @file hw_gen_peripherals.h
7  * @author Microchip-FPGA Embedded Systems Solutions
8  *
9  *
10  * Note 1: This file should not be edited. If you need to modify a parameter
11  * without going through regenerating using the MSS Configurator Libero flow
12  * or editing the associated xml file
13  * the following method is recommended:
14 
15  * 1. edit the following file
16  * boards/your_board/platform_config/mpfs_hal_config/mss_sw_config.h
17 
18  * 2. define the value you want to override there.
19  * (Note: There is a commented example in the platform directory)
20 
21  * Note 2: The definition in mss_sw_config.h takes precedence, as
22  * mss_sw_config.h is included prior to the generated header files located in
23  * boards/your_board/fpga_design_config
24  *
25  */
26 
27 #ifndef HW_GEN_PERIPHERALS_H_
28 #define HW_GEN_PERIPHERALS_H_
29 
30 
31 #ifdef __cplusplus
32 extern  "C" {
33 #endif
34 
35 #if !defined (LIBERO_SETTING_GPIO_CR)
36 /*GPIO Blocks reset control- (soft_reset options chossen in Libero confgurator)
37 */
38 #define LIBERO_SETTING_GPIO_CR    0x000F0703UL
39     /* GPIO0_SOFT_RESET_SELECT           [0:2]   RW value= 0x3 */
40     /* GPIO0_DEFAULT                     [4:2]   RW value= 0x0 */
41     /* GPIO1_SOFT_RESET_SELECT           [8:3]   RW value= 0x7 */
42     /* GPIO1_DEFAULT                     [12:3]  RW value= 0x0 */
43     /* GPIO2_SOFT_RESET_SELECT           [16:4]  RW value= 0xF */
44     /* GPIO2_DEFAULT                     [20:4]  RW value= 0x0 */
45 #endif
46 #if !defined (LIBERO_SETTING_CRYPTO_CR_INFO)
47 /*Information on how Crypto setup on this MPFS */
48 #define LIBERO_SETTING_CRYPTO_CR_INFO    0x00000000UL
49     /* MSS_MODE                          [0:2]   RO */
50     /* RESERVED                          [2:1]   RO */
51     /* STREAM_ENABLE                     [3:1]   RO */
52     /* RESERVED1                         [4:28]  RO */
53 #endif
54 
55 #ifdef __cplusplus
56 }
57 #endif
58 
59 
60 #endif /* #ifdef HW_GEN_PERIPHERALS_H_ */
61 
62